Heathkit EC-1 — Volume 3 — Patch panel & computing elements

About this Volume

Volume 3 covers the operating layer of the Heathkit EC-1: the patch panel through which the operator constructs every computation, and the four classes of computing element — the inverting summer, the integrator, the coefficient potentiometer, and the high-gain comparator — that collectively implement any ordinary differential equation solvable on the machine.

The treatment proceeds from the physical panel outward to the mathematics. Section 2 maps every jack, socket, bus, and binding post on the 19¾-inch panel. Sections 3 through 6 develop each computing element from first principles, grounding each in the specific EC-1 topology (6U8 tube, 1 MΩ feedback, ±60 V signal range). Section 7 closes with a fully worked single-element example — one integrator solving ẏ = −ky — that ties every prior concept together and sets up the multi-amplifier programs treated in Vol 4.

Scope and relationship to other volumes. Vol 2 covers the chassis hardware and power architecture (±300 V, −150 V, 6.3 VAC heaters, OA2/OB2 voltage regulators, and the three 100 V initial-condition supplies). Vol 4 covers acquisition and restoration procedures. Vol 5 covers amplitude and time scaling, multi-loop block diagrams, and the full programming methodology. Vol 6 covers sample programs. The present volume assumes the reader has already verified power supplies at the values given in Vol 2 and has balanced all nine amplifiers per the procedure summarised in Section 3.5 below.

Note — All voltages in this volume are referenced to the single machine ground (black binding posts). The EC-1 uses a single-ended, unipolar ground rail; the ±60 V signal range is ±60 V with respect to that rail, not a differential pair.

Patch-Panel Layout — Jacks, Buses, and Binding-Post Field

Physical organisation

The EC-1 front panel is a single anodised aluminium plate, 19¾” × 11½”, carrying all operator-accessible connections. The layout divides into six functional zones arranged in approximate rows from top-left to bottom-right:

The OPERATION switch (RESET / MANUAL / REPETITIVE) and REPETITION RATE control occupy the lower-right corner. The FILAMENT and HIGH VOLTAGE power switches are at the far right.

The patch-board socket grid

The 27 two-pin brown sockets are the key distinguishing feature of the EC-1 relative to professional machines that use fixed front-panel patch jacks. Each socket accepts a two-pin plastic plug on which a discrete resistor or capacitor is mounted. The two pins connect to the two binding posts that flank each socket on the panel: one post is connected to the amplifier summing junction (the virtual ground); the other connects to either an input drive point or the feedback return.

Note — The two-pin sockets are 0.300-inch centre-to-centre, matching the pin spacing of octal tube base pins. Operators who have exhausted the original plastic plugs can fabricate substitutes from octal base pins potted in Delrin rod stock (see Vol 4).

Each of the nine amplifiers has three sockets in a horizontal row:

  [ INPUT-A ]  [ INPUT-B ]  [ FEEDBACK ]
       |              |           |
   summing jct.   summing jct.  output node

The two input sockets share the same summing node; the feedback socket connects between output and summing junction. Placing a resistor in an input socket and a resistor in the feedback socket creates the summing configuration; placing a capacitor in the feedback socket creates the integrator.

Binding-post colour convention

The IC supply binding posts follow the same convention: RED = positive output terminal, BLACK = common (must be patched to machine ground before use, since the IC supplies are floating). The coefficient pot posts: RED = high end of the element (connected to the IC supply voltage), BLACK = wiper output.

Internal bus architecture

Five chassis-mounted bus bars distribute power to all nine amplifier sub-chassis:

These buses are internal and not operator-accessible; they appear on the schematic but not the patch panel. The operator interacts with the ±60 V signal domain exclusively through the front panel jacks.

Danger — The B+ bus operates at +300 VDC with respect to chassis. The chassis lid must be in place during operation. Do not probe internal buses with a voltmeter while the machine is powered unless using a meter rated for at least 500 V CAT I and taking the measurement from an isolated test point.

Jack and socket inventory

Patch-Panel Signal-Flow Diagram

The following ASCII diagram represents the full front-panel connectivity for a typical three-amplifier configuration (two integrators plus one inverter), the minimum required to solve a second-order ODE. This layout also illustrates how the IC supplies, relay contacts, coefficient pot, and meter readout interact.

  ┌──────────────────────────────────────────────────────────────────────────────────────────┐
  │                         EC-1 FRONT PANEL — THREE-AMP LAYOUT                             │
  │                                                                                          │
  │  ┌────────────────────┐   ┌────────────────────┐   ┌────────────────────┐               │
  │  │  AMP 1 (Integrator)│   │  AMP 2 (Integrator)│   │  AMP 3 (Inverter)  │               │
  │  │  [IN-A][IN-B][FB ] │   │  [IN-A][IN-B][FB ] │   │  [IN-A][IN-B][FB ] │               │
  │  │   1MΩ        1µF  │   │   1MΩ        1µF  │   │   1MΩ        1MΩ  │               │
  │  │  INPUT ●  ● OUTPUT│   │  INPUT ●  ● OUTPUT│   │  INPUT ●  ● OUTPUT│               │
  │  │  [BAL slide sw]   │   │  [BAL slide sw]   │   │  [BAL slide sw]   │               │
  │  └────────┬───────┬──┘   └────────┬───────┬──┘   └────────┬───────┬──┘               │
  │           │ OUTPUT│               │ OUTPUT│               │ OUTPUT│                    │
  │           │       └───────────────►INPUT-A│               │       │                    │
  │           │               relay1  │       │   relay2       │       │                    │
  │  IC-1 RED►│INPUT-A  ●───────────►│       │◄─────────●────►│INPUT-A│                    │
  │           │ (RESET)   contacts    │       │ contacts       │       │                    │
  │           │                       │       │               │       │                    │
  │  ┌───────────────────────────────────┐    │      OUTPUT of Amp3 feeds back to           │
  │  │  RELAY CONTACTS 1 (NC=RESET)     │    │      Amp1 INPUT-B via Coeff Pot 1           │
  │  │  RED ●─────────────────────● BLK │    │                                            │
  │  └───────────────────────────────────┘    │                                            │
  │                                           │                                            │
  │  ┌──────────────────────────────────────────────────────────────────────┐               │
  │  │  COEFFICIENT POTS 1–5                                                │               │
  │  │  POT 1: RED ●──────[100kΩ]──────● BLACK(wiper)                      │               │
  │  │         (HIGH END: driven by Amp3 output or IC supply)               │               │
  │  │         (WIPER: patched to Amp1 INPUT-B or Amp2 INPUT-B)             │               │
  │  └──────────────────────────────────────────────────────────────────────┘               │
  │                                                                                          │
  │  ┌─────────────────────┐   ┌───────────────────────────────────────────────────────┐    │
  │  │  IC SUPPLIES 1–3    │   │  METER / READOUT                                      │    │
  │  │  IC-1: ●RED  ●BLK  │   │  FUNCTION: [1][2]...[9] [SET B+][INPUT][BAL]          │    │
  │  │  IC-2: ●RED  ●BLK  │   │  RANGE:    [1V][10V][100V][OFF]                       │    │
  │  │  IC-3: ●RED  ●BLK  │   │  AMP OUTPUT: ●RED  ●BLK                               │    │
  │  │  (0–100V, 5mA each)│   │  METER INPUT: ●RED  ●BLK                              │    │
  │  └─────────────────────┘   └───────────────────────────────────────────────────────┘    │
  │                                                                                          │
  │  OPERATION:  [RESET] [MANUAL] [REPETITIVE]        REP.RATE: ────────────[knob]          │
  └──────────────────────────────────────────────────────────────────────────────────────────┘

  Signal voltages: ±60 V nominal; ±100 V absolute maximum. Machine GND = chassis.
  All patch cords: banana-plug, red and black, 4"–24" lengths.

The Summer — Inverting Tube Op-Amp Summation

Topology and gain derivation

Each of the nine EC-1 amplifiers is a high-gain, DC-coupled, negative-feedback operational amplifier built around a single 6U8 dual-section tube. The 6U8 contains a pentode and a triode in one envelope; the pentode serves as the gain stage and the triode as a cathode-follower output buffer.

Gain = −Rf/Ri. With Rf=Ri=1 MΩ: eₒ = −(e₁+e₂). Unity-gain inversion for each input.

The virtual-ground (summing junction) analysis applies directly. With open-loop gain A ≈ 1,000 and maximum output ±60 V, the summing-junction voltage equals eₒ/A ≈ ±60 mV in the worst case — acceptably close to true virtual ground for a machine whose full-scale signal is ±60 V (0.1% error from this source alone).

The governing equation for n inputs is:

         Rf          Rf          Rf
eₒ = − ──── e₁  −  ──── e₂  − … ──── eₙ
         R1          R2          Rn

With R1 = R2 = … = Rn = Rf = 1 MΩ (the standard EC-1 precision resistors), this reduces to:

eₒ = −(e₁ + e₂ + … + eₙ)

Gain selection by resistor ratio

The EC-1 operation manual (Ver 1, p. 5) specifies: “Generally, Rf is kept at 1 megohm and Ri is changed.” The practical gain range is 1 to 100; gains below unity tend toward instability in the 6U8 topology, and gains above 100 introduce unacceptable output error from summing-junction leakage.

Note — The EC-1 parts kit ships 1 MΩ precision (1%) resistors as the standard element. 100 kΩ precision resistors are used for ×10 gains. Other values (10 kΩ, 200 kΩ, 500 kΩ, 2 MΩ, 5 MΩ, 10 MΩ) must be separately procured for specialised problems such as the bouncing-ball demonstration.

The 6U8 amplifier circuit in detail

The pentode section of the 6U8 operates in a “starved” (low-screen-voltage) regime that maximises voltage gain while keeping the plate current low enough to work with practical plate-load values. The design achieves approximately 700× gain from the pentode stage alone. A small positive-feedback network (a 2.2 MΩ resistor from plate to screen) boosts the total open-loop gain to approximately 1,000.

A 1 kΩ / 5,600 pF high-frequency filter in the plate circuit rolls off the response above a few hundred kilohertz to prevent self-oscillation — a precaution necessary because a 1 MΩ feedback resistor combined with stray capacitance at the summing node would otherwise create a phase-shift oscillator. The −1 dB bandwidth with feedback applied is 600 Hz, which is entirely adequate for the differential-equation simulations the machine is designed to run (typically 0.1–15 Hz, limited by the repetitive oscillator).

The triode section of the 6U8 is wired as a cathode follower. Two NE-2H neon lamps act as a level-shifting element, dropping the plate voltage from the ≈+112 V quiescent level down to the ±60 V output range without the gain loss a resistive voltage divider would introduce. This neon-lamp level shifter is a distinctive element of the EC-1 design.

Amplifier electrical summary:

The 6U8 tube — pin assignment and internal topology

The 6U8 is a combined pentode-triode in a 9-pin miniature (Noval) envelope. The EC-1 uses both sections:

The “starved screen” technique (low screen voltage ≈ 100 V versus the normal 150–200 V) reduces the transconductance of the pentode but dramatically increases the plate resistance, which in combination with a high plate-load resistor yields the ~700× pentode gain. This approach was documented in the trade press by George Kaufer (“How to Design Starved Amplifiers,” Tele-Tech, January 1955) and by Walter Volkers (“Ultra-High-Gain Direct-Coupled Amplifier Circuits,” IRE National Convention, 1950), both cited in the EC-1 operation manual.

6U8 operating point (nominal, within the EC-1 amplifier):

Amplifier balance procedure

Before each problem run, every amplifier must be balanced (output nulled to 0 V with no input). The balance slide switch on the panel disconnects the amplifier from the patch board and connects it in the standard 1 MΩ / 1 MΩ configuration (Fig. 13 in the operation manual). The 3 kΩ balance pot adjusts the grid-bias network to drive the output to zero. The procedure is performed iteratively at METER RANGE settings of 100 V, 10 V, and finally 1 V, converging the null to within ±10 mV.

Tip — Amplifier drift after warm-up is the dominant error source in long integration runs. The manual recommends a minimum 30-minute filament warm-up before use; the balance should be re-checked immediately before any precision run exceeding ~30 seconds.

Gain accuracy and error accumulation

In a multi-amplifier chain, the summing-junction error from finite open-loop gain accumulates. For a chain of n amplifiers each with gain error ε ≈ 1/A ≈ 0.1%:

Total gain error ≈ n × ε (for small ε, cascaded)

With 9 amplifiers all in series (worst case), the cumulative error approaches 0.9% — still within the ±1% tolerance of the precision input resistors. In practice, deep-feedback loops tend to cancel rather than accumulate errors, so the real-world accuracy of the EC-1 is limited primarily by component tolerances (±1% for the precision resistors) and capacitor leakage, not amplifier gain error.

The manual (Ver 1, p. 5) notes: “In practice, the gain of DC computer amplifiers will vary from approximately 1000 for repetitive computers to as high as 10⁶ for a large commercial installation.” This places the EC-1 at the low end of the professional range — entirely appropriate for educational and demonstration use, and adequate for any problem whose solution accuracy requirements do not exceed 1–2%.

Sign convention

Every EC-1 amplifier inverts. This is not incidental but fundamental: it is required by the negative-feedback topology. The consequence for the programmer is that every integrator and every summer produces an output of opposite sign to its mathematical result. Sign chains must be tracked explicitly in the block diagram. The usual remedy is to pass through an even number of amplifiers in any feedback loop — an odd number creates positive feedback and oscillation.

Sign-chain tracking table for common configurations:

The Integrator — Capacitor Feedback, Initial Conditions, IC/OPERATE/HOLD Modes

Switching the feedback element

An integrator is created by replacing the feedback resistor with a capacitor. With input resistor Ri and feedback capacitor Cf, the classical op-amp integrator equation applies:

         1     t
eₒ(t) = ─── ∫  eᵢ(τ) dτ + eₒ(0)
        RiCf  0

where eₒ(0) is the voltage on the capacitor at the start of the integration interval (the initial condition). With Ri = 1 MΩ and Cf = 1 µF, the time constant τ = RiCf = 1 s, yielding real-time integration. The factor 1/RiCf is the integration rate coefficient.

Integration rate (machine time constant) for common component combinations:

Note — The manual (Ver 1, p. 10) recommends keeping problem run times under 1–5 minutes because longer runs accumulate drift error and capacitor self-discharge error. For long time-constant problems, reduce RiCf by time-scaling the problem (see Vol 4).

τ = Ri×Cf = 1MΩ × 1µF = 1 s (real-time). eₒ(t) = −(1/τ)∫eᵢdt + eₒ(0)

Initial condition injection

The three floating IC power supplies (each 0–100 V, 5 mA, OB2 VR-tube regulated) provide the initial values loaded onto integrator feedback capacitors at the start of each run. The supplies are ungrounded; the operator patches one terminal to machine ground and applies the desired voltage to the input node. This allows either polarity (+) or (−) to be set as an initial condition, simply by choosing which terminal to ground.

Setting procedure for a +30 V initial condition:

1. Black (−) terminal of IC-1 → machine ground (black binding post of any convenient amp).
2. Verify METER FUNCTION = INPUT and read the IC-1 output at METER INPUT posts.
3. Rotate the IC-1 knob clockwise until the meter reads 30 V on the 100 V range.
4. Patch the red (+) terminal of IC-1 to the input binding post of the integrator amplifier.

The RESET state (OPERATION switch in RESET) closes the 4PST relay. The closed contacts short the feedback capacitor to ground through the relay path, simultaneously discharging any residual charge (clearing the “memory” of the previous run) and connecting the IC supply through the input resistor to precharge the capacitor to the desired initial condition.

Note — The relay contacts are “normally closed.” In RESET, contacts are closed. In MANUAL or REPETITIVE (OPERATE), contacts are open. This is the opposite of the intuitive “normally open” relay convention and must be borne in mind when tracing the circuit.

The three operating modes

Note — The EC-1 does not have a dedicated HOLD switch in the same sense as a professional Philbrick or EAI machine. The closest equivalent is returning the OPERATION switch to RESET during a run, which both shorts the capacitor (freezing the integrand) and re-applies the IC. For a true HOLD (freeze without IC reset), a separate relay contact must be patched manually across the capacitor with the IC disconnected — a non-standard configuration described in the Nuts & Volts restoration article.

Repetitive operation and oscilloscope synchronisation

With the OPERATION switch in REPETITIVE, the 12BH7-based multivibrator drives the 4PST relay, cycling continuously between IC (relay closed) and OPERATE (relay open) at a rate set by the REPETITION RATE control: approximately 0.1 to 15 cycles per second. This mode is intended for oscilloscope display: the problem is solved, reset, and re-solved many times per second, producing a stable trace on a DC oscilloscope connected to AMPLIFIER OUTPUT. The oscilloscope sweep is not from the scope’s internal timebase; it is derived from another EC-1 integrator (configured as a ramp generator) to ensure synchronisation.

Ramp sweep generator configuration (one EC-1 amplifier consumed):

  IC-N RED ──[1MΩ]──► [Integrator Amp N] ──► SCOPE X-AXIS INPUT
                           1µF cap (Cf)
                           Relay contacts across Cf (same relay = reset every cycle)

The IC supply voltage sets the sweep rate. A −10 V IC input through a 1 MΩ / 1 µF integrator produces a ramp that rises at +10 V/s, reaching +60 V in 6 seconds — suitable for slow problems. Replace Ri with 100 kΩ for a ×10-faster sweep.

Timing diagram for REPETITIVE mode:

RELAY:    ──┐   CLOSED   ┌────────────────┐   CLOSED   ┌──
            │(OPERATE)   │   (RESET/IC)   │(OPERATE)   │
TIME:       │────────────►                │────────────►
            │  T_solve   │     T_reset    │  T_solve   │
            │            │                │            │
OUTPUT:     │  e^(-kt)  ─►  precharge y₀  │ e^(-kt)  ──►

The reset interval T_reset must be long enough for the relay to fully close, the capacitor to discharge, and the IC supply to precharge the capacitor to y₀. In practice, the relay bounce settles in <1 ms and the RC time constant for IC charging (IC impedance ≈ 100 kΩ, Cf = 1 µF → τ = 0.1 s) means a minimum reset interval of 0.3–0.5 s is needed. The multivibrator timing is adjusted by the REPETITION RATE control, which varies the timing capacitor charge current via a potentiometer.

Note — The 12BH7 multivibrator that drives the relay uses the same 12BH7 type as the triode output stage in various Heathkit oscilloscope and audio amplifier kits of the era. The tube is widely available as NOS stock. The relay itself is a standard 4PST type rated for the EC-1’s supply voltages; relay coil current is provided by the 6AQ5 output tube, which acts as the relay driver stage.

Capacitor selection and error sources

The standard feedback capacitor supplied with the EC-1 is a 1 µF Mylar (polyester film) type rated at 630 V. Mylar was chosen for its low dielectric absorption (DA) — a critical parameter for integrators, because DA causes the capacitor’s charge to partially “return” after discharge, introducing an offset error at the start of the next run. Modern equivalents are polypropylene film capacitors, which exhibit even lower DA and are preferred in restoration. Electrolytic capacitors must not be used as integrating capacitors; their leakage current and DA are far too high.

Integrator error budget (typical, room temperature):

Coefficient Potentiometers — Setting Gains 0–1, Loading, Calibration

Physical description

Five 100 kΩ linear-taper wire-wound potentiometers are mounted along the lower edge of the front panel. Each pot has three terminals, two of which are wired to binding posts on the panel:

With this arrangement, the wiper output voltage equals:

V_wiper = V_RED × (dial fraction)

where dial fraction is 0 (full counterclockwise = wiper at ground) to 1 (full clockwise = wiper at RED terminal). The coefficient potentiometer thus implements the multiply-by-constant operation for any constant k in [0, 1].

Note — The EC-1 coefficient pots implement only the range [0, 1]. Gains greater than 1 must be realised using the resistor-ratio method at the amplifier input sockets (e.g., Ri = 100 kΩ, Rf = 1 MΩ gives gain = 10). Negative gains are obtained by preceding or following the pot with an inverter amplifier.

Loading effect analysis

The source impedance of the pot wiper depends on the wiper setting. At mid-scale, the Thevenin source impedance is:

R_Thevenin = (R_total/4) × 2 / (R_total/2 + R_total/2) = R_total / 4 = 25 kΩ

In the worst case (mid-scale setting), the source impedance is 25 kΩ. When the wiper is patched to an amplifier input socket where a 1 MΩ resistor is installed, the load on the wiper is 1 MΩ to the virtual ground of the summing junction — a negligible load (25 kΩ / 1 MΩ ≈ 2.5% voltage divider error). However, if the wiper is also driving a second load (e.g., patched to two amplifier inputs simultaneously), the load drops to 500 kΩ, increasing the error to approximately 5%.

Tip — To eliminate pot loading in critical measurements, buffer the wiper through a unity-gain inverter (one amplifier with Ri = Rf = 1 MΩ). The inverter’s high input impedance (virtual-ground summing junction with 1 MΩ series resistor effectively isolates the pot) prevents loading. This does invert the sign; a second inverter restores it.

Setting and calibration

The five pots do not have calibrated dials. The procedure for setting a coefficient k is:

1. Connect the IC supply (at a known voltage V, e.g., 10 V) to the RED terminal of the pot.
2. Connect the BLACK (wiper) terminal to the METER INPUT binding posts.
3. Set METER FUNCTION = INPUT; METER RANGE = 10 V.
4. Rotate the pot until the meter reads k × V (e.g., for k = 0.38, read 3.8 V).
5. Patch the wiper (BLACK) to the amplifier input.

For the bouncing-ball problem (see Vol 6), coefficients representing gravity (g ≈ 9.8 m/s²), damping, and bounce restitution must all be set this way. It is good practice to measure each coefficient before a run and record it in the problem notebook.

Pot specification summary:

Sign Inversion and the High-Gain Comparator

Unity-gain inverter

Because every EC-1 amplifier is inherently inverting, a unity-gain inverter is simply an amplifier configured with Ri = Rf = 1 MΩ and no other inputs. This is the most common single-amplifier “helper” configuration in EC-1 programs:

  eᵢ ──[1MΩ]──► Σ ──► [A≈1000] ──► eₒ = −eᵢ
                 ↑_______[1MΩ fb]___|

Inserting an inverter after an integrator restores the expected sign; inserting one anywhere in a feedback loop changes the loop sign. The block diagrams in the operation manual show explicit triangular amplifier symbols but do not always label the inversions; the programmer must track signs manually.

Gain-of-ten scaler (sign-inverting)

A common variant is the ×10 inverting amplifier:

  eᵢ ──[100kΩ]──► Σ ──► [A≈1000] ──► eₒ = −10 eᵢ
                   ↑_______[1MΩ fb]___|

This is useful for amplitude unscaling: if the problem was scaled down by 10× to keep signals within ±60 V, the scaler restores the display-level output to a readable range before connecting to the meter or oscilloscope.

The high-gain comparator

When an EC-1 amplifier is operated without feedback (or with a very high impedance feedback element), its open-loop gain of ~1,000 causes the output to saturate — to rail at approximately +60 V or −60 V — for any non-zero differential input. This saturating behaviour is exploited as a comparator in the bouncing-ball problem: a diode and resistor network feeds the comparator input with the sum (ball height + threshold voltage). When height > 0, the comparator output is one polarity; when height < 0 (ball below floor), the output flips, driving a relay or switching circuit that reverses the velocity sign.

The EC-1 does not have a dedicated comparator module; the comparator function is realised by one of the nine general-purpose amplifiers configured in open loop or with a large-valued feedback resistor (10 MΩ is used in the bouncing-ball circuit described in the Nuts & Volts article). The two silicon diodes (1N4006 per the parts list) implement the nonlinear switching function:

Diode clamp: output of comparator ──[D1]──► velocity-reversal summing node
             Inverted output      ──[D2]──► (inactive path)

When the “floor contact” condition is satisfied, the diode conducts and injects a velocity-reversal signal. The result is a physically realistic bounce with energy loss set by the damping coefficient pot.

Note — The EC-1’s diode-comparator approach is a simplified analogue of the relay-switched “bounce” logic used in larger professional machines (EAI TR-48, Philbrick Computational Handbook setups). It introduces a small dead-band around the zero-crossing determined by the diode forward voltage (~0.6 V at operating current) and the amplifier gain, which is acceptable for demonstration purposes.

Summary: EC-1 amplifier configurations

Worked Single-Element Example — One Integrator Solving ẏ = −ky

Problem statement

Solve the first-order linear ODE:

dy/dt = −k y,    y(0) = y₀

This describes radioactive decay, RC circuit discharge, Newton’s law of cooling, and exponential population decay, depending on the physical interpretation. The analytic solution is y(t) = y₀ exp(−kt), a decaying exponential.

Machine equation formulation

The standard EC-1 programming approach starts from the highest-order derivative and integrates downward. Here:

ẏ = −k y

Rearranging for the integrator input:

integrator input = ẏ = −k y = −k × (output of integrator)

The integrator output IS y; its input must receive ẏ. Substituting:

integrator input = −k × y

But the EC-1 integrator is inverting: eₒ = −(1/τ) ∫ eᵢ dt. So the output is −∫(input) dt. To make the output equal to y, the input must be set to ẏ with the sign reversed by the integrating inversion:

y = −(1/τ) ∫ (input) dt

If input = +k × y, then:

y = −(1/τ) ∫ k y dt  →  dy/dt = −(k/τ) y

With τ = 1 (Ri = 1 MΩ, Cf = 1 µF), this gives dy/dt = −k y as required. The coefficient pot sets k.

Block diagram

┌────────────────────────────────────────────────────────────┐
│                                                            │
│  IC supply ──► [Amp 1, integrator]  ──►  y(t) = y₀ e^-kt │
│                       ▲                          │        │
│                       │                          │        │
│              [Coeff Pot, set to k] ◄─────────────┘        │
│                                                            │
│  Patch: Pot-RED = IC-1; Pot-BLACK = Amp1 input socket      │
│         Amp1 feedback = 1µF cap; Relay contacts across cap  │
│         IC-1 (+) = y₀ voltage                              │
└────────────────────────────────────────────────────────────┘

Relay contacts across Cf (closed in RESET, open in OPERATE)

  ┌──── [Amp A: 1/s integrator] ─── ẏ ──── [Amp B: 1/s integrator] ─── y ────┐
  │                                                                             │
  │◄─── [2ζωₙ coefficient pot] ◄────────────────────────────────────────────────┤
  │◄─── [ωₙ² coefficient pot]  ◄──── [Amp C: inverter] ◄──────────────────────-┘
  │                                                                             
  └──── Input of Amp A (ÿ = −2ζωₙ ẏ − ωₙ² y)