Digitalzusatz DEX 102 — Beschreibung und Bedienungsanleitung

Complete English translation of the original German-language document (39 pages).

AEG Telefunken — Data Processing

Digital Supplement DEX 102

Description and Operating Instructions

Section	Title	Page
1.	TECHNICAL OVERVIEW	1
1.1.	Intended Use	1
1.2.	Scope of Supply and Order Designations	2
1.3.	Technical Data	4
1.3.1.	General Data	4
1.3.2.	Flipflop	4
1.3.3.	Inverter	4
1.3.4.	Amplifier	4
1.3.5.	Timing Element	4
1.3.6.	Relay Amplifier	4
1.3.7.	Interconnection Elements	5
1.3.8.	Switch	5
1.3.9.	Clock Generator	5
1.3.10.	Power Supply	5
1.3.11.	Dimensions	6
1.3.12.	Environmental Conditions	6
1.4.	Construction	6
1.5.	Function	7
1.6.	Mode of Operation	11
1.6.1.	Flipflops	11
1.6.2.	Interconnection Elements	12
1.6.3.	Amplifier	13
1.6.4.	Inverter	13
1.6.5.	Timing Elements	14
1.6.6.	Relay Amplifier	14
1.6.7.	Switch	15
1.6.8.	Coupling Panel	15
1.6.8.1.	Functions of the Pause Key	16
1.6.8.2.	Comparator Amplifier Outputs	16
1.6.8.3.	Comparator Switch Inputs	17
1.6.9.	Clock Generator	17
1.6.10.	Power Supply	18
2.	OPERATION	19
2.1.	Commissioning	19
2.1.1.	Mains Connection	19
2.1.2.	Switching On	19

[page 3: table of contents continued]

Section	Title	Page
2.2.	Connection of External Devices	19
2.2.1.	Parallel Connection of Multiple DEX 102 Units	19
2.2.2.	Connection to the Desktop Calculator RA 742	19
2.3.	Operation	20
2.3.1.	Normalize, Clear	20
2.3.2.	Setting the Flipflops	20
2.3.3.	Clocking	20
2.3.3.1.	Single Clock	20
2.3.3.2.	Individual Clock	20
2.3.3.3.	Parallel Clock	20
2.3.3.4.	External Clock	20
2.3.4.	Setting the Timing Elements	21
2.4.	Programming	21
2.4.1.	Layout of the Programming Panel (see Fig. AR 314)	21
2.4.2.	Layout of the Control Panel	25
2.4.3.	Input and Output of Data	28
2.4.3.1.	Manual Input, Visual Output	28
2.4.3.2.	Input and Output of Binary Information Signals	28
2.4.4.	Input and Output via Relays	28
2.4.3.3.	Special Programming Instructions	28
2.4.4.1.	Conjunction (AND circuit)	29
2.4.4.2.	Disjunction (OR circuit)	29
2.4.4.3.	Conjunction/Disjunction	30
2.4.4.4.	Disjunction/Conjunction	30
2.4.4.5.	Unification	30
2.4.4.6.	Multiple Use of a Disjunctive Term	31
2.4.4.7.	Shift Register	32
2.4.4.8.	Counter	33
2.4.4.9.	Freely Programmable Flipflops	33
2.4.4.9.1.	Simple RS Flipflop, binary-1-active	34
2.4.4.9.2.	Simple RS Flipflop, binary-0-active	34
2.4.4.9.3.	Clocked RS Flipflop, binary-1-active	35

APPENDIX: Circuit diagrams, assembly drawings, and connection plans

Plan 1	Overall circuit diagram
Plan 2	Clear amplifier–inverter
Plan 3	Flipflop
Plan 4	Amplifier–inverter
Plan 5	Timing element–inverter
Plan 6	Pulse generator
Plan 7	Connecting cable
Plan 8	Connection plan for connecting cable

[page 4: list of figures]

LIST OF FIGURES

Figure	Title	Page
1	Digital Supplement DEX 102	2
2	Front view DEX 102	6
3	Flipflop	11
4	Circuit diagram of an interconnection element	11
5	Circuit of interconnection elements	12
6	Amplifier	13
7	Inverter	13
8	Timing element	14
9	Relay amplifier	14
10	Switch	15
11	Programming panel and coupling panel	15
12	Functions of the pause key	16
13	Comparator amplifier	17
14	Clock generator	17
15	Control panel	25
16	Circuit with low-level control signals	26
17	AND circuit	29
18	OR circuit	29
19	Disjunction with additional inverter	30
20	Conjunctions with subsequent disjunction	30
21	Disjunctions with subsequent conjunction	30
22	Conjunction with multiple outputs	31
23	Conjunction with a single output, when flipflops follow	31
24	One term in the variables of multiple disjunctions	31
25	Shift register	32
26	Circuit for forward shifting	32
27	Binary converter, forward	33
28	Event counter	33
29	Simple RS flipflop, binary-1-active	34
30	Simple RS flipflop, binary-0-active
	a) general	34
	b) circuit for DEX 102
31	Clocked RS flipflop, binary-1-active
	a) general	35
	b) circuit for DEX 102

1. TECHNICAL OVERVIEW

1.1. Intended Use

The Digital Supplement DEX 102 serves as a peripheral device for the digital processing, storage, and logical linking of information in analog-computer installations and for connecting the digital supplement to desktop calculators.

The Digital Supplement DEX 102 is a freely programmable logic unit. The unit is distinguished from the equipment of the devices it supplements by its freely programmable logic. In accordance with the practical requirements of a given task it offers the proven functional capability of a switching computer, while also enabling special supplementary switching circuits.

It is also possible to use this device independently of analog-computer equipment as a freely programmable logic unit for industrial automatic-control applications. The inputs and outputs of the Digital Supplement DEX 102 can be connected directly to external binary signal sources and can also accept signal levels different from those used internally.

Owing to its simple programmability and its visual and acoustic display, the DEX 102 is particularly suitable for:

Demonstrations and exercises in the field of switching algebra for schools and educational institutions
Programming aids for analog-computer operators
Sequence controllers for analog-computer operation
Connection and transfer logic between analog computers and digital peripheral devices
Parallel-connection logic for Comparator (Comparator-AND, Comparator-OR, Comparator-switching)
Desktop-calculator logic for connections to the desktop calculator RA 742

The following overview summarizes the four element types used and their typical circuit symbols.

1.2. Scope of Supply and Order Designations

The Digital Supplement is supplied as a finished unit, consisting of flipflops, inverters, amplifiers, timing elements, relay amplifiers, interconnection elements, switches, and a clock generator, and is intended for integration into a standard rack.

The unit also accepts free programming of the programming panel and intermediate relay-amplifier coupling through an exchangeable programming panel.

The following table lists all available assemblies together with their order numbers and quantities.

Assembly Contents

Assembly Group	Designation	Type	Order No.	Quantity
Digital Supplement		DEX 102	55.3044.300-00	1
Housing			55.3044.302-00	1
Plug-in unit			55.3044.310-00	1
	Clear amplifier–inverter	II-LI 1	55.3044.800-00	1
	Flipflop	FS 6 N	55.5001.840-00	6
	Amplifier–inverter	Vi 6 A	55.5001.895-00	1
	Timing element–inverter	ZI 6 A	55.5001.896-00	1
	Pulse generator	PG 6 A	55.5001.897-00	1
Accessories	Programming accessories set		55.4044.901-14	1
	consisting of:
	Programming wire, 12.5 cm long	sorted, colors	120
	Programming wire, 25 cm long	Red, Blue	80
	Programming wire, 50 cm long	Yellow and Green	40
	Programming wire, 100 cm long		10
	Cable holder		55.3001.601-00	*)
	Mains cable		5 Lv 4941.001-19	1
Exchangeable programming panel	For Digital Supplement	DPF 121	55.3044.320-00	*)
	Contact-pin set		55.3001.715-00	*)
Connecting cable	Cable RA 742/DEX 102		55.3048.789-00	*)

*) Available on special order only.

1.3. Technical Data

1.3.1. General Data

The binary digits 0 and 1 are represented by the following voltages:

Signal Level	Input	Output
”0”	≤ 2 V	≥ −2 V *)
“1”	≥ 10 V	≥ 20 V
”0”	≤ 2 V	≥ 0 V
”1”	≥ 10 V	≤ 20 V

Unit load, disjunctive: approx. 50 kΩ against −13.5 V
Unit load, conjunctive: approx. 1 kΩ against +13.5 V

*) For conjunctions, “0” = contact closure to ground; “1” = open contact.

1.3.2. Flipflop

Parameter	Value
Type	Clocked RS flipflop with JK characteristic
Input load	1 unit, disjunctive
Output load capability	10 units
Dynamic data: max. sequential frequency	100 kHz typical, 25 kHz min.
Fall delay	≤ 3 µs
Rise delay	≤ 1 µs
Fall time	≈ 1 µs
Rise time	≈ 1 µs

1.3.3. Inverter

Parameter	Value
Input load	1 unit, disjunctive
Output load capability	10 units
Max. sequential frequency	> 100 kHz

1.3.4. Amplifier

Parameter	Value
Input load	2 units, disjunctive
Output load capability	10 units
Max. sequential frequency	> 100 kHz

1.3.5. Timing Element

Parameter	Value
Input load	1 unit, disjunctive
Output load capability	5 units
Rise delay	Adjustable between 10 ms and 10 s
Fall delay	< 1 µs
Duty ratio (“9” = time/delay time)	≈ 1

1.3.6. Relay Amplifier

Parameter	Value
Input load	1 unit, disjunctive
Output	2 changeover contacts
Contact rating	100 V, 1 A, 30 W
Pick-up delay	< 10 ms
Release delay	< 25 ms

[page 9 — continued technical data]

1.3.7. Interconnection Elements

Parameter	Value
Type	Passive diode logic
Inputs/Outputs	Conjunctively interconnectable
Load capability	Input load = output load

Diode Logic	Inputs	Output load
3-diode logic	1/2	10
4-diode logic	1	20
5-diode logic	1	20
6-diode logic	1	20
7-diode logic	1	20
11-diode logic	2	> 20

1.3.8. Switch

Parameter	Value
Output	1 changeover contact
Load capability	> 20 units conjunctive, 4 units disjunctive

1.3.9. Clock Generator

Parameter	Value
Pulse frequency	1; 2; 5; 50; 100 Hz; 1; 10 kHz and individual clock triggering
Clock inhibit: control	Binary “1”
Input load	2, disjunctively interconnectable
Trigger input: control level	6 V
Trigger edge	Negative (1/0 transition)
Slew rate	> 10 V/µs
Pulse duration	> 1 µs
Max. sequential frequency	80 kHz typical, 20 kHz min.
Input impedance	4.7 kΩ, 1000 pF
Single-clock: control	Contact closure to ground
Switching voltage	≈ −13.5 V
Switching current	≤ 40 mA
Max. sequential frequency	> 10 Hz
Parallel input: control	Positive pulses
Amplitude	> 10 V
Edge steepness	> 10 V/µs
Pulse duration	> 3 µs
Max. sequential frequency	> 100 kHz
Input impedance	≈ 5.6 kΩ
Parallel output: pulse form	Rectangular
Amplitude	> 10.5 V
Edge steepness	> 10 V/µs
Pulse gap duration	≤ 25 µs
Load capability	≥ 800 Ω ∥ 7 parallel outputs

1.3.10. Power Supply

Parameter	Value
Voltage	220 V ~
Frequency	50 Hz ± 5 %
Power consumption	≈ 80 W

1.3.11. Dimensions

Parameter	Value
Height	384 mm
Width	448 mm
Depth	430 mm
Weight	≈ 18 kg

1.3.12. Environmental Conditions

Parameter	Value
Temperature	10°C – 35°C
Relative humidity	max. 80%

1.4. Construction

The Digital Supplement forms a self-contained unit and is mounted in the rack alongside other plug-in assemblies of the analog-computer system to which it belongs. It is also suitable for use as an independent benchtop unit.

The unit consists of flipflops, amplifiers, inverters, relay amplifiers, timing elements, and a clock generator, and is provided with an exchangeable programming panel.

The programming panel is the central control element of the Digital Supplement. Through its programming panel, all program wiring for the flipflop outputs and inverter inputs, as well as the output wiring to the relay amplifiers, is carried out. Thus, the programming panel holds the entire program of the flipflop arrangement.

For easier orientation during programming, all similar elements are marked by color coding on the programming panel. The colors are:

Yellow: output terminals of the flipflops and direct outputs of the amplifiers
Blue: input terminals of the inverters (and the timer “1 von n” input terminals)
Red: output terminals of the relay amplifiers and switches
Green: output terminals of the timing elements

The timing elements have their own time-adjustment knobs on the front panel.

[page 10: figure 2 — Front view DEX 102 (photograph)]

1.5. Function

For easy orientation, the programming panel is organized by color coding so that equivalent elements can be connected to the program wiring at a glance. A given program can thus be quickly wired and just as quickly altered.

The program is entered visually through the programming panel, and once the wiring is complete, the machine operates under the program. The inputs and outputs of the DEX 102 can be led to the programming panel and the relay amplifiers without further aids via the programming wires.

In a particularly simple and clear manner, it is possible to display and check the current state of each flipflop or RS-flipflop element at any time by means of small indicator lamps that illuminate for the binary “1” state of each output. All these lamps can be viewed simultaneously at a glance.

In the lower section of the front panel there are the timing elements, the control panel, and the clock generator operation controls.

For use as a peripheral device for analog computers, the DEX 102 accepts digital input from all comparators of the analog-computer system. The digital comparator output is connected directly via programming wires from the front panel patch terminals; no further wiring is required. The DEX 102 can thus provide the following:

Switching functions for analog-computer operation
Programming aids for analog-computer operators
Sequence controllers for analog-computer operation
Connection and transfer logic between analog-computer and digital peripheral equipment

In addition, the DEX 102 can be connected to the desktop calculator RA 742 and linked with analog programming, which considerably simplifies and accelerates the creation of complex control programs.

In the following overview, the four element types used and their circuit symbols are summarized.

[page 13: figure — Elements of the Digital Supplements DEX 100/DEX 102, Sheet 1 AR 144.4]

Elements of the Digital Supplements DEX 100/DEX 102 — Sheet 1

Nr.	Element Designation	Symbol (Circuit Symbol)	Remarks
Passive Elements (conjunctive inputs, disjunctive outputs)
1.	AND element (Conjunction element)	Standard AND gate symbol, output y	y = x₁ ∧ x₂
1.1		Symbol with n inputs and m outputs	If conjunctions with n inputs and m outputs are required, suitable for mutual decoupling of conjunctive outputs
2.	OR element (Disjunction element)	Standard OR gate symbol, inputs x₁, x₂, output y	y = x₁ ∨ x₂
2.1		Symbol with n input signals	y = x₁ ∨ x₂ ∨ … ∨ xₙ. This element is created by collecting 2 or more AND-element outputs onto a (static) disjunctive input of an active element. To make the OR logical effect clear in such a circuit, the OR symbol is drawn dashed and called a “phantom OR”.
Active Elements (e.g., Nos. 5–8)
3.	Inverter (Negation element)	Triangle with bubble at output, input x, output y	y = x̄
4.	Amplifier	Triangle symbol, input x, output y	y = x. When more than 2 conjunction stages follow, 1 inverter must be inserted after every 2 stages.

[page 14: figure — Elements of the Digital Supplements DEX 100/DEX 102, Sheet 2 AR 144.2]

Elements of the Digital Supplements DEX 100/DEX 102 — Sheet 2

Nr.	Element Designation	Symbol (Circuit Symbol)	Remarks
5.	Flipflop (FF)	Square symbol with S, R, T (clock) inputs and Q, Q̄ outputs	S = Set input. R = Reset input. T = Clock input. The flipflop stores the state of S (or R) present at the moment of the clock edge.
6.	Timing element (Z)	Rectangle symbol	t = adjustable delay time. Delays the 1→0 transition of the output with respect to the 0→1 transition of the input by the time t.
7.	I/O switch (I/S switch)	Switch symbol	Represents a manually operated contact. “0” = open, “1” = closed. For the forms shown as the second symbol, an additional inverter is required.
8.	Relay amplifier (Relay switch; Comparator switch)	Rectangle with relay symbol and multiple outputs	S₁, S₂ = switching contacts. For S₁: y = x₁ ∧ x₂. For S₂: y = x₁ ∧ x₃. Variables x₂ and x₃ can be programmed as desired.
10.	Comparator switch or Programmed switch	Rectangle	As per S₁ and S₂ relationship above; variables can be programmed.

1.6. Mode of Operation

1.6.1. Flipflops

The flipflop is an active element with memory function for binary values. It is implemented as a clocked RS flipflop with JK characteristic. The flipflop has the following inputs and outputs, as shown in Figure 3:

Set input S
Reset input R
Clock input T
Output Q (direct output)
Output Q̄ (inverted output)

The flipflop stores the binary value present at the S and R inputs at the moment of the active clock edge. The output Q assumes the value of S, and the output Q̄ assumes the complementary value.

Table 1 — Flipflop truth table:

Input signal S	Input signal R	Output Q	Output Q̄
0	0	Q (unchanged)	Q̄ (unchanged)
0	1	0	1
1	0	1	0
1	1	Toggle (JK behavior)	Toggle

From the last row of the table one can see that the JK behavior is achieved: when both S and R are simultaneously “1”, the flipflop toggles on each clock pulse — a simple Verilog-style “count” mode — and any simple JK-mode counting circuit may be formed from this element.

A further variant of the flipflop allows the connection of the element’s outputs directly to following stages without additional inverters, since both direct and complemented outputs are available simultaneously.

1.6.2. Interconnection Elements

[page 16: figure 4 — Circuit diagram of an interconnection element]

The interconnection elements are passive diode networks, with which conjunctions (AND) or disjunctions (OR) can be realized depending on the programming. Viewed from the input, the diodes used for the positive signal direction are connected via the conjunction resistance directly to the junction node. At least one of the diodes must be used as the output, and this can then be connected directly to further elements as a disjunction (OR element). The associated disjunction resistance is formed by the input network of the following active elements (flipflop, amplifier, etc.).

It is also possible with a single-level logic to allow double-level logic (Conjunction/Disjunction) to be implemented. The disjunction resistance is formed by the input network of the following active element.

[page 16: figure 5 — Circuit of interconnection elements, showing active-element/interconnection-element/active-element chain]

1.6.3. Amplifier

The amplifier is an active element and carries two disjunctive inputs and one output. The output of the amplifier is in the same sense as the input (non-inverting). When more than two conjunction stages are to be cascade-connected, one inverter must be inserted after every two stages (see also Section 1.5, Figure 4).

The diode fanout allows a multiple-connection load on the output of the amplifier without external elements.

[page 17: figure 6 — Amplifier circuit symbol and schematic]

1.6.4. Inverter

The inverter is an active element and carries one disjunctive input and one output. The output is complemented with respect to the input (logical negation). An inverter is also present at the element level as the output stage of the amplifier stages in the unit.

[page 17: figure 7 — Inverter circuit symbol and schematic]

1.6.5. Timing Elements

The timing elements are active elements whose outputs can be delayed. They are constructed essentially as an RC element with an adjustable time-constant element. The timing element consists of an RC element (with the RC time-constant adjustable by a knob) followed by a Schmitt trigger.

A “1” at the output is held for a period of time after the input has returned to “0”, during which time the capacitor discharges. The “0” output always follows quickly at the end of the programmed delay time. The input and output duty ratio (“9” = time/delay time) is approximately 1. The delay time can be adjusted with the front-panel control knob over the range of approximately 10 ms to 10 s.

[page 18: figure 8 — Timing element circuit diagram showing RC element, Schmitt trigger, input, output, and symbol]

1.6.6. Relay Amplifier

The relay amplifier is an active element whose output is a switching relay contact. The amplifier drives a switching relay whose contacts are used as switching elements. The relay amplifier makes a connection to an external circuit — for example an analog circuit. If the relay contact is open, then a binary “1” state corresponding to the contact closure

[page 18: figure 9 — Relay amplifier circuit diagram and symbol]

1.9.7. Scaler

The scaler is an active element and therefore cannot be arbitrarily driven from multiple variables. It is connected to analog outputs and synchronized with two variable binary-coded outputs. The scaler operates in one of two modes: “Live” (Code Buchstabe “L”) and “Rate” (“R”), in the respective ranges s/1 and s/1.

Figure 18 — Scaler

1.9.8. Patch Panel (Koppelfeld)

This part of the programming board contains the patch panel. It is used to establish program connections between the programming elements. Patch connections to the designated connection points of the DEX 102 are made using pluggable short-circuit bridges (Steckbrücken). These systems are therefore of great importance, since the DEX 102 Analogrechner (analog computer) can be patched without using any additional tools.

Figure 11 — Programming board and patch panel

With these systems, arbitrary tasks can thus be solved through simple rearrangement of the programming circuit.

c) Component variants

These modules for Komponentenrechner (component computers) exist in two versions — central and distributed. Central modules (type RA 74) contain the central circuitry of the Analogrechner RA 74 and the DEX 102. Distributed modules contain only the interface circuitry for individual elements. Variable modules can be obtained separately.

2. OPERATION (BETRIEB)

2.1. Interface / Initialization

2.1.1. Clock (Taktverhalten)

The device is not clocked by a fixed clock (fixed-frequency timer). Instead, it operates with the widest possible bandwidth of inputs of 220 to 330 kHz, however with two fixed frequencies: 50 kHz and 100 kHz. The Taktgenerator (clock generator) frequency is set with respect to the reference clock and the Stützfrequenz (support frequency) via switch settings 50 and 100 kHz.

2.1.2. Switches (Einschalten)

On the right side of the front panel there is a main switch. The right-hand switch element is also a Strom-Einschalter (power-on switch). The Stützeneinschalter (support-switch) activates the Stützfrequenz. The switch positions are also marked in the Technische Tabelle in b.

2.2. Analog/Digital Programming Modules (DEX 102)

2.2.1. Analog/Digital interfaces (A/D-Schnittstellenbausteine) for the DEX 102

Komponentenschalter or Digital/Analog-Induktoren (D/A-Inductors) permit the realization of modules with a size of up to 1/4 of a standard connector (Normstecker). The modules are constructed in a central and distributed form. The DEX 102 uses central Komponentenschalter RA 74, and the modules are obtained in two fixed versions: at type HS 74 and HS 44. The Komponentenschalter with addresses of 100 to 130 kHz and 100 to 130 kHz respectively.

2.3. Taktgenerator (Clock Generator)

2.3.1. Taktgenerator

The DEX 102 has a complete module set for Komponentenschalter and contains two Analogrechenprogramme (analog computing programs). The DEX 102 has separate Taktgeneratoren (types HSR 311, DGS 311, ASG 741, ASS 741) and the Analogrechner RA 143 are derived with three Stützfrequenzbausteine (support-frequency modules): the three Stützfrequenzbausteine work with a frequency from 125 Hz to 65 Hz. The Komponentenschalter uses type “V” whenever suitable: in “V” all DEX inputs and outputs operate with defined voltages. The Stützfrequenz for all inputs and outputs is 125 to 65 kHz. The Stützfrequenz for inputs and outputs is 100 kHz.

Der Taktgenerator (clock generator) contains its module Multivibrator and causes the Frequenz to be set at the DEX 102. For this, the Kopplung “Trend” (in the DEX module “Trend”) adjusts the Stützfrequenz by the Stützfrequenzschalter. All DEX 102-specific programming circuit specifications are addressed by this clock module.

The nachfolgende Impulsschaltkreis (subsequent pulse circuit) contains the Analogrechner module and permits the Taktfrequenzplanung (clock frequency planning) for the DEX 102. The Taktgenerator permits precise control of the clock frequency and the Leistungsverhalten (power behavior).

Figure 14 — Clock Generator

The clock generator contains a suitable Multivibrator and induces the Frequenz in a signal at the DEX 102 Programmieraufbau (programming setup). The Kopplung “Trend” module for the DEX 102 also permits the Stützfrequenz to be controlled. All programming elements of the DEX 102 are addressable by this.

The nachfolgende Impulsschaltkreis enables the execution of specific DEX 102 tasks. The Programmiereintrag (programming entry) and Stützfrequenzplanung (support frequency planning) are controlled by the Taktgenerator module.

[page 22: figure only — Belegungsplan of RA 742 and DEX 102, front panel assignment diagram]

2.3.10. Power Supply (Stromversorgung)

The power supply provides all voltages necessary for the Betrieb (operation) of the programming board. Three Steckverbindungen (plug-in connectors) with the following Gleichspannungen (DC voltages): 120 V DC, 50 Hz and 3 Hz.

The supply provides the control voltages and for monitoring the Einschaltung (power-on state) and for control of the Einschaltzustand (switched-on state) of the device.

3. BETRIEB (OPERATION) — continued

3.1. Interface / Initialization

3.1.1. Taktverhalten (Clock Behavior)

The device is not clocked by a fixed time base (Festzeit-Taktgenerator). It operates with the widest possible range, with voltages of 220 to 330 kHz. The fixed frequencies are 50 kHz and 100 kHz. The Stützfrequenz is set in these.

3.1.2. Einschalten (Switching On)

On the right-hand side of the front panel is the power switch.

3.2. Befehlsablauf (Command Sequence)

For the execution of Zeigerbefehlen (pointer instructions), it is necessary to have a suitable Wählschalter (selector switch) and a Zähler (counter) at the DEX 102. These switches are in a connection that enables the DEX 102 to distinguish between the positive and negative directions of the Flipflops at the time of operation.

3.3. Takt (Clock)

In positions 1, 2.5 Hz; 50 kHz; 10 kHz — two Eingangssignale (input signals) at 20 kHz and 10 kHz per clock signal give the input signal for the command logic.

3.3.1. Aussteuerung durch eine Funktion (Modulation by a Function)

Immediately a “Glanz” (gloss/shine) can be switched: the Glanz is then also activated at the Befehlsgeber (command generator), and a Zähler (counter) is available thereafter. The Stützfrequenz switch function produces switching via Digitalbausteine.

In the “Parallel” position, only one Takt is used at a time — the Parallelschalter (parallel switch) connects one parallel-computing function.

3.3.4. Freischalt (Enable)

In the “Freisch” position, the Takt from the Freischaltimpulse (enable pulses) through the Buchsen “Trigger”, i.e., the DEX 102 Freischalt addresses are set at “V”: the Frequenz of the trigger pulses is from 125 to 500 kHz.

3.4. Verzögerungszeit der Zählflanken (Delay Time of Counting Edges)

The Verzögerungszeit (delay time) of the Zähler (counter) does not fulfill the Rolle of the Programmierung: it is insufficient, because the Frequenz of the counter outputs exceeds 120 Hz. The Stützfrequenz addresses cannot be 0.

3.4. Programmierung (Programming)

This DEX 102 contains a complete set of Bausteinen (modules) for the Analogrechenprogramm (analog computing program). The DEX 102 additionally contains an expandable second program for coupling with the Analogrechner RA 742.

The DEX 102 programming board contains 458 modules, the corresponding figure being given by the assigned types (e.g., Ant. AK 11c).

In the following, the list of the Bausteinbelegung (module assignment) of the modules as recommended in the Steckbrettverbindung (breadboard connection) AK 311c is given. The modules include the following: components DK 1 (Integratoren — integrators), DK 2 (Eingangsverstärker — input amplifiers), and others.

3.4.1. Aufbau des Programmierfeldes (Structure of the Programming Field)

The programming field contains 458 modules. The complete programming structure consists of the modules and also the Taktschaltkreis (clock circuit) DK 311c (cf. Ant. AK 11c).

In the following, the Bausteinbelegung (module assignment) list of the modules, as compiled in the Steckbrettverbindung of AK 311c.

Figure 15 — Steckverteiler (patch distribution board)

The Steckverteiler is used for the coupling of the DEX 102 with the Taktschaltermodul (clock switch module) and also the Steckbrettverbindung modules DK 311. The components are organized in two different rows.

For the Steckverteiler, the following recommendations are to be followed:

a) Slots 9 and 9 are arranged as follows: A predetermined Einzelschaltkreis (individual circuit) contains the previously described Analogrechner module. In the associated Bausteinliste (module list): DK 311 and s/1, 11.74.1.

b) Suitable pre-set Quarztaktvorgaben (quartz clock specifications) can be obtained from the valid programming (i.e., from the DEX 102).

c) Power and Widerstandsbausteine (resistor modules) — suitable for Analogrechner RA 742 programming — are obtainable from the modules of type RA 742.

3.4.2. Aufbau des Steckverteilers (Structure of the Patch Distribution Board)

One point is to be noted in the wiring of the DEX 102 board with the Taktschaltermodul; it relates to a certain lower-level Gruppe (group) of connections.

The analog inputs must always be connected as shown in Figure 16, so that the positive Programmierimpulse (programming pulses) at the DEX 102 Koppelfeld are well-defined.

Above all, one must note that the Freisteuersignale (enable signals) at the DEX 102 reach the Quarzsteuersignale (quartz control signals), and that the Stützfrequenz is therefore always equal to 0 or 1.

Figure 16 — Steckverteiler (Patch Distributor)

The circuit using analog inputs allows the combination of the DEX 102 with the Taktgenerator and also the Steckbrett modules DK 311. The components are structured in two different Reihen (rows).

Belegungsplan des Programmierfeldes (Module Assignment Table — Programming Field)

Nr.	Bezeichnung	Farbe	Adresse	Beschreibung
1	Flipflops (FF) 1–34	—	s/1, 1–34	Inputs and outputs: these are the defined binary analog input-output (Ein- und Ausgänge) points. Active analog inputs, FF and the defined binary outputs are located here.
—	Steuerung A	hellgrün	m/s, 1–34	The binary positive FF word “Ā”, the binary input for FF “Ā” in a positive direction.
—	Steuerung B	—	m/s, 20–31	The binary FF positive word “B̄” — in the binary input for “B̄”.
—	Vorverarbeitung	Steckbrücke	s, 1–34	FF for the unassigned Takt (clock) frequencies.
—	Vorverarbeitung g.	hellgrün	—	FF for the unassigned Takt frequencies.
—	Stücknummer-eingang D	hellgrün	k, 11–13	FF for the unassigned Takt (clock) frequencies.
7	Schalter A 5.1–10, Ausgang B, Eingang B	hellgrün	k/1, 10–15	For the binary Ausgänge B and Ā, there are two subsets of flip-flops: Eingänge (inputs) in each case. The Takt then gives no Ausgabeschalter; the output is always active.
8	Koppelfeld	braun	m/s, 29–30	The Felder (fields) 2 and 3 and one of the Programmierfelder K 1 are in the connection point area (Anschlussstellen), as measured from the Steckbrücken (patch bridges). The P word is: — When there is an Eingangssignal at “V”, there is always also a Steckbrücke
—	β	weiß	m/s, 14.15	The β-defined Positivwort at each DEX input — the defined value at the Koppelfeld
—	Linearisierung	braun	l/s, 14	The Flipflops were fabricated; the positive Vorspannung (bias) gives the linearizing of the Taktleitungen (clock lines).

Belegungsplan des Steckverteilers (Module Assignment Table — Patch Distributor)

Nr.	Bezeichnung	Farbe	Adresse	Beschreibung
1	Integratoren-Steuerung	braun	k/l, 11–34	The Integratoren Steuerungskreis (integrator control loop) connects the Analogrechenprogramm to the Programmierfeld. It uses two Steckbrückenbausteine (patch bridge modules) in the Analogrechner module. Variable setting recommended in the following Analogrechner RA 742.
—	D-Relais D 02, D 10, D 12	braun	k, 31 s/1, 33	Steuerleitungen (control lines) of the D-Relais; these are the Analogrechner module contacts DK 1, DK 2.
—	D-Relais D 13	braun	k, 31 s/1, 35	Steuerleitungen of D-Relais; active contacts DK 1, DK 2.
—	Stütz-verbindungen (k, 11) A 20–24	braun	s/1, 11–15	Steuerleitungen of D-Relais; contacts DK 1, DK 2.
2	Quarz-verbindungen	weiß	m/s, 14–17	Free-available Quarz-Steckbrückenbausteine (quartz patch bridge modules). The Felder (fields) 2 and 3 can here be connected; DK 311 c/b is the address. The elements can also be addressed up to 100 %.
3	Inner- und Außen-Verbindungen	—	s/s, 31–34	These modules (type A 1.1, 1.2) connected are to be noted below — see in the Felder Steckbrücken (field patch bridges).
—	e-Halbleitung	weiß	k, 31 s/1	The Betriebseingang (operational input) with size “V” weight; in setting “L” a Frequenz-Buchse (frequency jack) is available.
—	k-Halbleitung	weiß	k, 31 s/1	The same as e-Halbleitung.
—	PA-Leitung	grau	p, 31 s/1	Contact gives goal “B” input; in setting “L” available for “Pause”.
—	HH-Leitung	braun	q, 31 s/s	Contact gives non-correctable Betrag (value) — “Boolean” is not possible.
—	HA-Leitung	braun	p, 31 s/s	Contact gives “Boolean” on “Run” or “B”.
—	TT-Relais	—	p, 31 s/s	Contact gives “Boolean” on “Run” or “B”.

3.4.2. Ein- und Ausgabe (Input and Output)

The Ein- and Ausgabe (input and output) is distributed over the Flipflops (see figures 1.1, 1.2) above and Abbildung 17. These figures are important especially in the Analogrechner module.

For the Ausgabe (output), the values reach the maximum output load and then—when the analog output is read—the DEX 102 connections are usable.

For the Ausgabe values, the analog output is always held. An output is achievable when there is no Parallelschalter (parallel switch) in use; the output is then a Quarzsteuersignal (quartz control signal).

For the Ausgabe values given here, the Spannungsverhalten (voltage behavior) is given.

3.4.3. Komparatoren (Comparators)

2.4.4.1. Komparatoren (UND-Schaltung / AND Circuit)

The inputs of the Verknüpfungselemente (logic linking elements) may be used; connections are primarily for the function. The supplementary active element is, for example, a diode.

Function: y = x₁ ^ x₂ ^ x₃

Figure 17 — UND-Schaltung (AND Circuit)

It is to be noted that when the diodes are used as inputs, additional elements such as resistors, transistors, or capacitors may be added. Passive (active) elements, for example diodes, are connected between the inputs in this circuit.

2.4.4.2. Disjunktion (ODER-Schaltung / OR Circuit)

The disjunction (OR function) of the inputs is realized with the same type of diodes configured for multiple variables. In this manner, several Eingänge (inputs) can be realized. The symmetrical active element is thus the standard element here.

Function: y = x₁ v x₂ v x₃

Figure 18 — ODER-Schaltung (OR Circuit)

For the Ausgabe (output) of such types, all variables are available as Verknüpfungseingänge (linking inputs). If more variables are to be processed, then more active elements need to be used, since they can be cascaded further.

Function: y = x₁ v x₂ v x₃ v x₄

Figure 19 — Disjunction with additional Inverter

The additional overhead compared to the AND function (Konjunktion) is limited to only the additional Inverter.

2.4.4.3. Konjunktion / Disjunktion (AND/OR in series)

Series connections in the sequence Konjunktion/Disjunktion (AND-then-OR) are — given the type of linkage elements used — extremely economical to realize.

Function: y = (x₁ ^ x₂) v (x₃ ^ x₄)

Figure 20 — AND gates followed by OR (Konjunktionen mit nachfolgender Disjunktion)

2.4.4.4. Disjunktion / Konjunktion (OR/AND in series)

Series connections in the sequence Disjunktion/Konjunktion (OR-then-AND) are realized by applying the de Morgan theorems, since otherwise a disproportionately high overhead for intermediate amplifiers would be required.

Function: y = (x₁ v x₂) ^ (x₃ v x₄) = (x̄₁ ^ x̄₂) v (x̄₃ ^ x̄₄) [de Morgan equivalents] = (x̄₁ ^ x̄₂) v (x̄₃ ^ x̄₄)

Figure 21 — OR gates followed by AND (Disjunktionen mit nachfolgender Konjunktion)

2.4.4.5. Vereinzeln (Splitting / Fan-out)

If the output of a Konjunktion (AND gate) is needed as an input to multiple active elements, then several diodes may be used as outputs.

Function: y₁ = y₂ = y₃ = x₁ ^ x₂

Figure 22 — AND gate with multiple outputs (Konjunktion mit mehreren Ausgängen)

If the following active elements are Flipflops, then the use of multiple output diodes can be omitted, since the inputs of the FF already have decoupling diodes.

Function: S₁ = S₂ = x₁ ^ x₂

Figure 23 — AND gate with single output when Flipflops follow

The maximum output load of the linking elements (Verknüpfungselemente) is to be observed (see section 1.3.7).

2.4.4.6. Mehrfachausnutzung eines disjunktiven Terms (Multiple Use of a Disjunctive Term)

If a term appears in the variables of several OR (disjunction) functions, then several diodes may be used as outputs.

Function: y₁ = x₁ v x₂ y₂ = x₂ v x₃

Figure 24 — A single term shared in the variables of multiple OR functions

2.4.4.7. Shiftregister (Shift Register)

The inputs and pre-stores (Vorspeicher) of the Flipflops are designed such that, even though only one clock cycle is available, shift registers can be formed by simply cascading the flip-flops in series.

Figure 25 — Shiftregister

Information arriving at the serial input (SE) is shifted one position to the right with each clock pulse.

Shift register and shift command:

Figure 26 — Circuit for Forward Shifting (Schaltung zum Vorwärts-Shiften)

The inputs of the Flipflops are gated through an AND (Konjunktion) function whose inputs are: the shift command (Shiftbefehl) and the output of the preceding Flipflop.

Information arriving via SE is shifted one position to the right with each clock cycle when a shift command is present (Sh = 1). For Sh = 0 the register remains idle and no input via SE occurs either.

2.4.4. Flip-Flops (continued)

The flip-flop described here has an inherent JK characteristic (see section 2.4.4., point 6, k, 1).

Fig. 27 shows a 4-bit counter. It indicates that starting from 4 bits (16 states) the counting can also be done with other flip-flop designs.

For each clock pulse the circuit advances by one step. Even numbers of steps result in the output switching by one state.

2.4.4.5. Freely programmable flip-flops

For the DEX 102 the following programmable flip-flop circuits are available. Each circuit can also be realized by the programmer through other combinations.

2.4.4.9.1. Simple RS Flip-Flop, binary-1-active

![Figure 29: Simple RS flip-flop, binary-1-active]

Fig. 29 — Simple RS flip-flop, binary-1-active

Function Table

Input Signal			Output State
A₋₁	Sₙ	Rₙ	A	Note
0	0	0	not defined	A₋₁ is the previous state of A
0	0	1	0
0	1	0	1
0	1	1	not defined
1	0	0	not defined
1	0	1	0
1	1	0	1
1	1	1	not defined

2.4.4.9.2. Simple RS Flip-Flop, binary-0-active

![Figure 30: Simple RS flip-flop, binary-0-active — a) general, b) circuit for DEX 102]

Fig. 30 — Simple RS flip-flop, binary-0-active
a) general — b) circuit for DEX 102

Function Table

Input Signal			Output State
A₋₁	Sₙ	Rₙ	A	Note
0	0	0	not defined	A₋₁ is the previous state of A
0	0	1	1
0	1	0	0
0	1	1	0
1	0	0	not defined
1	0	1	1
1	1	0	0
1	1	1	1

2.4.4.9.3. Clocked RS Flip-Flop, binary-1-active

![Figure 31: Clocked RS flip-flop, binary-1-active — a) general, b) circuit for DEX 102]

Fig. 31 — Clocked RS flip-flop, binary-1-active
a) general — b) circuit for DEX 102

The set and reset inputs are each fed to two negated AND functions, to which the clock signal is also applied. The flip-flop is set or reset only when a set or reset pulse and a clock pulse are simultaneously present.

In the state T = 0, S and R can be pre-set, since under this condition the content of the flip-flop does not change, i.e. A = A₋₁.

Function Table

Clock	Input Signal			Output State
T	A₋₁	Sₙ	Rₙ	A	Note
1	0	0	0	0	A₋₁ is the previous state of A
1	0	0	1	0
1	0	1	0	1
1	0	1	1	not defined
1	1	0	0	1
1	1	0	1	0
1	1	1	0	1
1	1	1	1	not defined
0	0	0	0	0
0	0	0	1	0
0	0	1	0	0
0	0	1	1	0
0	1	0	0	1
0	1	0	1	1
0	1	1	0	1
0	1	1	1	1

Digitalzusatz DEX 102 — Beschreibung und Bedienungsanleitung

AEG Telefunken — Data Processing

CONTENTS

1. TECHNICAL OVERVIEW

1.1. Intended Use

1.2. Scope of Supply and Order Designations

1.3. Technical Data

1.3.1. General Data

1.3.2. Flipflop

1.3.3. Inverter

1.3.4. Amplifier

1.3.5. Timing Element

1.3.6. Relay Amplifier

1.3.7. Interconnection Elements

1.3.8. Switch

1.3.9. Clock Generator

1.3.10. Power Supply

1.3.11. Dimensions

1.3.12. Environmental Conditions

1.4. Construction

1.5. Function

1.6. Mode of Operation

1.6.1. Flipflops

1.6.2. Interconnection Elements

1.6.3. Amplifier

1.6.4. Inverter

1.6.5. Timing Elements

1.6.6. Relay Amplifier

1.9.7. Scaler

1.9.8. Patch Panel (Koppelfeld)

2. OPERATION (BETRIEB)

2.1. Interface / Initialization

2.1.1. Clock (Taktverhalten)

2.1.2. Switches (Einschalten)

2.2. Analog/Digital Programming Modules (DEX 102)

2.2.1. Analog/Digital interfaces (A/D-Schnittstellenbausteine) for the DEX 102

2.3. Taktgenerator (Clock Generator)

2.3.1. Taktgenerator

[page 22: figure only — Belegungsplan of RA 742 and DEX 102, front panel assignment diagram]

2.3.10. Power Supply (Stromversorgung)

3. BETRIEB (OPERATION) — continued

3.1. Interface / Initialization

3.1.1. Taktverhalten (Clock Behavior)

3.1.2. Einschalten (Switching On)

3.2. Befehlsablauf (Command Sequence)

3.3. Takt (Clock)

3.3.1. Aussteuerung durch eine Funktion (Modulation by a Function)

3.3.4. Freischalt (Enable)

3.4. Verzögerungszeit der Zählflanken (Delay Time of Counting Edges)

3.4. Programmierung (Programming)

3.4.1. Aufbau des Programmierfeldes (Structure of the Programming Field)

3.4.2. Aufbau des Steckverteilers (Structure of the Patch Distribution Board)

Belegungsplan des Programmierfeldes (Module Assignment Table — Programming Field)

Belegungsplan des Steckverteilers (Module Assignment Table — Patch Distributor)

3.4.2. Ein- und Ausgabe (Input and Output)

3.4.3. Komparatoren (Comparators)

2.4.4.1. Komparatoren (UND-Schaltung / AND Circuit)

2.4.4.2. Disjunktion (ODER-Schaltung / OR Circuit)

2.4.4.3. Konjunktion / Disjunktion (AND/OR in series)

2.4.4.4. Disjunktion / Konjunktion (OR/AND in series)

2.4.4.5. Vereinzeln (Splitting / Fan-out)

2.4.4.6. Mehrfachausnutzung eines disjunktiven Terms (Multiple Use of a Disjunctive Term)

2.4.4.7. Shiftregister (Shift Register)

2.4.4. Flip-Flops (continued)

2.4.4.5. Freely programmable flip-flops

2.4.4.9.1. Simple RS Flip-Flop, binary-1-active

Function Table

2.4.4.9.2. Simple RS Flip-Flop, binary-0-active

Function Table

2.4.4.9.3. Clocked RS Flip-Flop, binary-1-active

Function Table