Transistorisierter Tischanalogrechner RA 741 — Beschreibung

Complete English translation of the original German-language document (63 pages).

[page 1: cover — Telefunken / Transistorized Desk Analog Computer RA 741 / Description]

[page 2: title page — Transistorized Desk Analog Computer / RA 741]

[page 3: imprint — Publisher: Telefunken, Electronic Information Systems Division, Frankfurt / Postbox 400. Printed in Western Germany. Order No. 66-224 ed. 52, Year 1966]

[page 4: figure only — photograph of the RA 741 desk analog computer showing the upper unit (computer amplifiers, function generator, potentiometer panel) and the lower unit (programming panel), with a peripheral device to the right]

1. Technical Overview

1.1 Field of Application
1.2 Delivery Scope and Order Designations
1.3 Basic Functions
1.4 Structure and Function
- 1.4.1 Enclosure
- 1.4.2 Modular Structure
- 1.4.3 Structure of the Programming Panel

2. Operation

2.1 Switching on the Unit
2.2 Initial Setting
2.3 Checking the Operational Amplifiers
2.4 Testing of Individual Modules
2.5 Setting the Computing Element Functions
2.6 Procedure for Setting Potentiometers with Auxiliary Means
2.7 Computing with the Diagram Computer

3. Maintenance

3.1 Testing the Analog and Control Amplifiers
3.2 Replacing Modules
3.3 Checking the Reference Voltage

4. Troubleshooting

4.1 Error Table
4.2 Error Description
4.3 Fault Isolation

5. Circuit Descriptions

5.1 Basic Modules
- 5.1.1 Operational Amplifiers
- 5.1.2 Passive Elements
- 5.1.3 Reference Voltage
- 5.1.4 DC Power Supply
- 5.1.5 Auxiliary Amplifier
- 5.1.6 Buffer Amplifier (Potentiometer)
- 5.1.7 Comparator (Relay)
- 5.1.8 Delay Circuit (Relay)
- 5.1.9 Reversing Switch (Motor)
5.2 Reproduction of Computing Functions

TABLES

1 Delivery Scope
2 Ordering Codes for Order Designations
3 Characteristics of Basic Functions
4 Functions for the Output of the Programming Panel (Basic Functions, Symbols, Computer Identification)
5 Examples for Setting the Computing Functions with Various Functions
6 Characteristics of the Diode Circuit with Sine-Shaped Functions
7 Characteristics of the Relays H, Z1 and Z2 for Various Bias Settings
8 Dependence of the Relays E, Z1 and Z2 on the Bias Voltage
9 Replacement Transistors
10 Parts Index (Appendix)

DIAGRAMS

1 Upper Enclosure
2 Rectifier Module
3 Passive Elements
4 Programming Panel
5 Lower Enclosure (Rectifier Module, Multiplier and Comparator)
6 Reference

NOTES

The present description is intended to inform the user about the technology of the desk analog computer and to enable the operation and maintenance of the unit. In addition, it contains important notes on troubleshooting. For the appropriate use of the unit, a separate “Computing Manual for Analog Computers” is available.

The structure of the description is arranged so that the first main section provides all the knowledge necessary for operation, while the following sections “Operation,” “Maintenance,” and “Troubleshooting” specify the required manual activities. The latter is further arranged for greatest possible clarity in the form of consecutively numbered brief points, the order of which corresponds to the temporal sequence of the activities to be performed. The fifth section contains further details that allow the specialist to go beyond the framework of the maintenance measures described in section 4. With regard to the switch diagrams and circuit diagrams, it should be noted that all switches and relays are shown in their factory-set or de-energized state, regardless of the individual operating states described in section 4.

1. TECHNICAL OVERVIEW

1.1 Field of Application

The desk analog computer RA 741 is a complete facility for solving mathematical problems and simulating physical and technical systems. It is used for integrating and differentiating ordinary differential equations and for similar computing operations.

The installation’s computing speed and the large number of its computing elements allow simultaneous computation of several equations, the simulation of multi-variable systems, and parameter studies with short computation times.

Changeable function generators and programmable elements allow the operation of the device to be adapted to the most varied computing tasks and also enable economical application through a correspondingly structured program.

1.2 Delivery Scope and Order Designations

The RA 741 is a transistorized analog computer that is suitable as a desk computer and, thanks to its modular design, also as an expandable part of a hybrid computer system.

The basic installation and expandable units are listed in Table 1. Ordering codes for the designation of basic installation and additional components are given in Table 2.

The installation structure allows maximum flexibility. The basic functions listed in Table 3 can be modified and extended by adding optional modules, so that the particular requirements of a computational task can always be met with the smallest possible expenditure.

[page 9: figure — photograph of the enclosure with the front panel open showing the plug-in modules; photograph of a function module; Table 1 — Delivery Scope]

Table 1 — Delivery Scope

Component Group	Basic Scope	Standard Scope	Quantity
Computer amplifiers (basic)	x
Integrators (basic)	x
Summers (basic)		x	4
Voltage multipliers
Variable function generators
Multipliers (2 inputs each)
Computer amplifiers			16
Reference amplifiers			1
Programming panel	x		1

[page 10: figure only — Table 2 — Components of the RA 741 (detailed)]

Table 2 — Components of the RA 741

Component Group	Designation	Type	Basic Unit No.	Standard No.	Quantity
Main unit
Mainframe/Enclosures	Basic enclosure	SRV 742	50.3440.039		1
	Additional enclosure	SRV 343	50.3440.037		1

Computer Amplifiers and Reference Amplifiers
Integrators		WN 140	50.3440.044	70
		WN 14 C
Summers (basic)		APN 140	50.3440.046	70
		APN 14 C
Computer amplifiers

Function Generators
Rectifiers		RG 141	50.3440.546
Function generators		BFG 143	50.3440.548

Function Panel
Potentiometers		PTK 700	50.3440.526		1

Accessories (with basic scope)
Reference amplifiers		SPV 741	50.3440.491		x
Multipliers
Zippers
Function generators		AZN FM	50.3430.980
Programming panel
Bus programmer
Programming relays (SFM)
Programming transistors
Programming resistors
Programming diodes

Accessories
Watt-hour meters		NAG B	50.3430.056
Electronic meters		DVM 148
	Resolver		50.3430.025
	Oscilloscope	OMc 730
	Dual-beam oscilloscope	ONS 811
	Digital voltmeter	DVM 148
	Digital computer	DCR 107

[page 12: figure only — photographs of peripheral devices: mainframe NR5 740, resolver, oscilloscope OMc 730, dual-beam oscilloscope ONS 811, digital voltmeter DVM 148, digital computer DCR 107]

1.3 Technical Specifications

Linear Computing Elements (SPV 742)

Operating voltage for computing amplifiers: ±15 V Quiescent current: 12 mA Input resistance of the variables: > 100 kΩ Input offset (zero offset):

without switching: ≤ 100 µV
switchable: ≤ 10 µV Slew rate (programmable): ≤ 1 V/µs Frequency response:
basic: ≤ 1 100%·s⁻¹
switchable: ≤ 10%·s⁻¹ Phase shift (internal), N₁ = 100 kΩ: ≤ 1×10⁻⁸ s Resolution (at 3-Ω thermal noise), Temperature:
static: ≤ 8×10⁻⁴ %
dynamic: ≤ 8×10⁻⁴ % Drift over time per hour (0…2 hours): ≤ 4×10⁻³ %/h Drift with temperature: ≤ 4×10⁻⁴ %/K

Computing speed as summer quantity:

integrated: ≤ 1 µF·s
switchable: ≤ 10 µF·s

Reference Voltage Amplifier (SPV 742)

Input resistance: 50 Ω / 100 µA Reference voltage: ≤ 10 V Stability:

long-term: ≤ 2×10⁻⁴ %/h
temperature-related: ≤ 1×10⁻⁴ %/K

Potentiometers (PTK 700)

Output impedance (loaded): ≤ 10 Ω Adjustment accuracy: ≤ 3×10⁻³ %

Accessory Modules (SPV 741)

Number of comparators: 4 Number of delay circuits: 1 Input resistance of the comparator: > 60 kΩ Switching deviation of comparators during diode turn-on, T₀ = 200 mS:

Phase deviation: ≤ 1 µV
Thermal offset: ≤ 1 µV Error Threshold: ≤ 0.05 V Number of reversing switches: 4 Switches

Potentiometer (PTK 700)

Number of potentiometers: 2 Grid dimension: 100–100 µm Idle: 30–50 kΩ

Adjustable Switches (NNN 111)

Available switches Adjustment accuracy for steady-state T₀ = 200 mS: < 1 µV < 1 µV

Relay functions (SPV 142)

Energizing frequency: ≤ 10 Hz Number of programmable elements Total input resistance for programming: > 60 kΩ Input resistance for stepping: ≥ 0.6 kΩ Output voltage Relay state

Programming panel entry/output table (for the series 100 and 200):

Functions for series 100 and 200 and both individually:

	SPF 110	SPF 120
Input-output resistance	> 1 kΩ	> 1 kΩ
Overload limit	≤ 1 kΩ	≤ 1 kΩ
Voltage accuracy	> 60 kΩ	> 60 kΩ
Input resistance	> 60 kΩ	> 60 kΩ

	BSF 110	BSF 120
Overload limit	> 0.5	> 1
Input resistance	≤ 1 kΩ	≤ 1
Output resistance (load)	> 60 kΩ	> 60 kΩ
Input resistance	> 60 kΩ	> 60 kΩ

	SAF 113
Capacity load input	> 0
Input resistance	≤ 1×10⁻⁴ s⁻¹
Overload accuracy	≤ 1×10⁻⁴ %
Function accuracy	≤ 1×10⁻⁴ %

[page 15: technical data continued]

Function Generator Series 100 BFF

Structure: 4 max. Connections per function generator: 2 mm Output symmetry

Function generator entry/output:

Functions for series 100 and 200 and individually:

	SPF 110	SPF 120
Quiescent current	≤ 10 Ω	≤ 10 Ω
Overload voltage	≥ 1 kΩ	≥ 1 kΩ
Input resistance	> 60 kΩ	> 60 kΩ
Output resistance	> 60 kΩ	> 60 kΩ

Rectifiers (SBF 110)

Accuracy of input resistance: ≤ 1×10⁻⁴ s⁻¹ Accuracy of input offset:

Long-term stability: ≤ 1×10⁻⁴ %
Function accuracy: ≤ 1 × log(10/5) Ω

Relay Switches (SAF 113)

Capacity load accuracy: 1 Input resistance for comparator: ≤ 1×10⁻⁴ s⁻¹ Long-term accuracy: ≤ 1×10⁻⁴ % Function accuracy ≤ 4 × 10⁻⁴ Ω: 4 × 10⁻⁴ Ω

[page 16: technical data continued]

Comparator (Component NNE 111)

Number of comparators: 2 Input resistance of comparator: ≥ 0.9 kΩ Switch delay during response of T₀ = 200 mS: < 1 µV < 1 µV Error threshold: < 0.5 V Number of reversing switches: 4 Switches

Potentiometer (PTK 700)

Number of potentiometers: 2 Grid dimension: 100–100 µm Operating idle resistance: 30–50 kΩ

Adjustable Switches (NNN 111)

Available programmable switches Adjustment accuracy for steady-state T₀ = 200 mS: < 1 µV < 1 µV

Relay delay circuit (SPF 143)

Switching frequency: ≤ 10 Hz Number of programmable elements Total input resistance: > 60 kΩ Input stepping resistance: ≥ 0.6 kΩ Output voltage Relay state in de-energized position

[page 17: technical data continued]

Reference Voltage

Reference voltage: +15 V and −15 V Tolerances: ≤ 4×10⁻³ V

Power Supply

Mains supply (switchable): 110, 127, 150 Vac, 220 and 240 V Power consumption: 50 to 60 Hz

Environmental Conditions

Ambient temperature: 20 ±5 °C

Dimensions

Width: 480 mm / 480 mm Height: 320 mm Depth: 210 mm Weight: approximately 40 kg

1.4 Structure and Function

The installation consists of two main enclosures that are stacked together as a desk unit.

1.4.1 Enclosure

Upper Enclosure

In the upper enclosure, all of the computing amplifiers are located along with other computational modules. It accommodates the front panel for the previous computing program (that is, the collection of the existing connections and the associated computing elements). Through a front panel door that can be folded downward, access is provided to the computing modules which are arranged in the interior in the form of plug-in boards. An additional panel provides further access to the connections of the passive computing elements (resistors, capacitors). In addition, the display instruments and the operating elements for the modes are located on the upper enclosure.

[page 18: continued — with photographs of the upper enclosure interior and the rectifier module]

Figure 11 — Upper enclosure

Rectifier Module

The rectifier module contains 2 function generators and one reference voltage module. The function generators are used for generating non-linear functions (e.g., sine, square function, arbitrary functions from three linear sections). The reference voltage module provides the precisely regulated reference voltage from which the potentiometers set the constant computing values.

In its interior, the rectifier module is equipped with a plug-in rectifier circuit board. The operational amplifiers and the associated passive elements (resistors, diodes) are mounted as fixed components on this board.

To set the desired function, the programming panel is used. This panel is accessible from the front through the opened lid on the front of the lower enclosure.

Figure 12 — Rectifier module

Rectifier Module

In the lower enclosure, the rectifier module and the programming panel are located. The programming panel permits the interconnection of the computing elements as required by the computing program. This includes the input and output connections of all computing elements, the connections of the potentiometers, and the connections of the relay-operated switches.

Page 19

Integrator Characteristics

Fig. 14 — Circuit diagram of a rechargeable computing element

Fig. 15 — Phasegang according to Kretschmer

Fig. 16 — Amplitude and phase response of the rechargeable computing element as a function of frequency

Fig. 17 — Summed output of an integrator as a function of temperature

Fig. 18 — Internal circuit diagram of a rechargeable computing element

The time-behavior function hat no effect on the product A·t in Figs. 16 and 17. The properties of the rechargeable computing element are comparable to those of the best operational amplifiers on the market. Likewise, the amplitude decrease caused by the transition frequency is negligible. With a Telefunken precision capacitor (type C 1) and resistor, the computing element achieves a coefficient accuracy of ≤ 0.01%.

In Fig. 17, the drift of an integrator as a function of temperature is shown. At 25°C the drift of the computing element referred to the input is approximately 0.5 mV. The temperature coefficient of the computing element is approximately −0.01 mV/°C.

Due to the special circuit design shown in Fig. 18, the computing element has very low drift and is especially well suited for slow processes.

Fig. 19 — Frequency response of a rechargeable computing element

Page 20

[Continued from previous page — rechargeable integrator theory and summing amplifier introduction]

Up to 15 computing elements (8 integrators and 15 differentiating elements) can be connected in parallel. In the event that the computing element is defective, the parallel connection ensures that the computing result remains essentially correct. This is an important advantage in large analog computing systems.

At the beginning of a computing process (INITIAL mode, IC), the capacitors C 3 and C 4 are charged through the relays K 1 and K 2 with the initial values specified by the coefficient potentiometers. The initial value range spans from −1 to +1 (referred to machine units). In OPERATE mode, the relays K 1 and K 2 are opened, and the computing element operates as an integrator. In HOLD mode, K 3 is opened, which disconnects the capacitors from the input resistors.

The “Summieren” (Summing) switch in the OPERATE mode position allows multiple computing elements to be connected in parallel without mutual interference.

The fully direct-coupled computing element avoids all coupling capacitors and transformer coupling. Drift is eliminated through the special circuit design shown in Fig. 18.

Summing Amplifier

The summing amplifier is a non-inverting amplifier that can accept up to four input signals and deliver up to 16 output signals simultaneously. Input resistors are not provided, since the summer integrator handles this function.

The amplifier has the following connections:

Y 1–4: Inputs (via internal resistors)
Y 5–16: Outputs
0 V: Ground potential

Fig. 20 — Circuit diagram of a non-inverting summing amplifier

Fig. 21 — Circuit diagram of an inverting summing amplifier

Page 21

[Continued — second integrator type and programming modes]

A second type of integrator (Fig. 21) is included for those cases where sign inversion is required in the programming. In all other respects it operates in the same way as the direct summing amplifier described above.

Programming Modes

The computing element supports a mode switch with the following settings:

IC (Initial Condition): The integrating capacitors are charged to the initial value. The output of the integrator shows the initial value.
OP (Operate): Integration begins. The output changes in accordance with the mathematical operation.
HOLD: Integration is interrupted. The output maintains its instantaneous value.

The mode selection is accomplished via relays K 1, K 2, K 3, which are controlled from the central control panel. The transition between IC and OP modes is made synchronously for all computing elements via a central clock signal.

Appropriate initial values can be set independently for each computing element by means of coefficient potentiometers. The initial value can be set in the range −1 ≤ x₀ ≤ +1 (referred to the machine unit).

In OP mode, the integrator output is:

y(t) = −(1/RC) · ∫ x(τ) dτ + x₀

where x₀ is the preset initial condition.

Fig. 22 — Layout plan of the RA 741 with the Telefunken Periphery (DES 1200)

Page 22

Fig. 23 — Front view of the patchbay panel showing programming connections

Control Panel Functions

Each computing element is assigned a dedicated location on the patchbay panel. The patchbay is organized so that, for each element, the inputs are grouped on the left and the outputs on the right. For integrators, the initial-condition inputs are grouped separately.

Patchbay Organization

The Patchbay of the Telefunken RA 741 computer is arranged so that all inputs and outputs of a given computing element appear in adjacent rows. The rows from top to bottom are:

Inputs of the Summing-/Integrating element
Inputs for initial conditions (for integrators only)
Outputs

The patchbay accommodates all basic computing elements:

Parallel adders / integrators (8 items per group)
Coefficient potentiometers
Multipliers
Comparators
Networks

The connections between elements are made by patch cords inserted into the patchbay sockets.

Coefficient Multipliers

The coefficient multiplier enables multiplication of an input signal by a constant factor between −1 and +1. The value of the coefficient is set by a ten-turn precision potentiometer. The coefficient is read off a digital dial indicating the value to four significant figures.

The multiplied output is available at the output socket of the respective element.

1.4.2.2 Coefficient Potentiometers

For the connection of coefficient potentiometers, only a few basic steps are required. These are described in detail in Section 1.4.2.5 of the operating instructions.

Parametric Inputs

In addition to the normal signal inputs, there are parametric inputs that allow the coefficient set on the potentiometer to be changed during computation. Each parametric input can receive a signal in the range −1 to +1 (machine unit), and this modifies the effective coefficient. This enables functions of two variables to be generated.

Page 23

1.4.2.3 Generating Errors of a Function Generator

The generating error of a function generator is defined as the maximum deviation of the approximated function from the true function, expressed as a percentage of the machine unit. The deviation that occurs between the linear segments and the true function is called the generating error.

Range: −8 ≤ x ≤ +1; the generating error must be held to ≤ 1% for each sub-function.

Fig. 24 — Generating error of a function generator

The function generators match the input to one of the stored piecewise-linear segments and compute the approximate output. The generating error is shown as a function of the number of segments used. Increasing the number of segments reduces the generating error.

All Positive Functions: The generating error at 8 segments is approximately ±0.1% (machine units).

Fig. 25 — Circuit schematic of a function generator

Fig. 26 — Frequency response of the function generator output (no averaging)

Fig. 27 — Frequency response of the function generator output (with averaging)

The frequency response is important because the function generator responds to rapidly changing input signals. Averaging smooths the output and reduces the error at high frequencies, at the cost of some bandwidth.

Page 24

1.4.2.5 Function Generators

The function generators (FG) enable the generation of arbitrary functions y = f(x). Each function generator can store up to 20 linearization segments. For each segment, a lower limit (breakpoint) and an associated gain coefficient are specified.

Function generator Modules:

The RA 741 can be equipped with several types of function generators:

10-segment function generators
20-segment function generators

The piecewise linear approximation uses diode circuits to switch between segments. Accuracy depends on the number of segments and the care taken in setting up the approximation.

Programming a Function Generator (Overview)

Determine the breakpoints of the function to be approximated.
Calculate the slope (gain) for each segment.
Enter the breakpoint values and slopes into the function generator via the front panel controls.
Verify by comparing the generated curve against the desired function on an oscilloscope or x-y plotter.

The accuracy achievable with a 20-segment function generator is generally ≤ 0.1% of the machine unit for smooth, continuous functions.

1.4.2.6 Kompensators

The compensator enables the correction of systematically occurring errors in the computing setup. For example, if a computing element shows a consistent offset error, the compensator can be used to subtract this offset.

The compensator is set by means of a precision potentiometer accessible on the front panel. The output of the compensator is available at a patchbay socket.

Page 25

[Continued — function generator description and table of basic functions]

Described here are the basic functions available per module in the RA 741 computer system. The following modules provide the listed function counts and maximum breakpoints:

Each multiplying element (DAP 110) and each integrating element (DGP 152) are listed with their pin assignments on the patchbay. Inputs Y11, Y12 and Outputs Y13, Y14 are assigned per module.

Function Generator Inputs

The function generators have the following inputs:

Y 11, Y 12: Variable inputs (function argument x)
Y 13: Output (function value y)

The variable input Y 11 and Y 12 (in the case of a two-variable generator) accept signals in the range −1 ≤ x ≤ +1. The output Y 13 provides the function value in the same range.

Fig. 28 — Patchbay assignment of a Summation function generator

The summation function generator connects two additive inputs Y 11 and Y 12 to form the sum function. The result appears at Y 13. The individual function generators can be cascaded to realize multi-variable functions within the limits of the RA 741 system.

Page 26

Table 2 — Basic Computing Elements Available in the RA 741

Designation of the Module	Designation (Type)	Number of Patchbay Connections	Number of Modules Available
Parallel adder/integrator SPM 100	x·y	PMSA	2 × 50
Potentiometer multiplier SPM 142	x·y	PMSA	2 × 10
Quadrant multiplier DGP 112	-x²	PMSA	1 × 10
Quadrant multiplier DGP 122	-z²	PMSA	1 × 10
Multiplier function DAP 110	sin x / cos x	DMSA4 / DMSB4	1 × 10
Multiplier function DAP 160	sin x / cos x	DM5A4 / DM5B4	1 × 18
Multiplier function DGP 185	OCSN4 / OCSA4	1 × 18
Diode function DGF 110		(single output)	1 × 10
Logarithmic function AAN 741	log x / lg 100 x	LGOA4	2 × 5
Analog comparator / AMN 741		A-CU4	—

Page 27

Front Panel Controls — Potentiometer Functions

The front-panel indicators are labeled so that the function being performed by each potentiometer is immediately apparent. The potentiometer dial reads in decimal values. The coefficient value set on the potentiometer is the direct multiplying factor.

Connections 10–16 are fixed output connections that provide signal levels suitable for driving oscilloscopes, x-y plotters, or digital voltmeters.

Components:

The front panel provides:

Potentiometer dials (10-turn precision type) with digital counters
Mode switches (IC / OP / HOLD)
Reset push-button for integrators
Override connections for manual forcing of outputs

Patchbay Slot Assignment

The patchbay slots are numbered from 01 to 90 (in the full machine), with the numbering increasing from left to right and from top to bottom. Each slot accommodates one computing element (plus its potentiometers). Slots are color-coded according to element type:

Blue: Integrators
Yellow: Potentiometers
Red: Multipliers
Green: Function generators
White: Comparators

Fig. 29 — Patchbay slot assignment diagram for a computing element

Computing Accuracy

The absolute value of the computing error depends on:

The quality of the individual computing elements
The programming (number of intermediate operations performed)
The speed of the computing run

For the RA 741, the static accuracy of a single element referred to the machine unit is:

Potentiometer: ≤ 0.01%
Summing amplifier: ≤ 0.01%
Integrator: ≤ 0.01%

Page 28

Table 4 — Function of the Control Switches (→ f and y)

Switch	Function at Switch Position F	Function at Switch Position Y
S	Direct readout	Scaled readout
T	Timed program run	Single-step program run

Bus 9 connects together multiple integrators such that they all operate in a common time base.

Computing Element State

Each computing element can be set independently to any of the following states:

IC: Initial condition (capacitors charged to preset value)
OP: Operate (computation in progress)
HOLD: Hold (output frozen at instantaneous value)

Digit Readout

In the “Readout” mode, each computing element’s output can be read out individually. The readout is performed by stepping through the elements one by one. In continuous readout mode, all elements are cycled automatically.

Decimal Readout Machine

The digital readout mode provides readout to ±9.9999 × machine unit, with resolution of 0.0001 machine units. This readout can be directed to a digital printer, plotter, or other peripheral device.

1.4.4 Priorities for Output Elements

Bus Outputs (Buchse)

Bus output B serves as the main reference output. The signal at this point is connected to the digital readout machine and to other peripherals. When used with the digital output machine (DES 1200), the output is automatically normalized.

Bus W: Serves the comparator network.

Bus D: Provides the output of the function generators.

Bus C: Connects the compensation output.

Page 29

[Page 29: figure only — block diagram showing the interconnection of the control bus sections of the RA 741 computer, with labels indicating: Summation/Integrators, Potentiometers, Summierer, Comparators, Multiply/Networks, Umkehrverstärker (inverting amplifiers), and Steuerbuchsen (control sockets). The diagram shows signal flow from left (inputs) to right (outputs) through the various computing modules, with the Steuerbuchsen bus running across the top and bottom.]

Page 30

Fig. 30 — Layout of the computing elements

Labels visible in the diagram:

Netzanschluss (mains connection)
Netzspannung (mains voltage)
Betriebsspannungs-Anzeige (operating voltage indicator)
Zeitmaßstab-Steuerung (time-scale control)
Im Smart Dacion — mode for DES56
Sl 1
Sl 2
Sl 3
Sl 4
Hell-Hotel (display)
Hell-Hotel (display repeat)
Bus 5, Bus 4, Bus 3, Bus 2, Bus 1

2. BETRIEB (OPERATION)

2.1 Switching On the Machine

The machine may be switched on and off without penalty at any time. No special preliminary conditions are required. The switch-on sequence is self-managing. The mains voltage is connected by setting the main power switch to ON.

2.1.1 Mains Connection

The mains voltage is checked by the indicator lamp. If the indicator lamp does not light, one of the fuses may be blown, or the mains voltage may be absent. In this case, first check the fuse.

2.1.2 Operating Voltage Indicator

The operating voltage indicator shows that all internal supply voltages are present. If the indicator does not light, the machine should not be used until the fault is corrected.

2.1.3 Connection to Output Elements

As an output, a digital voltmeter (DVM), an oscilloscope, or an x-y plotter may be connected. Connecting multiple outputs simultaneously is permissible.

The output sockets labeled “Bus 5, 4, 3, 2, 1” on the rear panel provide normalized output signals for use with peripheral devices. The signal level is ±10 V (machine unit = 10 V).

Page 31

Switching Sequence for Computing

Turn on the power switch (Netzschalter); observe that the operating voltage indicator illuminates.
Set all mode switches to IC (initial condition).
Enter the initial conditions on the potentiometers.
Switch to OP (Operate); computation begins.
At the end of the computation, switch to HOLD if the result is to be preserved.

Digital Readout Device:

Switch on the digital readout device before beginning.
Set the Betriebsschalter (operating switch) of the digital readout to “Panel”.
Digital start is accomplished via the function key “Panel”.
Digital-end is accomplished by pressing “End”.

2.1.3 Parallel Computing

The parallel computing function allows two or more computing elements to share the same input signal. This is achieved through the patchbay by connecting the same source socket to multiple input sockets.

2.2 Panel Switches

The “Panel” switch group contains:

The main power switch
The mode selector switch (IC / OP / HOLD)
Control switches for the computing run (single-step, continuous)

2.3 Programmers

In automatic program mode, the programming can be carried out by means of internal program storage (if available). The program is stepped through sequentially.

Fig. 31 — Front panel, computing unit

The front panel photograph shows the arrangement of controls, indicators, and patchbay sockets. The computing elements occupy the central section, the control buttons are on the right, and the output connections are at the bottom.

Page 32

Fig. 32 — Patchbay connections of a summation integrator configured as a summator

Fig. 33 — Patchbay connections of a summation integrator configured as an inverting amplifier

Fig. 34 — Patchbay connections of an integrator

Fig. 35 — Patchbay connections of a splitter

Fig. 36 — Patchbay connections of a multiplier

It is often possible to achieve more than just the required number of computational steps, in that two equivalent functions can be formed from the same module using summing integrators. (For the inverting amplifier configuration, refer to the patchbay connection diagram Fig. 33.)

For the connections Y 3 and Y 5 shown as the summation integrator used as a summator (Fig. 32): connect the input signals to the left column sockets and take the summed output from the right column. The sign of the output is inverted relative to the sum of the inputs.

For the connection shown in Fig. 33 (inverting amplifier): a single input is connected on the left and the inverted signal is taken from the right. This is useful for introducing a sign change in a computing loop without using an additional computing element.

For the integrator connection (Fig. 34): the input to be integrated is connected on the left and the initial condition is entered via the IC socket. The integrated output is available on the right.

For the multiplier (Fig. 36): the two quantities to be multiplied, x and y, are connected at the two input sockets. The output provides the product x·y. The multiplication factor is set internally.

Page 33

[Continued — further patchbay configurations and coefficient potentiometer programming]

It should be noted that for each function generator, the argument input x must always be connected. This is because the function generator requires a valid input signal to determine which linearization segment is active.

2.3.1 Coefficient Potentiometer Programming

In the following description, k is a variable that can take values from 1 to 19, and m is a variable from 1 to 4.

Setting the Coefficient Potentiometer:

The coefficient potentiometer is set by means of a 10-turn precision potentiometer. The potentiometer has a digital readout that shows the current position (0000 to 9999). The coefficient is:

k = n / 10000

where n is the digital readout value.

Example: To set a coefficient of 0.5000, the digital readout must show 5000. For a coefficient of −0.5000, a sign-reversal connection is used (the potentiometer always gives a positive coefficient; sign reversal is achieved by inverting the signal in the patchbay or by using an inverting amplifier).

Procedure:

Set the digital readout to the required value by turning the potentiometer knob.
Verify the set value by reading the digital display.
Connect the potentiometer output to the required input via the patchbay.

Reciprocal Values:

If a coefficient greater than 1 is needed (which is not directly achievable with a single potentiometer), the same result can be achieved by choosing a different time scale or a different amplitude scale for the problem. This is the standard procedure in analog programming.

2.3.2 Functions of the Potentiometer Banks

The potentiometer banks of the RA 741 are assigned as follows:

Banks Y 11, Y 12: Primary input potentiometers (free for problem use)
Banks Y 13, Y 14: Secondary potentiometers (for parameter variation, or for coefficient setting in specific computing elements)

The input and output configurations for each bank are described in the following section.

Page 34

[Continued — function generator description continued and additional programming instructions]

The following additional points are important to note in the programming of a function generator:

Determine the breakpoints of the function x₁ and the corresponding output values y₁ = f(x₁).
Choose the number of segments needed to achieve the desired accuracy.
Set each segment’s breakpoint and gain in the function generator module using the front panel controls.
For the given function y = f(x), values should be checked at x = +1, x = 0, and x = −1 at a minimum.
To set the Breakpoints, turn the respective breakpoint dial to the desired value; the corresponding function value is set on the adjacent coefficient dial.
Verify the approximation using the x-y plotter or oscilloscope.

Accuracy Note:

For a piecewise linear approximation with n segments, the maximum deviation from a smooth function y = f(x) decreases roughly as 1/n². With 20 segments, accuracy of better than 0.1% of the machine unit is routinely achievable for typical computing problems.

2.3.2.2 Setting Up and Programming

The function generator is set up as follows:

The Funktionsgeber module is first configured by setting its breakpoints (in the table shown in the procedure, functions from Row N 5 in the applicable table are to be used):

Breakpoint No.	x value	y = f(x)
1	−1.0	f(−1)
2	−0.8	f(−0.8)
…	…	…
N	+1.0	f(+1)

For the notation DAS 141 — Bus DAS 141·M refer to the schematic at that point. For the RAS/RHS configuration, the patchbay connection positions for those function generator outputs are as follows:

VAR 11: y, VAR 12: Δ(y)
VAR 13: y², VAR 14: |y|
VAR 15: y·Δ(y)
VAR 16: y + c, VAR 17: c·y

See also the equivalent table of the potentiometer-function for the analogous parameter designations.

Fig. 37 — Patchbay connections of a function generator

Page 35

Fig. 41 — Position of the initial-condition sockets on the stack panels VAB 111, VAB 121, VAB 131, and VAB 141

Fig. 42 — Position of the initial-condition sockets on the stack panels VAB 271, VAB 321, VAB 331, and VAB 341

[Page 35: figures only — two diagrams showing the physical layout of input/output sockets on the stacked patchbay panels. The left diagram (Fig. 41) is labeled “Eingang” (input) and “Ausgang” (output) and shows: O-Ebene, 1-Ebene, 2-Ebene, 3-Ebene, 4-Ebene. The right diagram (Fig. 42) has the same layout with an additional 5-Ebene row. Socket positions within each level are indicated by circles.]

Page 36

TABLE 3

Free Functions (Freie Funktionen)

Designation	Formulation	Realization of Parametric Functions		Settling Time (Einschwingzeit)
		P	x	(ms)
		Patchbay type (Typ)	Patchbay type (Typ)
Parallel adder/integrator SPM 100	x·y	PMSA	PMSA	42
Potentiometer multiplier SPM 142	x·y	PMSA	PMSA	44
Quadrant multiplier DGP 112	−x²	PMSA	PMSA	44
Quadrant multiplier DGP 122				45
Multiplier function DAP 110	sin/cos	DMSA4	DMSA4	46
Multiplier function DAP 160	sin/cos	DM5A4	DM5A4	46
Multiplier function DGP 185		OCSN4	OCSN4	46
Diode function DGF 110		(single)		47
Logarithmic function AAN 741	log x	LGOA4	LGOA4	2 × 5
Analog comparator AMN 741		A-CU4		—

Summation Networks:

| | ABM 11 | | Σy·kᵢ | | 23 |

Group controllers:

| Netzwerk (Network) | NDB 10 | | ±10·S | | 34 | | Umkehrverstärker (Inverting amplifier) | UMB 10 | | ±10·S | | 34 |

Table II B

Variable Functions

The table lists variable computing elements by type, symbol/schematic notation, and dimensioning characteristics. Each row gives the element type, its circuit symbol (shorthand notation), and the applicable dimensioning ranges or notes. The shaded columns indicate the preferred dimensioning range; the column headed “Bild-Nr.” (figure number) references the relevant schematic figure in the manual.

Key symbols used in the table:

Filled square = Diode direction between 0 V and the positive Kreis-voltage (circuit voltage), nominal ≥ 0 V
Aussteuerung (modulation/drive) of the two preceding Polygon-functions
Dauerbetrieb (continuous operation) of the previously set Polygon-functions

Table 7 — Properties of Diode Networks with Variable Functions

Type	±88 V/1	±44 V/1	±22 V/1	±11 V/1	±5.5 V/1
Number of diodes in Grobstufung (coarse stepping)	2	4	8	16
Adjustment of functions in Grobstufung	switchable between 91 V and 10 V
Adjustment range of the coarser Kreispolygon (circle polygon)	continuously between 91 V and 10 V	positive modulation between 0 V and 91 V
Adjustment range of the finer Kreispolygon					continuously between 0 V and 91 V

[page 39: figure only]

The page contains block diagrams / circuit-symbol figures for the following computing elements:

Bild 41 — Parallel Multipliers DFM 134 and DFM 142
Bild 43 — Quadrator (squarer) DQF 112
Bild 45 — Quadrator DQF 132
Bild 46 — Minimum-functions BDF 112 and BDF 122; Maximum-function GDF 112
Bild 47 — Logarithm function DNF 112
Bild 42 — Logarithm-function ALP 111
Bild 44 — Variable Function VAM 111 (Z11) and VAM 141 (BFV)
Bild 48 — Variable Functions VAK 411 (ZF1) and VAK 131 (Z11)
Bild 49 — Variable Function with 2 Diode networks
Bild 50 — Variable Function with 5 Diode networks
Bild 51 — Variable Function with 8 Diode networks
Bild 52 — Variable Function with 5 Diode networks

[page 40: figure only]

The page contains block diagrams for:

Bild 53 — Spectrum analyzer ASK 111
Bild 54 — Comparator unit ASZ 141 / ASN 141

Text note on page 40 (accompanying Bild 53 and 54):

The input signals E₁, E₂, and E₃ are present at the inputs of the Parallel Multiplier. The Spectrum Analyzer and Comparator units can also be used with non-integer numbers of Relais and Relais-type elements.

2.4 Operating Modes

2.4.1 Betriebsschalter (Operating Mode Switch)

The operating modes are selected by pressing the relevant operating-mode button on the front panel. The buttons are mutually exclusive (single-selection). The associated controls are organized on the front panel as follows:

The Betriebsschalter (operating mode selector) has three positions:

“Rechnen” (Compute) — initiates the computing run
“Null” (Zero / IC) — drives integrators to their initial conditions and holds the machine in the ready state
“Pause” (Hold) — freezes all integrator outputs at their current values

The Betriebsschalter can be operated manually (by hand) or automatically via program control. In automatic program mode, the switching of operating modes is organized by the Programmschalter (program controller).

In automatic operation, a single computation run proceeds as follows:

“Null” position — The integrators are driven to their initial conditions. This phase lasts at least as long as specified for the settling of initial conditions.
“Rechnen” position — The computing run begins and runs for a specified duration.
“Pause” position (optional, for display) — At the end of the computing run, the machine can be held in Pause so that the results can be read from the display instruments or oscilloscope.
Repetition — The cycle repeats automatically.

2.4.2 Betriebsarten-Schalter (Mode Selector)

The mode of the computing run (single-shot vs. repetitive) is set by the Betriebsarten-Schalter. Two positions are available:

“Einzel” (Single) — One complete run (IC → Compute → optional Pause) is executed; the machine then halts.
“Folge” (Repetitive / sequence) — The IC–Compute–Pause cycle repeats continuously at a rate determined by the time settings.

2.4.3 Potentiometer-Schalter (Potentiometer Switch)

The Potentiometer-Schalter permits checking all coefficient potentiometers in sequence without interrupting the computation. When switched to the check position, it connects each potentiometer output in turn to the display instrument, allowing its setting to be read and verified. The sequence is stepped manually or automatically.

2.4.4 Schnelllauf und Zeitmaßstab (High-Speed Operation and Time Scale)

The Zeitmaßstab-Schalter (time-scale switch) selects the ratio between machine time and real time. Available settings span from slow-motion (real time : machine time > 1) to high-speed (machine time : real time ≥ 1). The RA 741 supports time-scale ratios allowing repetitive operation at rates suitable for oscilloscope display (Schnelllauf = high-speed mode).

In high-speed mode, the integrator time constants are reduced by the selected time-scale factor, so that a problem scaled to run in, for example, 100 seconds of real time can be solved in 1 second of machine time, enabling repetitive display on an oscilloscope.

2.4.5 Oscilloscope Display in Computing Runs

2.4.5.1 Setting Up the Display

To display results on an oscilloscope during a computing run:

Press the “Folge” (Repetitive) mode button.
Set the time-scale switch to the desired repetition rate.
Connect the oscilloscope to the output of the desired computing element.

The oscilloscope is synchronized to the repetition rate of the computing cycle. The display appears as a stationary trace.

2.4.5.2 Superimposition of Oscilloscope Traces

Multiple output variables can be displayed simultaneously by using an oscilloscope with multiple channels, or by successive single-channel traces (with the oscilloscope set to persist/overlay mode, if available).

2.5 Automatic Potentiometer Setting

The RA 741 includes provisions for automatic (motorized) potentiometer setting. This permits the coefficient potentiometers to be driven to a desired value under program or keyboard control, rather than requiring manual adjustment.

The automatic potentiometer drive is organized through the Koeffizienteneinstellwerk (coefficient-setting unit). The operating steps are:

Select the potentiometer to be adjusted via the address/selection mechanism.
Enter the desired coefficient value (via keyboard, punched tape, or another input means).
The drive mechanism moves the potentiometer wiper to the specified setting.

The Koeffizienteneinstellwerk can also operate in a Prüf- (check) mode, in which it reads back the current potentiometer position and compares it to the nominal value, flagging any discrepancy.

3. Maintenance

3.1 Prüfung der Anlaufgenauigkeit und Einstellgenauigkeit (Checking Start-Up Accuracy and Setting Accuracy)

The following checks are performed periodically or after servicing:

Set the Betriebsschalter to “Null”.
- All integrators must be driven to their initial conditions within ± 0.1 % of the reference voltage (± 10 V nominal).
Set the Betriebsschalter to “Rechnen”.
- Monitor all integrator outputs. In the absence of input signals (zeroed inputs) the integrator outputs must remain at the initial condition value with a drift not exceeding the specified limit over the full computation interval.
The Eingangsgröße (input quantity) E is set to defined values (e.g., 0 V, +5 V, −5 V) and the output is measured. The deviation from the ideal linear relationship must remain within the specified band (see dimensional specifications in the main specification tables).

3.2 Prüfung der Stromversorgung (Checking the Power Supply)

The power-supply voltages are checked at the test points (Prüfbuchsen) provided on the rear panel and at selected internal points. Nominal voltages and permitted tolerances:

+10 V reference — tolerance ± 0.01 %
−10 V reference — tolerance ± 0.01 %
+15 V supply — tolerance ± 1 %
−15 V supply — tolerance ± 1 %
Auxiliary supplies — as specified per module

3.3 Prüfung der Steckeinheiten (Checking the Plug-In Units)

Each plug-in computing module (Verstärker, Multiplier, Diode network, etc.) is checked individually in the following manner:

Remove the module from its slot.
Insert the module into the Prüfgerät (test fixture / extender card).
Apply the specified input signals.
Measure the output. Compare with the specification table for that module type.
Adjust trimmer potentiometers as required to bring the module within specification.
Reinstall the module in its slot.

3.3.1 Regelbare Verstärker (Adjustable Amplifiers)

The adjustable amplifier modules can be checked using the following procedure:

Nullpunkt-Einstellung (zero-point / offset adjustment) — Short the input and adjust the offset trimmer until the output reads 0 V.
Verstärkungseinstellung (gain setting) — Apply a known input voltage (e.g., −10 V from the reference). Adjust the gain trimmer until the output equals the nominal gain × input.
Frequenzgang (frequency response) — Apply a sinusoidal input at representative frequencies and verify that the output amplitude and phase are within specification.

The input resistance is ≥ 1 MΩ; output resistance ≤ 1 Ω (under normal load conditions). The amplifier is checked in both inverting and non-inverting configurations where applicable.

The instrument voltage range is:

Input: −10 V ≤ E ≤ +10 V
Output: −10 V ≤ A ≤ +10 V

3.3.2 Multiplier-Instrumente (Multiplier Modules)

Set both inputs to 0 V; output must be 0 V (within offset specification).
Apply E₁ = +10 V, E₂ = +10 V; output must equal +10 V × (1/10) × 10 = +10 V (or as specified for the module’s scaling).
Apply E₁ = −10 V, E₂ = +10 V; output must equal −10 V.
Apply E₁ = −10 V, E₂ = −10 V; output must equal +10 V.

The instrument displays are checked:

Multiplier output voltage range: −10 V to +10 V
The Multiplier can be used in both 1-quadrant and 4-quadrant modes, depending on the module type (see Table II B for the applicable type).

3.3.3 Prüfung der Koeffizienteneinstellwerke (Checking the Coefficient-Setting Units)

The coefficient-setting instruments are checked as follows:

Set the “Prüf” (check) mode button.
The instrument displays the current value of each coefficient potentiometer in sequence.
Compare the displayed value with the nominal setting.
If a discrepancy exceeds ± 0.02 % of full scale, adjust the potentiometer until within tolerance.

4. Replacement (Instandsetzung)

4.1 Fehlersuche und Fehlerursache (Troubleshooting and Fault Finding)

Faults are classified into two categories:

Grobe Fehler (gross faults) — Output remains at limit (±10 V or 0 V regardless of input); the computing element has failed completely. Such faults are typically identified immediately during the initial self-check run or by visual inspection of the status indicators.
Feine Fehler (fine/subtle faults) — The output is present but deviates from the correct value by an amount exceeding the accuracy specification. These faults require systematic measurement to isolate.

The general troubleshooting sequence is:

Perform a Stromversorgungsprüfung (power-supply check) first.
Perform a Nullpunktprüfung (zero-point check) on each operational amplifier.
Perform a Verstärkungsprüfung (gain check).
Perform a Potentiometerprüfung (potentiometer check) using the automatic-check mode.
Identify which module is faulty by substitution or by signal tracing on the patch panel.

4.1.1 Austausch und Einbau von Steckeinheiten (Removing and Installing Plug-In Units)

The plug-in modules are designed for rapid replacement:

The machine must be switched off (Betriebsschalter to “0”) before removing or installing a module.
Grasp the module by its front-panel handles.
Pull the module straight out of the chassis slot.
Insert the replacement module, pressing firmly until the rear connector is fully engaged.
Switch the machine on and verify operation using the standard self-check sequence.

[page 47: figure only]

The page contains the following figures:

Bild 55 — Wiring diagram / interconnection diagram: Relais-Hanggerät (relay-hung unit / relay expansion panel). The diagram shows the relay matrix arrangement and connector pin assignments.
Bild 56 — Wiring of the interconnection buss (Verbindungsleiter) for the relay matrix, showing the mapping of relay contact rows for N:1, N:2, N:3 relay-contact groups.
Bild 57 — Wiring diagram of the Relaismagnet (relay solenoid / relay-drive winding) connections on the Funktionsplatte (function board).
Bild 58 — Relais-Rahmen-Ansteuerung (relay-frame drive control). Relay addressing and drive circuitry block diagram.
Bild 59 — Magazine arranged in the internal circuit (Innem Schaltbild).

[page 48: figure only]

The page contains the following figures:

Bild 60 — Arrangement (Anordnung) of the Relais behind the Programmierfeld (programming field / patch panel). The diagram shows how the relay modules are positioned behind the patch panel array.
Bild 61 — Arrangement of the Relais in the Basisgerät (base unit / main chassis). Relay module location and addressing within the main frame.

Text accompanying the figures:

Notes:

a) In single-shot (Einzel) mode, after one cycle A.5.1.1, the three Netzfunktionen units (network-function units) are shut down and the results remain displayed on the display instrument at the end of the run.

b) In repetitive (Folge) mode, the Netzfunktionen units complete multiple sequential computation cycles. The Multiplier units and the Basisgerät are reset to “IC” (initial conditions) position at the start of each new cycle.

c) The switching of the relay for the Vorzeichenwechsel (sign change) in connection with the Netzfunktionen units requires that the relay contact bounce time has decayed before the next computation phase begins. The timing margin is guaranteed by the fixed delay built into the cycle controller.

5. Betriebsunterbrechungen (Operating Interruptions)

5.1 Betriebsart (Mode of Operation)

The RA 741 system provides the following time-sharing (Betriebsunterbrechungs-) states:

Each “Pause”-Einstellung (Pause setting) holds the machine in a frozen state with all integrator outputs at their last computed values. Amplifiers remain powered and biased.
Each “Null” state drives all integrators to their initial conditions (IC state).
Time-sharing between multiple problems (Teillösungen — partial solutions) is achievable by using the relay switching matrix to re-route patch connections in sequence.

The relay switching matrix (Relaismatrix) is organized as follows:

Columns = Program steps (Programmschritte)
Rows = Signal paths (Verbindungen)

Selected relay contacts connect the appropriate signal-path rows to the computing elements for each program step.

5.1.1 Automatische Funktionsabläufe (Automatic Function Sequences)

Automatic sequencing is governed by the Funktionsplan (function chart / sequencing controller). The Funktionsplan table (Tabelle 5) lists the sequence of operations that takes place during a full automatic run:

Step	Relay state	Machine state	Duration
2.0	—	Initial condition (Null)	programmable
2.1	—	Commence computing run (Rechnen)	programmable
2.2	—	Hold (Pause) for display readout	programmable
2.3	—	Return to IC (Null) for next cycle	automatic
Q4/1	Active	Switching of Vorzeichenwechsel relay	automatic
Q4/1	Inactive	Release of Vorzeichenwechsel relay	automatic
p4	Active	Enable output to display instruments	automatic
p4	Inactive	Disable output to display instruments	automatic

The “Pause” function holds the following:

Integrator outputs frozen at current value
All other amplifier outputs stable
Coefficient potentiometers unchanged
All relay states unchanged

Pressing “Rechnen” from “Pause” resumes the computation from the point at which it was frozen.

Tabelle 5 — Zusammenfassung der Betriebsabläufe (Summary of Operating Sequences)

Item	Function	Relay/Signal	Value/State
2.0	IC setting of integrators (Null)	—	All integrators → IC
2.1	Start of computation (Rechnen)	—	All integrators compute
2.2	Display hold (Pause)	—	Integrators hold last value
2.3	Trigger for next cycle	—	Returns to 2.0
Q4/1	Relay for sign-change switching	Active	Sign change enabled
Q4/1	Sign-change relay release	Inactive	Sign change disabled
p4	Output enable to display	Active	Display connected
p4	Output disable from display	Inactive	Display disconnected
2.0	Aufruf (call) of Teilaufgabe 51…54 (sub-problems 51–54)	—	Via address lines
2.1	Storage of Teilaufgabe 21…24 (sub-problem intermediate)	—	Relay matrix
2.2	Bestimmung des Teilaufgaben 31…34 (determination)	—	From relay state
2.2	Also: from E.1 or E.5 (input channels 1 or 5)	—	—
Q4/1	Einschaltung (switch-on) of Netz 5 had Netz 9 but held	—	—
Q4/1	Closing via Einzel (single-shot) trigger	—	—
p4	Adjustable-function units: address line to bits 4 and 8 has address space	—	—
p4	Readout from Netz 5 is available at bits 4 and 8	—	—

5.1.1.1 Pause

The “Pause” Taste (Pause button) causes the following:

“Pause” Taste drücken (press): — All integrators hold their current output values instantaneously.
The Pause state is held until either “Rechnen” (Resume compute) or “Null” (Reset to IC) is pressed.
Pause can be triggered from:
- Manual key press
- Automatic program sequence (Programmschalter, Relay-matrix)
- External trigger (rear-panel TTL input)

External trigger timing for Pause:

A logic-low (0 V) on the external Pause input triggers Pause.
The Pause signal must be held low for at least 1 μs for reliable latching.
Release of the external Pause signal does NOT automatically resume computation; the “Rechnen” button (or its relay-matrix equivalent) must be activated separately.

5.1.1.2 Registriergeräte (Recording Instruments)

The RA 741 provides connections for external recording instruments (X-Y plotters, strip-chart recorders, digital voltmeters with data logging). The relevant rear-panel outputs are:

Analog outputs scaled 0 V to ±10 V, direct from the selected computing-element outputs
A Synchronisations-Ausgang (sync output) that produces a TTL pulse at the start of each Rechnen phase, suitable for triggering an oscilloscope or recorder

5.2 Betriebsabläufe der Steckeinheiten (Operating Sequences for Plug-In Units)

5.2.1.1 Pause

The “Pause” function is activated:

By pressing the “Pause” key on the front panel (manual operation)
By external signal on the Pause input terminal on the rear panel
By the automatic program controller (Programmschalter)

The “Pause” mode causes:

a) AD/0-Spannung (AD/0 voltage) is not released — existing output voltages remain active. The feedback loop of the integrators is interrupted so that the capacitor charge is held constant.

b) Netzfunktionen (network-function units) — remain in their last state.

c) Relay coil currents — remain energized as they were at the moment of entering Pause. This ensures no relay switching occurs during Pause.

d) All Festpotentiometer (fixed potentiometers) — remain at their set values.

e) All Regelwiderstände (adjustable resistors) — remain at their current settings.

To resume from Pause: Press “Rechnen”. The integrators resume integrating from their held values.

To reset from Pause: Press “Null”. The integrators are driven back to initial conditions.

Spannungssprünge (voltage jumps): It is important to note that when resuming from Pause (pressing “Rechnen” after “Pause”), there will be no discontinuity in the integrator output provided the hold capacitors have not leaked significantly. The integrators resume seamlessly from their held values.

5.2.2 Automatisches Betriebsablauf (Automatic Operating Sequence)

The automatic operating sequence is initiated by pressing “Folge” (repetitive) and then “Rechnen”. The machine executes the following steps cyclically:

IC (Null) — all integrators driven to initial conditions; duration T_IC (programmed)
Rechnen — computation run; duration T_R (programmed)
Pause (if programmed) — hold state; duration T_P (programmed)
Return to step 1

The cycle period T = T_IC + T_R + T_P.

Tabelle 6 — Eigenschaften des Relais P5 und P6 bei Schnelllauf (Properties of Relay P5 and P6 in High-Speed Mode)

	p5	p6
1Ω	—	—

(Table continues on subsequent page with timing values for the relay switching sequence at various time-scale settings.)

Tabelle 7 — Zeitfolgeplan (Time Sequence Plan)

The time sequence for relay activations in automatic mode is as follows. Times shown are in ms referenced to the start of each Rechnen phase:

Relay	Action	Time from start of Rechnen
P5	Activate	t = 0
P6	Activate	t = 0
P5	Release	t = T_R
P6	Release	t = T_R + Δt

where Δt is the relay-release delay (typically 3–5 ms).

[page 51: figure only]

Bild 61 — Complete circuit diagram (Schaltbild) of a plug-in module for the Betriebsschalter (operating-mode controller). The schematic shows the full relay-driving and logic circuitry, including:

Input conditioning stages for the “Null”, “Rechnen”, and “Pause” control signals
Relay-driver transistor stages
Feedback latch circuits ensuring that mode transitions are debounced and stable
Interconnection to the external trigger input (rear-panel connector)
Power supply decoupling components

5.1.1.1 Pause (continued)

Relais (relay) connection:

The relay switch contacts associated with the “Pause” function are organized as follows (see Bild 51 circuit diagram):

Contact P5 in Null–Rechnen switching path
Contact P6 in Rechnen–Pause switching path

The relay connections P5 and P6 determine the switchover from IC (Null) to Compute (Rechnen) and from Compute to Pause, respectively. The interlock logic ensures that P5 and P6 cannot both be simultaneously in the transition state.

Timing of the operating-mode relays:

The timing relay P5 controls the delay between release of “Null” and activation of “Rechnen”:

At the start of the Null phase, relay P5 operates and connects the integrator input resistors to the IC voltage network.
After the IC phase duration expires, P5 releases and P6 activates, connecting the integrator inputs to the problem-circuit connections for the computing phase.
When “Pause” is commanded, P6 releases, disconnecting integrator inputs and holding the integrator output voltages at their last values.

[page 52: figure only]

Bild 62 — Circuit diagram of the Relais (relay) unit.

Accompanying text:

The younger Relais (relay of type P2, column 2) controls the following:

At t ≤ 10.13: switches the supply from VL8 ≥ 1.2 P.21 and VL8 ≥ −0.77 V to −10.15 (Anforderung — request line), which is applied to all Netz-functions (network functions) assigned to the P-Relais.
At t ≥ 10.13: switches the supply via VL8 ≥ 1.2 P.21 applying a positive signal: +10.15 (Ausgabe — output).

The relay switching relay P2 includes the Kompensations-Widerstand (compensation resistor) networks to cancel offset drift arising from contact resistance variation.

The Maschine indeed:

At t = 40.10.13: switches the Verbindung (connection) from the P-Relais (relay 21) ≥ −0.77 V to −10.15, which applies to all Netz-functions.
At t = 40.40.13: switches Netz 1’s Rechnen-inputs from −40.77 V to +40.15 (this is the first Rechnen signal).
At t = 40.13: Netz 1 closes the IC output: −40 … −30 and +40 … +30 (Vorzeichenwechsel).
At t = 40.13: Netz 2 closes: ±40.13 (switch to Rechnen).
At t = 40.40.3: Netz 3 closes: ±40.15 (switch to Rechnen).

The relay control logic ensures no Maschine discontinuity on the state transitions described.

From the Parallel Multiplier (DFM) units:

The Multiplier output is sampled during the Rechnen phase and held during the Pause phase via the sample-and-hold circuitry within the Multiplier module.

[page 53: figure only]

Bild 62 (continued) — Lower portion of the relay circuit diagram.

Accompanying text:

The relay circuit uses the following signals for the connection of Relais from 4 P-Relais (relay units at address 4):

Eing. (Input): addressed via the input address decoder to lines a4/10, a4/11
Ausg. (Output): connects via output latch lines a4/10, a4/11

The relay activation sequence is:

From address 4 (Relais A4):

a4/10: closing activates the Einteilungsnetz (partitioning network), which routes the sub-problem to the computing elements specified for Teilaufgabe 10.
a4/11: closing activates the corresponding partitioning for Teilaufgabe 11.

Relais-Verbindungen:

The relay contact arrangement ensures:

At the moment of A4 relay activation (t = Eing.): the network Einteilung-Relais opens to disconnect the current problem circuit; the new routing is established before the next Rechnen phase begins.
The relay-driver transistors are biased from the +15 V supply through base resistors so that the hold current in steady state is well within the relay coil rating.

Circuit note:

The diode clamp across each relay coil provides the standard back-EMF suppression to protect the driving transistors. The clamp diode rating is at least 1.5× the maximum reverse voltage expected at the collector of the driver transistor.

From the Zeilenbasierung (row addressing):

After completion of the Einzel (single-shot) run described in Section 5.1.1.1, the row-address decoder resets to address 0 so that no relay is energized in the idle state.
The next cycle address is loaded from the Funktionsplan register and presented to the relay-address decoder at the start of the IC phase of the subsequent cycle.

[page 54: figure only]

Bild 63 — Circuit diagram of the Zeitgeber (timing generator) unit.

Accompanying text:

The relay coil current is limited through the control transistors. The relay contact is closed when the transistor is driven to saturation by the Funktionsplan address logic.

Sub-section: 5.1.1.3 Betriebsschalter (Operating Mode Switch)

The Zeitgeber (timing generator) in the RA 741 provides the following timing signals:

IC-phase timing: A monostable multivibrator (one-shot) triggered by the “Null” command produces a pulse of programmable width T_IC. At the end of the IC pulse, the machine transitions automatically to “Rechnen” (if “Folge” mode is active).
Rechnen-phase timing: A second monostable produces a pulse of programmable width T_R. At the end of T_R, the machine either:
- Transitions to “Pause” (if a Pause time T_P > 0 is programmed), then returns to “Null” to begin the next cycle; or
- Returns directly to “Null” (if T_P = 0).

The timing is referenced to the system clock derived from the mains frequency (50 Hz) to ensure long-term accuracy of the cycle period.

The Zeitgeber output lines connect to:

The relay-driver stages for P5 (IC relay) and P6 (Rechnen relay)
The external sync output on the rear panel
The display-enable (Anzeigefreigabe) gate

Relay timing specifications:

Relay operate time (from drive signal applied to contact closure): ≤ 5 ms
Relay release time (from drive signal removed to contact open): ≤ 3 ms
These times are included in the dead-time margins built into T_IC and T_R so that a minimum of 10 ms is reserved for relay settling before the next phase begins.

Relay output signals:

The relay-state outputs are available as TTL-level signals on the rear-panel connector for use by external equipment (oscilloscopes, recorders, digital systems) to synchronize data acquisition to the computing cycle.

Page 55

[page 55: circuit diagram (Bild 49 — Circuit diagram for Relay 2) with accompanying text]

The text accompanying the diagram reads as follows:

Relay 2 Interconnections

With the function selector switch on Table 17, one can set the interconnection possibilities for Relay 2 in various ways (see also the corresponding entries in section 4.1.12). The relay is actuated by the comparator output of Relay 2. The latch function is set with the following conditions for the relay interconnections shown in Table 17:

at 4.1.12 — switch position for enabling the holding circuit of the relay
at 4.1.16 — switch setting for sampling position

The connection diagram also shows the feedback path in the quiescent condition. With the relay activated, the sampling of the relay-comparator is connected via the appropriate contact group.

Bild 49 — Circuit diagram for Relay 2

Page 56

[page 56: two circuit diagrams]

Bild 50 — Circuit diagram for Relay 3

Bild 51 — Circuit diagram for Relay 4

The lower diagram (Bild 51) includes a note:

After pressing the Table 57i drive-enable key, the relay is set if the input voltage of the comparator — Relay 4 — has the correct polarity. The relay can also be set or released by the appropriate button on the operating panel.

Bild 51 — Circuit diagram for Relay 4

Page 57

5.1.1.7 Automatic Holding during Overranging

The automatic holding function during overranging is described as follows:

If one of the inputs of the operational amplifiers of the machine receives a voltage that exceeds the maximum permissible input-voltage range, an overrange signal appears, and the computer is automatically switched to the hold mode. The hold condition persists until the overrange condition has been cleared.

The switchover occurs via the “ÜS” (Overrange) output signals from Relay 1, which are connected to the comparator inputs of the relay circuits. The comparator in each relay circuit monitors the sign of the output voltage and triggers the relay whenever the polarity is such as to cause overranging.

The automatic hold function is activated when Table 57i shows:

at 4.1.18 — the automatic hold switch is in the “on” position

The circuit shown in Bild 52 illustrates the automatic hold arrangement:

Bild 52 — Circuit diagram for automatic hold

When an overrange condition occurs, the relay contact interrupts the compute condition, transferring the integrators to the hold state. Once the overrange is cleared, the machine automatically returns to the compute mode.

5.1.1.8 Static Pilot

The static pilot is a special feature allowing the following functionality: If the “Pot. Einst.” (potentiometer set) key has been actuated (briefly pressed), a zero-voltage test function is applied via the appropriate relay contact in Bild 52. With the relay contact thus set, the integrator outputs are checked to confirm that their output signals during the potentiometer-set phase attain the correct initial conditions.

The static pilot function checks that:

the integrators hold their initial conditions exactly during the pot-set phase
the output signals of the integrators match the preset values to within ±0.1% of full scale (FS)

In the dynamic (running) phase, this check acts to confirm that no static errors have arisen during a preceding compute run.

Bild 52 — Circuit diagram for automatic hold with static pilot

Page 58

[page 58: two circuit diagrams]

Bild 69 — Circuit diagram during potentiometer setting

Bild 70 — Circuit diagram during static pilot mode

The upper diagram (Bild 69) shows the relay and switching arrangement during potentiometer setting. The lower diagram (Bild 70) shows the configuration during static pilot checking with all integrators in the hold state.

Page 59

Relay Operation During Static Pilot Mode

With reference to Table (Bild 70) and the following notation:

at 4.1.16 — the relay comparator input is connected through the relevant node
at 4.1.18 — the automatic hold input is connected

The following machine states result:

Switch position	Function
ÜS	Overrange signal present → machine transfers to Hold
0	No overrange → normal operation

After pressing the “Pot. Einst.” (ZV) key, the machine switches from Relay 1 through the relay chain, and the output voltages of the integrators are compared. The FS-Relais (full-scale relay) is actuated as follows:

at 4.1.18 — produces the test output voltage which is applied to the comparator input
at 4.16.18 — routes the comparator output to the relay coil

The product of these relay interconnections yields a logic output as follows:

e(t) = e(t₀) — k₁ · t₁ (for t₁ within one iteration step)

After pressing the “Pot. Einst.” button, Relay 2 is actuated when the output of any integrator exceeds ±0.1 V (1% of full scale for the 10 V machine). The comparator threshold is thus set internally to ±0.1 V (or ±0.03 V for the 30 V machine).

The amplifier-relay interconnection chain then acts as follows:

e(t) = a₁ · f(t) + … + aₙ · fₙ(t)

The relay function during the automatic-hold and static-pilot modes is shown in Bild 71.

Bild 71 — Circuit diagram: overranging relay arrangement

Page 60

Machine Power Supply Input Arrangement

The power supply input arrangement to the machine allows the following voltage combinations (115 V, 127 V, 220 V, and 240 V AC, 50 Hz) to be selected. It is connected at the factory to the voltage indicated on the type plate. A change of supply voltage requires reconnecting the mains terminals on the supply unit.

The generated bus voltages produce a regulated supply that is distributed to all modules within the machine. Two supply voltages are used on the backplane:

SYN — the synchronisation supply rail
Fg — the reference (“frequency generator”) supply rail
PB — the panel bus supply rail

Through two diode bridges, the available supply current has the following characteristics: if a module draws excess current, the voltage at that node is clamped by the diode arrangement to prevent damage.

Bild 74 — Distribution of the supply voltage −30 V

Bild 75 — Distribution of the 400 Hz supply voltages

Bild 74 shows the −30 V supply routed through the backplane to the modules. The three rails (SYN, Fg, PB) are each separated to allow independent current limiting.

Bild 75 shows the 400 Hz reference-voltage distribution — used for the function generators and comparator reference circuits — routed to SYN, Fg, and PB separately.

Page 61

Supply Voltage Distribution — Additional Rails

Bild 74 — Distribution of the supply voltage −30 V

The −30 V rail is routed from the power supply unit through the backplane to each module slot. Current-limiting resistors and diodes protect individual modules.

Bild 75 — Distribution of the 400 Hz rectified supply

The 400 Hz supply is rectified and distributed through the backplane as a smoothed DC rail for those modules requiring it.

Bild 76 — Distribution of the redundancy supply

A redundancy supply is provided so that, in the event of a primary rail failure, the secondary (backup) supply takes over automatically. The switchover is performed by relay contacts that monitor the primary supply rail voltage. If the primary rail drops below threshold, the relay transfers the load to the backup supply within one half-cycle.

Bild 77 — Distribution of the lamp supply

The lamp supply is a dedicated low-voltage rail used exclusively for panel indicator lamps and display backlighting. This rail is separate from the logic and analog supply rails to prevent lamp-switching transients from coupling into sensitive analog circuits.

Page 62

Table 11 — Fault Location Table

Fault Description	Possible Cause	Evidence	Remedial Action
1. Machine does not respond; no display active after power-on	a) Mains plug	—	Check mains plug
	b) Mains switch faulty	Art. 42	Replace mains switch
	c) Fuse blown	—	Replace fuse
2. Machine power-on display shows no indication; potentiometer functions normally before one of the PA-Relais lamps lights	a) Potentiometer set lamp absent	—	Check potentiometer internally
	b) Fuse — PA-Relais	Art. 43, Pos. 1, 5	Replace fuse
	c) Failure of individual PA elements	—	Disconnect internally
	d) Faulty relay	—	Replace relay
3. Single operational amplifier does not operate correctly after Einzel-Schrittbetrieb (single-step mode)	a) Amplifier function switch	—	Lamps: replace lamp
	b) Amplifier range relay	—	Replace relay
4. Single operational amplifier gives incorrect result after single-step run	a) Verifier defective	Einzel-Schrittbetrieb (single-step mode) indication shows	Verifier: replace
	b) Amplifier failure	Incorrect result in single-step run	—
	c) Wiring fault	—	—
5. Comparator does not trigger correctly; relay does not actuate	a) Verifier defective	—	—
	b) Spannung (voltage) control	a) Threshold control at a: Pos. 8	—
	c) Relay contact	—	—
6. Individual Overrange indicator lights incorrectly (false overrange)	TG 20 defective	—	Replace TG 20
7. Oscilloscope display — no signal visible; Potentiometer FG 30 only	Each Einzel output via FG/Oszi switch shows —	Disconnect internally; check each FG	Replace FG internally

Page 63

Table 11 — Fault Location Table (continued)

Fault Description	Possible Cause	Evidence	Remedial Action
8. Entire Steckrahmen (module frame) FG 20 fails; Gesamtausfall (total failure)	All outputs fail simultaneously	Steckrahmen (module frame) FG 20	Replace module frame, Art. 4.5.3
9. Individual Steckrahmen FG fails; defective module cannot be located	—	a) Signalling lamp absent	Art. 11
		b) All Dioden (diodes) affected	—
		c) Abgleich (trimming) potentiometer	—
		d) Replace Chopper	Chopper: replace; Art. 4.3.2
10. Relay (Haltebetrieb) relay does not actuate	a) Spannung (voltage) missing	Static Steuerspannung (control voltage) not appearing	Verifier: replace
	b) Wiring open-circuit	—	—
	c) Netzspannung (mains voltage) defective	—	—
	d) Relay defective	—	—
11. Die Haltebetrieb-anzeige (Hold indicator) does not illuminate	Anzeige FG/A (FG/A indicator)	—	Art. 4.3.2
12. Die Haltebetrieb-anzeige cannot be switched off	a) Anzeige remains on (defect)	—	—
	b) Spannung 20 V missing	a) Points E, 4	Art. 4.5.2
13. Die Redundanzspannung (redundancy voltage) does not actuate	TG activated	Spannungsausfall in Redundanzgerät (voltage failure in redundancy unit)	Art. 4.5.1
14. Repeating (repetitive) operation does not function correctly; no repetition	a) Haltebetrieb (hold mode) defect	—	Art. 17
	b) Spannung 20 V missing	—	—
	c) Relay defective	—	—
15. Single operational amplifier gives incorrect result; all other amplifiers operate normally	Steckrahmen (module frame) — see applicable article	Each Einzel output via FG checked individually	Replace internally

Transistorisierter Tischanalogrechner RA 741 — Beschreibung

CONTENTS

TABLES

DIAGRAMS

NOTES

1. TECHNICAL OVERVIEW

1.1 Field of Application

1.2 Delivery Scope and Order Designations

1.3 Technical Specifications

1.4 Structure and Function

1.4.1 Enclosure

Page 19

Integrator Characteristics

Page 20

Page 21

Page 22

Control Panel Functions

1.4.2.2 Coefficient Potentiometers

Page 23

1.4.2.3 Generating Errors of a Function Generator

Fig. 26 — Frequency response of the function generator output (no averaging)

Fig. 27 — Frequency response of the function generator output (with averaging)

Page 24

1.4.2.5 Function Generators

1.4.2.6 Kompensators

Page 25

Page 26

Table 2 — Basic Computing Elements Available in the RA 741

Page 27

Front Panel Controls — Potentiometer Functions

Page 28

Table 4 — Function of the Control Switches (→ f and y)

1.4.4 Priorities for Output Elements

Page 29

Page 30

2. BETRIEB (OPERATION)

2.1 Switching On the Machine

2.1.3 Connection to Output Elements

Page 31

Switching Sequence for Computing

Page 32

Page 33

2.3.1 Coefficient Potentiometer Programming

2.3.2 Functions of the Potentiometer Banks

Page 34

2.3.2.2 Setting Up and Programming

Page 35

Page 36

TABLE 3

Table II B

Variable Functions

[page 39: figure only]

[page 40: figure only]

2.4 Operating Modes

2.4.1 Betriebsschalter (Operating Mode Switch)

2.4.2 Betriebsarten-Schalter (Mode Selector)

2.4.3 Potentiometer-Schalter (Potentiometer Switch)

2.4.4 Schnelllauf und Zeitmaßstab (High-Speed Operation and Time Scale)

2.4.5 Oscilloscope Display in Computing Runs

2.4.5.1 Setting Up the Display

2.4.5.2 Superimposition of Oscilloscope Traces

2.5 Automatic Potentiometer Setting

3. Maintenance

3.1 Prüfung der Anlaufgenauigkeit und Einstellgenauigkeit (Checking Start-Up Accuracy and Setting Accuracy)

3.2 Prüfung der Stromversorgung (Checking the Power Supply)

3.3 Prüfung der Steckeinheiten (Checking the Plug-In Units)

3.3.1 Regelbare Verstärker (Adjustable Amplifiers)

3.3.2 Multiplier-Instrumente (Multiplier Modules)

3.3.3 Prüfung der Koeffizienteneinstellwerke (Checking the Coefficient-Setting Units)

4. Replacement (Instandsetzung)

4.1 Fehlersuche und Fehlerursache (Troubleshooting and Fault Finding)

4.1.1 Austausch und Einbau von Steckeinheiten (Removing and Installing Plug-In Units)

[page 47: figure only]

[page 48: figure only]

5. Betriebsunterbrechungen (Operating Interruptions)

5.1 Betriebsart (Mode of Operation)

5.1.1 Automatische Funktionsabläufe (Automatic Function Sequences)

5.1.1.1 Pause

5.1.1.2 Registriergeräte (Recording Instruments)

5.2 Betriebsabläufe der Steckeinheiten (Operating Sequences for Plug-In Units)