Designer's Manual for Circuit Design by Analog/Digital Techniques
DESJGNERS ' M5IWAL
FOB
CIRCUIT DESIGN BY ANALO~;/DTGI~LTECHNIQUES
C h a r l e s H. Beck and Ming H. Kuo
Department of E l e c t r i c a L E n g i n e e r i n g
'July 1970
for
TABLE OF CONTENTS
Page
INTRODUCTION
1.1
11.
References
DESIGN CRITERIA
2.1
2.1.1
2.1.2
2.1.3
2.2
2.3
2.4
2 5
2.6
2.7
Hardware Requirements
Analog Computer section
Digital Computer Section
Linkage System
Software Requirements
.
Hardware-Software Trade-off Possibilities
Performance Indices
Data ~equirements
Design Flow Diagram
References
111. RECOMMENDED PRACTICES
Guidelines for Recommended Analytical Methods
31
IV
3.1
Indirect Analog Simulation of Linear Circuits
3.1.2
Modeling Nonlinear Semiconductor Devices
3.1.3
3.1.4
3.2
3 3
3.4
35
Nonlinear Function Generation
Direct Design of Linear Dynamic Circuits
Hardware Design, Maintenance, and Diagnostics
System Management
Data Display
References
. REPWSENTA.TTVE DESIGNS
4.1
Representative Methods
4.1.1
Direct Design Example
Network Structure Optimization
4.1.2
4.1.3
4.1.4
4.2
43
4.4
4-2
4-7
Nonlinear Network Design
4-15
Network Design Using NASAP Sensitivity Evaluation 4-26
Interpretation of Approach
4-35
Limitations of Techniques
C-36
References
1-37
LIST Oi;' PIGbTZS
Page
2
-
Tulane Hybrid Computer System
2-3
'2-2.
Flotl diagram f o r model development using an
anal~g/dj.~ital
technjque
2-3.
Flow diagram f o r network tiesign using an
analog/digita.l l?ASAP technique
2-4.
Flow diagram f o r t r a n s i e n t ana,lysis using an
a n a l o g / d i g i t a l NASAP technique '
2-14
3-1.
Linear t h i r d order R-L-C
3-3
2
Flow graph representation of the c i r c u i t i n
Figure 3-1
3-4
Computer diagram f o r t h e breadboard simulation of
t h e c i r c u i t - i n Figure 3-1
3-3
Flow graph representation of the mathematical model
of Equation (3-4)
3-6
Conventional analog computer diagram f o r the mathematical model of Ecyation (3-4)
3-6
3-3.
3-4.
3-5.
circuit
36.
Equivalent flotr graph representation of t h e mathemtical
model of Equation (3-4)
3-7
3-7.
Equivalent analog computer dizgram f o r t h e r a t h e matical model of Equation (3-4)
- 7
3-8.
Breadboard separation model f o r t r a n s i s t o r
simulation
3-9.
RC c o l l e c t o r load output stage
3-12
3-10. Analog computer simulation of RC load
3-32
'3-1P. M e n d e d Ebers-Moll Transistor model
3-13
3-32. C i r c u i t of a grounded emitter t r a n s i s t o r amplifier
3-15
3-13. Conventional analog computer diagram f o r a grounded
emitter t r a n s i s t o r a n p l i f i e r
3-16
3-11;. TuLane Hybrid Computer System
3-23
4-1.
4-3
Hybrid Compwter Block Diagram a n d C i r c u i t Schenatic
LIST 03' FPGUFES
Page
4-2.
Flow Chart fo-r I l l u s t r a t i v e Design Example
4-3
4-3.
Optimum dynamic resj?onse f o r a f i r s t - o r d e r lowpass f i I @ e r
4-6
4 -4.
Hybrid Computer Bl.ock Diagram f o r System Modelin4
4-9
4-5.
Examples of optimum d i r e c t design of various order
systems f o r a hard-limited c r i t e r i o n f u n c t i o n
4-11
Examples of optimum d i r e c t design of various order
systems f o r a second-order c r i t e r i o n f u n c t i o n
4-12
Exmples of optimum d i r e c t design of various order
systems f o r a delayed hard-limited c r i t e r i o n f u n c t i o n
4-13
Grovth Model f o r R e a l i z a t i o n of Model S t r u c t u r e
Modification
4-14
4-6.
4-7.
4-8.
4-9.
Block Diec?grmf o r Nonlinear System Fodel
4-10. Single Valued Nonlinear System Model C h a r a c t e r i s t i c s
4-11. Tulane Hybrid Computer System
4-13. Hybrid Computer Block Diagrani f o r D i r e c t System
Modeling
4-14. Perf o m n c e Index ($IISE) Mezsurements f o r Various
Pararfieter P e r t u r b a t i o n s
4-15. Functional Block Diagram f o r Hybrid Computer
Optimization Including S e n s i t i v i t y Functions
4-26. Block Diagram f o r X A G - ~ ~ b r i d
Network Design
4-17. Schematic Iliagram of an RC Coupled FET Aniplif i e r
4-18. WSAF Coded Equivalent C i r c u i t f o r an RC Coupled
FST Amplifier
LIST OF TAELES
3-1.
I n d i r e c t analogs of passive l i n e a r c i r c u i t elements
3-2
4-1. Tabulatea output frorn d i r e c t design of e. f i r s t - o r d e r
lo$?-pass f i l t e r
.
4-8
Chapter I
I N T R ODUCTI Oi?
Coniputer techniques a r e e s s e n t i a l t o t h e e f f i c i e n t design of complex
electronic c i r c u i t s .
This i s e s p e c i s l l y t r u e i n t h e case of i n t e g r a t e d
c i r c u i t s s i n c e it i s o f t e n d i f f i c u l % and expensive t o p r e d i c t c i r c u i t
response a c c u r a t e l y by experimental '%readboard" t e s t i n g .
C e r t a i n hybrid
techniques o f f e r t h e f a s t s o l u t i o n times of t h e analog computer f o r dynamic analysis, automated problem s e t u p on t h e analog c o n t r o l l e d by d i g i t a l
subroutines, t h e c a p a b i l i t y of including a c t u a l p h y s i c a l c i r c u i t devices
i n %he simulation thus reducing t h e d i g i t a l memory and t h e number of
nonlinear analog computing elements required, and t h e d e c i s i o n and a r i t h metic c a p a b i l i t i e s of t h e d i g i t a l computer required f o r optimization and
s e n s i t i v i t y calcul.ations.
The a k e i l a b i l i t y of d i g i t a l computer subroutines
and such methods as t h c s e based on t h e s e p a r a t i o n p r i n c i p l e c u t t h e programming time formerly required i n t h e case of analog compu-tatioo.
Hybrid techniques applied t o system design r e q u i r e t h a t t h e system
simulation and t h e various computations required t o e f f e c t t h e design be
p a r t i t i o n e d and t h a t each operation be a p p r o p r i a t e l y assigned t o e i t h e r
t h e a n a l o g . o r t h e d i g i t a l coniputer.
A s a r e s u l t of t'ne e f f o r t i n com2uter-
aided design a t Tulane University, a hybrid computer system kas been
developed, and hybrid techniques have been applied t o c i r c u f t design. These
#1,2
techniques serve a s u s e f u i supplements t o t h e b e s i c d i g i t a l NASAP
\
-S y ~ t e i n-kpplicat5ons -Progrem Zeveloped by NASA/
-Network Analysis
35
E l e c t r o n i c s Reseercb Center.
1-2
program f o r t h e purpose of designing nlociels of e l e c t r o n i c devices, performing tra-nsient a n a l y s i s of l i n e a r and nonlinear c i r c u i t s , and t h e
d i r e c t design of dynamic systems based on design s p e c i f i c a t i o n s .
I n most computer s t u d i e s of p h y s i c a l systems, assumed ma'themtical
models of t h e systems a r e used s o Ynat o f f - l i n e computations can be
performed.
The absehce of a c c u r a t e models p r a c t i c a l l y precludes any
systermtic a n a l y t i c a l treatment and r a i s e s q u e s t i o n s about t h e v a l i d i t y
of computerized designs.
This r e p o r t concerns r e s u l t s from employing
high-speed, fully-automated techniques f o r obtaining models of systems
based on time-domain measurements o r s p e c i f i c a t i o n s .
These techniques
do not r e q u i r e t h e u s u a l assumptions such a s low order, a p r i o r i knowledge of moclel form, f i x e d parameters, minimum phase, and l i n e a r i t y .
This manual i s p a r t of a s e r i e s covering design a r e a s which
include aerospace c i r c u i t s , instrumentation c i r c u i t s , communication
c i r c u i t s , f i l t e r s , e t c .3
These manuals have been developed t o a s s i s t
i n t h e use of NASAP and various supplementary techniques.
-
1.1 References
1. McNamee, L. P. and H. Potash, "A U s e r ' s Guide and Programmer's
Manual f o r NASAP", Report No. 68-38, University of C a l i f o r n i a ,
Los Angeles, August 1968.
2.
Rooney, C; J. and E. IJ. Weber, "Application of NASAP t o t h e Design
of Comnlunication C i r c u i t s , " F i n a l Technical Report, Contract
NAS 1 2 - 6 ~ ,I l l - i n o i s I n s t i t u t e of Technology, Chicago, Ill.,
May 1969
3. Happ, W.W., "Flowgraph Techniques f o r Closed Systems," IeEE
-
Transactions on Aerospace and E-l e c t r o n i c Systems,
AES-2, no. 3, pp. 252-264, May 1
.-
DESIGN CRITZE33A
This c h a p t e r covers m a t e r i a l on t h e b a s i c design c r i t e r i a which
r e l a t e t o t h e hardware system,
software, and design methods used during
t h e course of t h i s study.
2.1
Hardware Requirements
A hybrid computer system c o n s i s t s of a general-purpose d i g i t a l .
computer and a general-purpose analog computer interconnected through a
conversion and c o n t r o l linkage system p l u s various input/output devices.
I
This type of computing system has d i s t i n c t advantages and disadvantages
compared with e i t h e r Fure analog o r d i g i t a l c o q u t e r s f o r c e r t a i n c l a s s e s
of problems.
It i s remarkable t h a t most of t h e d e s i r a b l e c h a r a c t e r i s t i c s
of both analog and d i g i t a l computers a r e ccnserved i n h j b r i d systems1 7 2
.
Minimal requirements f o r hybrid computer hardware a r e a s follows:
1) An analog computer with buffered d i g i t a l c o n t r o l l e d
parameter u n i t s and i n t e g r a t o r mode and time s c a l e
control, high-speed overload d e t e c t o r s , and d i g i t a l
c o n t r o l l e d patching of a p o r t i o n of t h e analog program.
2) A d i g i t a l computer with buffered i n p u t and output
registers.
3) A linkage system with a multiplexed A-D converter;
buffered D-A, codverters ; and control, i n t e r r u p t ,
trunk, and sense l i n e s .
The hybrid computer system a t Tulane University c o n s i s t s of f o u r a1 W-48,
two mi 16-~LR,
an6 one W I 23=
analog computer, a Univec AN/GSK-1
2-1
d i g i t a l corflputer, and a f l e x i b l e linkage system.
The hybrid comyuter
system diagrzm i s shown i n Figure 2-1.
2.1.1
-
Analog Conrputer
Section
-.
Analog computation i s involved b a s i c a l l y with time dormin information
i n continuous fonn.
Since t o t a l solution times a r e conlrnonly of t h e order
of a few rrilliseconds, an o s c i l l o s c o ~ ei s often used t o display t h e
..
continuous dynar;lic output response f o r photographic recording.
Direct
v i s u a l observation i s possible with a storage oscilloscope, o r i t e r a t i v e
solutions can be executed t o provide f o r viewing on a non-storage
oscillloscope ,
Representation of information i n con'tinuous forin eliminates such
problems as rou.nd-off e r r o r which i s S O troublesome i n i t e r a t i v e comput a t i o n s using d i g i t a l computers.
The accuracy of analog computation
i s limited by the precision with which a quantity can be represented
and measured on t h e com-puter.
Analog computer accuracy i s ordinarily
limited t o approximately 0.015 of f u l l - s c a l e by t h e tolerance of computer
components.
This type of information can be transmitted and used without
requiring c o s t l y devices such a s the r e g i s t e r s which provide access t o
t h e main memory u n i t of d i g i t a l computers, hence time-sharing of hardware i s unnecessary f o r many problems.
Because of t h e continuous manner
and economy of t h i s type of computation, it i s common p r a c t i c e t o use
separate computing elements t o implement every s i m i l a r mathematical
function of d i f f e r e n t arguments as well as t h e d i f f e r e n t functions of a
given ar,.;ument.
T h i s p a r a l l e l or sim~ltaneousoperation of a11 compxking
elements such as smmers, integrators, and n l ~ l t i p ~ i e ri s the prilrlary
,
reason f o r t h e high co~tiputingspeed t h a t i s p o s s i b l e with analog
computers.
P r s c t i c a . l l y instantaneous exec-o..lion i s l i m l J ~ e dmainly by
t h e bandwidth of t h e cor~putingelements r a t h e r than by t h e complexity
of t h e problem.
D i g i t a l c o n t r o l l e d parameter
u n i t s (DPU) have been added t o t h e
computLng u n i t s of t h e analog computers t o provide f o r automatic
adjustment of c i r c u i t and performance index parameters, s c a l i n g of t h e
analog program, and weighting f a c t o r s used i n t h e optimization programs.
Mode and time s c a l e i n t e r f a c e s hzve a l s o been developed t o provide f o r
automated sensing of t h e nonlinear operation of any a m p l i f i e r computing
unit.
D i r e c t c i r c u i t design including autoiiated s t r u c t u r e manipulation
has n e c e s s i t a t e d t h e development of d i g i t a l c o n t r o l l e d patching of
a p p r o p r i a t e p o r t i o n s of t h e analog program.
2.1.2
D i g i t a l Computer Section
The d i g i t a l cornputer provides t h e c a p a b i l i t y of performing a r i t h -
metic computations, l o g i c a l decisions, d a t a storage, and m o d i f i c a t i c n of
a program on t h e b a s i s of computations.
These f e a t u r e s permit t h e
c a p a b i l i t y of using s t o r e d programs, nonlinear f u n c t i o n generation, and
time d e l a y of a sampled waveform.
An a d d i t i o n a l important c h a r a c t e r i s t i c
i s t h e inherent p r e c i s i o n which i s l i m i t e d only by t h e number of b i t s
used i n t h e memory.
Computational accuracy i s f u r t h e r dependent on t'ne
p a r t i c u l a r numerical algorithm used.
The Univac d i g i t a l computer, origlna.ily used f o r USAF m i s s i l e
guidance, was obtained a s Goverment surplus property.
The c h i e f merit
of t h i s comyxber i s i t s high r e l i a b i l i t y resulCing from t h e recpirements
of t h e T i t a n I m i s s i l e weapons system.
It does have s e v e r a l buffered
input and output r e g i s t e r s which provide f o r t r a n s f e r of t h e necessary
d a t a an6 c o n t r o l -information.
2.1.3
Linka,ge System
P
The conversion and control linkage system expands t h e storage
capacity of t h e d i g i t a l computer t o e f f e c t i v e l y include t h e analog
..
computer znd associated peripheral. analog devices and systems.
In
addition, t h i s i n t e r f a c e permits t h e d i g i t a l computer t o perform many
of t h e functions of a human operator r e l a t i v e t o t h e analog computer
and associated equipment.
This u n i t provides f o r encoding and decoding of information which
i s transmitted between portions of t h e systen, f o r logic operations, and
f o r appropriate routing of c o n t r o l and i n f o m , t i o n channels.
system has t h e following t h r e e modes of operation:
and l o g i c .
The linkage
control, conversion,
The c o n t r o l mode may take on any of t h r e e possible forms.
I n mode CMXXX, c o n t r o l s i g n a l s a r e passed from t h e A-register on t h e
d i g i t a l computer t o t h e anslog i n t e g r a t i o n mode c o n t r o l inputs s p e c i f i e d
by t h e t h r e e l e a s t s i g n i f i c a n t d i g i t s of t h e linkage mode s t a t u s word.
I n mode CTXXX, con-&rols i g n a l s a r e , p a s s e d from t h e D-register t o t h e
analog i n t e g r a t o r time s c a l e c o n t r o l inputs specified by t h e t h r e e
l e a s t s i g n i f i c a n t digi-ics of t h e linkage mode s t a t u s word.
I n mode CPXXX,
c o n t r o l s i g n a l s a r e passed from t h e S - r e g i s t e r t o t h e DPU s p e c i f i e d by
t h e t h r e e l e a s t s i g n i f i c a n t d i g i t s of t h e linkage mode s t a t u s word.
I n t h e conversion mode, both A-D and D-A operation a r e possible.
I n m d e ADXXX, address signa1.s a r e passed from the D-register on t h e
d i g i t a l conlpu-l;er t o the m ~ ~ l t i . p l e x e r .Linkage mode s t a t u s word AI)PXX i s
used t o c o n t r o l t h e operation of t h e A-D converter.
I n nlode DAXIC<,
address s i g n a l s from t h e D-kegister cause t h e D-A converter specified
by t h e t h r e e l e a s t s i g n i f i c a n t d i g i t s of t h e Linkage mode s t a t u s word
t o be s e l e c t e d .
converter
The S - r e g i s t e r supplies t h e data word t o t h e D-A
.
The l o g i c mode provides t h e a b i l i t y f o r t h e d i g i t a l computer t o
send o r receive logic s i g n a l s ,
This provides an a l t e r n a t e means f o r
c o n t r o l l i n g t h e operation of t h e analog computers,
Logic s i g n a l s such
as synchronization and overload s i g n a l s originating on the analog
computers can be sensed by t h e d i g i t a l computer t o provide i n t e r r u p t s .
2.2
Software Requirements
Since a hybrid computer provides f o r simultaneous use of an analog
computer and a d i g i t a l comp-ater, hybrid systems o f f e r a l l t h e advantages
of both analog and d i g i t a l computers.
I f t h e d.igita1 computer has a t
l e a s t a 32K core memory, then it can a l s o serve as a stand-along d i g i t a l .
computer t o provide f o r execution of a d i g i t a l computer-aided c i r c u i t
analysis pr0gra.m such a s NASAP.
However, since most hybrid computer
systems c u r r e u t l y have no more than 1 6 ~
core memory, t h e i r appropriate
use r e l a t i v e t o e x i s t i n g computer-aided design programs i s supplementary
i n nature.
For c i r c u i t ' d e s i g n problems where no synthesis procedures a r e a v a i l able, optimiz.ation Lechniq~iescan often be used t o advantage
.
since
optimization requlres t h a t parameters be r e p e t i t i v e l y adgusted u n t i l t h e
h e s t design has been obtained, t h e number of i t e r a t i o n s may be l a r g e .
Dynamic c i r c u i t simulation p e r f o r ~ e don t h e analog computer p o r t i o n of
the hybrid system i s by f a r the most e f f i c i e n t portion of t h e computation.
Since t h e analog con~putere x e c u t l o ~time i s independent of c i r c u l t
corrlplexity o r t h e order of t h e system, one means of accomplislzing a
reduci;ion i n execui;ion time i s t o e q h a s i z e t h e analog p o r t i o n of tlie
c i r c u i t design algorithm.
This high speed c h a r a c t e r i s t i c of t h e analog
+
p o r t i o n permits t h e increased use of elementary optimization techniques,
which r e q u i r e l a r g e r numbers of i t e r a t i o n s , t o achieve f a s t e r s o l u t i o n s
than p o s s i b l e with more e f f i c i e n t a l l - d i g i t a l optimization technj.ques
which r e q u i r e f e v e r i t e r a t i o n s .
With simple optimization algorithms
t h e r e i s l i t t l e need f o r other than -chine
language programming.
Besides, t h i s makes it possible t o increase t h e e x e m t i o n e f f i c i e n c y
of t h e d i g i t a . 1 compt~terportion of t h e program.
The r e m i n i n g p o r t i o n
of t h e d i g i t a l computer program which p r i m a r i l y accomplishes c o n t r o l
operation can a l s o be appropriately w r i t t e n i n machine language trith
l i t t l e effort.
This unshphisticated programming requirement i s e s p e c i a l l y a e s i r a h l e
because i n d i v i d u a l hybrid computers d i f f e r considerably.
When automatic
I
patching of t h e analog p o r t i o n and u n i v e r s a l hybrid software become
commonly a v a i l a b l e a s i s t h e case f o r d i g i t a l computers, then t h e c s s e
f o r machine
programming
longer hold.
The programing
of t h e dynamic system simulation on t h e analog computer is accomplished
i n a simple and s t r a i g h t forward manner a s described i n Che,pter 111.
In general, hybrid software i s required t o provide a convenient
means f o r mechanizing s e t s of ordinary and/or p a r t i a l d i f I ' e r e n t i a l
e q ~ a t i o n s . Software f o r hybrid cornputation i s o f t e n required t o provide
f o r real-time and t i m e - c r i t i c a l operation.
Real-time operation is
required i n svch cases a s those where a c t u a l t r a n s i s t o r s and diodes serve
as canputing elements i n t h e netvork sinml8,tion t o represent corresponding
netlrork devices. The software mus5 a l s o assure synchronizatj.on of t h e
analog and dj.gita,l computer operation.
There must be provision f o r t h e
programmer t o control t i m e - c r i t i c a l computations f o r suita,bl-e opera,tions.
The major disadvantage of hybrid coriiputstion i s t h e requirement of
hardware-oriented real-time prograrming
.
2.3 Hardware-Software Trade-Off P o s s i b i l i t i e s
Exploitation of computer-aided c i r c u i t design techniques generally
s t a r t s with an assumed. mathematical model of t h e c i r c u i t t o be designed
s o t h a t o f f - l i n e co~nputationscan be perfom-ed.
It i s believed t h a t t h e
a v a i l a b i l i t y of accurate device models i s c r u c i a l f o r any systematic
a n a l y t i c a l treatment, and t h e absence of such models p r a c t i c a l l y precludes
t h e J u s t i f i a b l e use of t h e computer f o r c i r c u i t design.
It i s a l s o
d e s i r a b l e t o obtain t h e simplest possible device models of s u f f i c i e n t
accuracy s i n c e higher-order models limit t h e s i z e c i r c u i t t h a t can be
I
t r e a t e d using e i t h e r analog o r d i g i t a l computers.
Since execution time
f o r d i g i t a l c o m p t e r programs increases f o r higher order models, t h e
expense of computer-aided design may become economically p r o h i b i t i v e f o r
c e r t a i n types of c a l c u l a t i o n such a s those whlch involve optimization
techniques.
The programming of t h e c i r c u L t simulation on t h e analog computer Is
primarily accom2lished by s u b s t i t u t i n g analog computing elements f o r
corresponding elements o r parameters of t h e physical c i r c u i t being
stu-died. However, wher accurate
models a r e required, actual. physical
e l e c t r o n i c devices can a l s o be incLude3 a s computing elements i n t h e
c i . r c u i t simulation a s described i n Cha,pter 191.
2.4
Perf ormanee Indices--Computer-aided c!.rcccit
design uaua,ll.y involves a step-by-step process
. It i s often advantageous t o simulate t h e c i r c u i t
including t h e equiva.lei1-i; c i r c u i t r e p r e s e n t a t i o n s of a c t i v e devices 6-8.
5
of repeated a,aa>%ysis
The mode%,i s t h e n analyzed f o r a given s e t of parameter values, and t h e
r e s u l t s a r e cornpared w i t h t h e s p e c i f i e d design c r i t e r i a .
Based on t h e
f i n d i n g s of t h i s conlparison and t h e d e s i g n e r ' s p a s t experience, new
parameter values t h a t a r e expected t o improve t h e design a r e chosen.
A n i t e r a t i v e process i s continued u n t i l t h e prescribed t o l e r a n c e f i g u r e
i s met.
This technique r e q u i r e s involvement of t h e designer, end it
l a c k s throughput speed.
It appears t h a t r e l a t i v e l y few computer-aided techniques a r e a v a i l a b l e f o r d i r e c t c i r c u i t design..
If t h e c i r c u i t designer c o n s t r u c t s an
algorithm which accomplishes t h e required d e c i s i o n making process involved
i n step-by-step repeated a n a l y s i s and parameter adjustment, then an
automated d i r e c f , design i s possible.
This permits designers t o be f r e e d
from nluch Vnat i s r o u t i n e s o t h a t t h e i r experienced engineering judgment
can be d i r e c t e d t o e f f i c i e n t e f f o r t such a s evaluation of t h e f i n a l design.
I n obtaining t h e b e s t values f o r t h e model parameters, it i s necessary
t o e s t a b l i s h a comparison c r i t e r i o n o r perforr~lanceindex.
An obvious
* .
choice is an index based on t h e d i f f e r e n c e ( e r r o r ) between t h e a c t u a l o r
d e s i r e d t r a n s i e n t response and t h e t r a n s i e n t response of t h e model t o
the specified input.
The i n t e g r a l of t h e squered e r r o r (1,513)has been
used e x t e n s i v e l y i n t h i s p r o j e c t a s t r e l l a s t h e i n t e g r a l of t h e a b s o l u t e
error (IAE).
Other c r i t e r i a can a l s o be used with equal ease s i n c e an
a n a l y t i c a l s o l u t i o n i s not required 9
. The chosen performance index can
be computed on t h e analog c o m p t e r and returned t o t h e d i g i t a l p o r t i o n of
t h e system, o r it can be comgd-ted on t h e d i g i t a l corn2uter.
z a t i o n a.lgorithn opere,tes upon t h i s q u e n t i t y .
The optj.mi-
2.3 Data Requirements
The i n t e r n a l processes of e l e c t r o n i c devices a r e not of s p e c i f i c
i n t e r e s t f o r many c i r c u i t design problems, b u t r a t h e r t h e i n f l u e n c e on
e x t e r n a l performance.
I n t h e s e cases, device models only need t o
reproduce t h e d e s i r e d t e r m i n a l c h a r a c t e r i s t i c s .
Emphasis w i l l t h e n be
placed on obtaining t h e s i m p l e s t models which meet t h e required s p e c i f i c a t i o n s s u b j e c t t o c e r t a i n c o n s t r a i n t s such a s p h y s i c a l r e a l i z a b i l i t y
and t h e range of all-owable parameter values.
Input d a i a a r e i n t h e form of continuous time-domain input-output
measurements o r s p e c i f i c a t i o n s .
The network topology o r a m.thematical
model i s programmed on t h e analog computer as described i n Chapter 111.
2.6 Design Flow Diagram
The f i r s t s t e p ' i n t h e network design o r . d e v i c e modeling process i s
t h e s e l e c t i o n of a p o s s i b l e network o r device model.
The forrn of t h i s
I
model w i l l be influenced b y t h e s p e c i f i c a t i o n s of t h e problems, t h e
a v a i l a b l e technology, t h e experience of t h e designer, and t h e a l l o v a b l e
design techniques.
For d i f f i c u l t design p r o b l e m where no s y n t h e s i s
procedures a r e known, optimization techniques performed with t h e a i d of
computers have proven t o b e u s e f u l f o r obtaining t h e b e s t s e t of parame t e r s f o r a given model form.
An i t e r a t i v e process of repeated a n a l y s i s
and parameter v a r i a t i o n continues u n t i l t h e optimum s e t of parameters
i s i d e n t i f i e d f o r t h e i n i t i a l model.
This i s i l l u s t r a t e d i n t h e flow
dizgram of Figure 2-2.
If it i s v e r i f i e d a f t e r experimenting with t h e r e s u b t i e d e s 5 . g ~t h a t
t h e s p e c i f i c a t i o n s have been met, t h e n f a b r i c a t i o n i s an a p p r o p r i c t e
recornmenaation.
Otherwise, a new model must be s e l e c t e d and t h e p r o c e s s
Pa.ra.met e r and
S t r u c t u r e Ciptiali z a t ion
S'lV
ode1
[_-%ruc t u r e
.---
Network Synthesis
I
Figure 2-2, -
F l o ~diagrar! for ~ & e l .d evc!.opment
technique
using a n ~ ~ n e l . o ~ / d i g i t a l .
2-12
repeated u n t i l . t h e s p e c i f i c a t i o n s have been met.
This procedure as
applied t o net.i.lorlr. d e s i g n i s surrimarized i n t h e flow diagrstln of Figure 2-3.
Another technique which i s u s e f u l i n c i r c u i t design i s t h e conbined
analog/digilal-K~SAPtechnique f o r t r a n s i e n t a n a l y s i s .
This i s i l l u s t r a t e d
i n t h e flow d i ~ g r a mof Figure 2-4.
2.7
References
1.
Bekey, G I A . and W. J. Karpl-us, Hybrid Computation.
John WiPey and Sons, Inc
2.
Korn, G. A . and T. M. Korn, E l e c t r o n i c Analog and Hybrid Computers.
New York: McGraw-Hill Book Company, 1964,
.,
New York:
Gilbert, E. G., "A S e l e c t e d Bibliography on Parameter Optimization
Methods S u i t a b l e f o r Hybrid Computation," Simulation, v o l . 8,
pp. 3W-352, June 1967.
Wilde, D. J. and C. S. Beightler, Foundations of Optimization,
Engl.ewood C l i f f s , New Jersey:
Herskowitz, G. J., Computer-aided
- I n t e g r a t e d C i r c u i t Design.
York: McGraw-Hill Book Cornpany, 1963.
New
Angelo, E. 'J., Jr., J. Logan, and K. W. Sussmn, "The s e p a r a t i o n
technique: a method f o r simulating t r a n s i s t o r s t o a i d
i n t e g r a t e d c i r c u i t design," IEEE Transactions on Computers,
vol. C-17, no. 2, pp. 113-11q February 1966.
G m e l , H. K. and. B. T. Murphy, " C i r c u i t a n a l y s i s by quasi-anal.ogcomputation," IEEE Proceediogs, vol. 55, pp. 1758-1760,
October 1967.
B l a b a n P., and J. Logan, ''Analog computer simulation of semicondu.ctor c i r c u i t s , '' Proc SJCC, 1968.
.
Gilbert, E. G., "The a p p l i c a t i o n of hybrid computers t o t h e i t e r a t i v e
s o l u t i o n of o p t i r : ~ lc o n t r o l problems, '' Compu%ingMethods i n
----v-.
Optimization Problems. Conference Proceealngs,
Los Angeles,
m a k r i s h n a n and L. W. Neus-badt, eds. ) pp. 261ademic Press, 1.964.
Trallsfer
Evaluation
I
-1
Experimentation
r
IASAP Program
L
Transfer Function
Zvaluation
Function
Non2.inear
Characteristics
7
v
6
Figure 2-11.
3
Simu.la,tion
6--------------
Flcw dirgran for transient arizlysis ~ r s i n gan anal.og/cllgitnl
EiASAP iechniq1j.e.
Chapter 111
R%COI.~QEIDD
PRACTICES
GuZdelines f o r Recomnended A n a l y t i c a l Nethods
3.1 ---
This c h a p t e r p r e s e n t s m a t e r i a l concerning p r a c t i c e s which have been
found t o be u s e f u l during t h e course of t h i s work.
-
1 . 1 I n d i r e c t Analog Simulation
- of Linear C i r c u i t s
Mathematical. models f o r e l e c t r o n i c c i r c u i t s a r e based on Ki.rchhofffs
laws which d e s c r i b e t h e i n t e r - r e l a t i o n s between c u r r e n t s and v o l t a g e s i n
the circuits.
Passive l i n e a r c i r c u i t elements can b e represented a s
sho~ini n Table 3i1.
The c i r c u i t shorn i n Figure 3-1 can be modelei! on t h e analog c o q u - t e r
using t h e breadboard technique by s i m u l a t i n g t h e f o l l o w i n g s e t of
equations:
The flow graph r e p r e s e n t a t i o n of E q ~ a t i o n s(3-1))
(3-2), and (3-3) i s
given i n Figure 3-2, and t h e computer diagram f o r t h e breadboard s i m u l a t i o n
of t h i s circui-s
given i n Figure 3-3.
It i s seen t h a t t h e breadboard
technique r e t a i n s c i r c u i t topology, and t h a t t h e i n d i v i d u a l c i r c u i t
elements a r e pazameters of t h e s i n u l a t 2 o n .
This technique i s s a t i s f a c t o r y
f o r t h e a n a l y s i s of a c i r c u i t of known topology 1,2 ,
If input-odtpu-b informnation i s of i n t e r e s t f o r zero i n i t i s l c o n d i t i o n s ,
t h e n conventional. analog coxputer programing b8,sed on t r a n s f e r r e l a t i o n s
Figure
3-1.
Linear t h i r d o r d e r R-L-C
circuit
I..
Figure
Figure
3-2.
.3-4.
Flow graph representation of the circuit in Figure 111-1.
Computer diagram for the breadboard simulation of the circuit
in Figure 111-1.
i s preferred.
Since t h e NASA'$ program can be used t o deternine t h e
t r a n s f e r f u n c t i o n3
, it i s d e s i r a b l e t o use t h i s f e a t u r e of
to
o b t a i n t h e ma,thematica%.mod-el. For t h e c i r c u i t of F i p p ~ e3-1, t h e
t r a c s f e r f u n c t i o n f o r t h e voltage response a c r o s s t h e c a p a c i t o r irith
r e s p e c t t o an applied d r i v i n g function is of t h e form
The flow graph r e p r e s e n t a t i o n of Equations
(3-4) i s given i n Figure
3-4, and t h e computer diagram obtained by conventional analog computer
programming i s given i n Figure 3-3.
A n equivalent flotr graph t o t h a t
given i n Figure 3-4 f o r t h e mathematical xodel of Equation (3-4) i s
given i n Figure 3-6 and t h e corresponding analog coolputer di,e.gra,m i s
given i n Figure 3-7.
3.1.2
-
Modeling Nonlinear Semiconductor Devices
Hybrid computers a r e p a r t i c u l a r l y w e l l s u i t e d t o t h e a n a l y s i s of
l i n e a r and nonlineer dynamic c i r c u i t s and systems.
T&en accurate models
of a c t i v e devices a r e required, c o ~ s i d e r a b l eadvantage can be r e a l i z e d
by using actual. p h y s i c a l c i r c u i t devices a s computing elements i n t h e
analog cornputer p o r t i o n of t h e hybrid system.
For example, a given
t r a n s i s t o r o r an a p p o p r i a t e s u b s t i t u t e can be used a s a nonlinear
analog computing element which r e p r e s e n t s a dc model of i t s e l f i n a
breadboard o r quasi-analog t ~ p esimulation.
Tinie s c a l i n g t h e ac p o r t i o n
of t h e Zbers-Moll o r charge-control models by a f a c t o r k i s accomplished
by including feedback c a p a c i t o r s i n t h e simulation t h a t a r e k t i n e s t h e
corresponding junction capacitaoees
.
Figure
3-4.
Figure
3 -5. Coaventional. analog coi~puterdiagram for the mathematical
Flow graph representation of the mathematical model of
Equation (111-4).
model of Eq~iat*ion(111-4).
Figure
3-6. Equivalent flow graph representation of the methematical
mcdel of Equation (111-4).
Figure . 3-7.
Equivaleni; m a l o g corilputer diagram f o r the nlathematical
m c d e l of Equa,Lion (111-4).
This procedure named the separation technique by Angelo, Logan, a n d
Sussman (1968)
4
, i s based on t h e work of G m e l a,n2 Nurphy (3.967)'.5
t h i s technique it i s convenient t o vary c i r c u l t and device pararileters
Wit'ii
6,
.
perform s e n s j - t i v i t y analysis, and obtain optimum c i r c u i t designs based on
dynamic s p e c i f i c a t i o n s .
Total execution times of the order of m i l ~ i s e c o n d s
f o r a complete dynamic a n a l y s i s a r e possible regardless of t h e c i r c u i t
complexity since a l l analog computing elements operate simultaneously o r
i n parallel.
Progranlming time i s reduced over t h a t required for e i t h e r
analog o r d i g i t a l . computer-aided c i r c u i t analysis.
The instantaneous base current i n a t r a n s i s t o r derived f o r t h e extended
Ebers-Moll o r t h e charge-control model i s
q~
qr
T
bf
i s t h e forward componeni; of charge stored i n t h e base.
i s t h e reverse component of charge stored i n t h e base.
i s t h e e f f e c t i v e base recornhination l i f e t i m e f o r forward
injection.
Qr
i s t h e e f f e c t i v e base recornbination Icetime
injection.
C
i s t h e emitter junction t r a n s i t i o n region capacitance.
C
v
v
je
jc
ej
cj
f o r reverse
i s t h e c o l l e c t o r junction t r a n s i t l o n region capacitance.
i s t h e emitter junction voltage.
i s t h e c o l l e c t o r junction voltage.
A s u i t a b l e t r a n s i s t o r can be used a,s an analog computing element
which generates the portion of t h e nonlFnear I.ow frequency model represented by t h e f i r s t two t e r m i n Equa'cion (3-3).
13ased on the gross
assm$tj.on t h a t a l l l i f e t i m e s a r e equal, t'ne lev-frequency conponent of
3-9
t h e base current i s
This assumption of equal. l i f e t i m e s i s sa%isfa,c.toryunless t h e coLlec'tor
junction i s for1:ard biased.
I f t h i s i s t h e case, then t h e conventional
analog programing technique should be used.
The instanta,neous base
c u r r e n t can a l s o be expressed a s
If a l l expressions a r e time scaled according t o t h e r e l a t i o n s h i p
T = kt, then t h e r e r e s u l t s
The breadboard representa%ion f o r a time scaled simulation of a
t r a n s i s t o r is shor.~ni n Figure 3-8.
Assuming t h a t t h e voltage drop across
t h e sensing r e s i s t o r r i s sml-b compared with t h e voltage drops across t h e
t r a n s i t i o n region capacitances, t h e current through these capacitances i s
i =
k
- kcJe
dv
e3
dv
- kCjc dT
Cd
. (3-9)
The current through capacitance C i s
Summing the c u r r e n t s i n
cations (3-6), (3-9)) and (3-10) gives
Ecpati.on (3-31) i s equivalent t o Equation (3-8) i f
kr = C A r
(3-12)
Hence, t h e t r a c s i s t o r mods1 shown i n Figure 3-8 i s time scaled by a
, a,nd t h e e f f e c t i v e time-scaled l i f e time i s k.i.
'r
fac.tor C A r
Fipre
8 . Breadbcard separation model for transistor
simdlation.
Passive c i r c u i t co13ponents can a l s o be represented by sta,ndard
analog compu.ting el.ements.
Consider t h e RC load i l l u s t r a t e d i n Figure
3-9. This c i r c u i t ccan be siu~ubatedf o r dynzmic comnputation 8,s indicated
i n Figure 3-10.
The conventional analog computer met1106 of modeling a t r a n s i s t o r i s
based on t h e simulation of t h e extended Ebers-Mol-l model i l l u s t r a t e d i n
Figure 5-11.
I n t h i s case time-scaled diodes a r e used t o simulate t h e
junction n o n l i n e a r i t i e s .
The emitter and c o l l e c t o r currents a r e given by
and
where
T
i s t h e minority c a r r i e r excess charge stored i n t h e device.
T
is t h e reverse i n j e c t i o n charge c o n t r o l parameter.
f
r
The forward conduction current is
and t h e reverse current i s
The e f f e c t i v e base recombination l i e f t i m e f o r forward i n j e c t i o n may
be expressed a s
where a
f
i s t h e forward current
gain, arnd t h e e f f e c t i v e base recombination
l i f e t i m e f o r reverse i n j e c t i o n m y be expressed 8,s
Figure
3-9.
Figure
5-10. AnaLog com2uter s L ~ m l a t i o nof RC load.
RC c o l l e c t o r load output s t a g e .
Figure
3-11.
Extended Ebers-Moll T r a n s i s t o r model.
where a
r i s t h e reverse c u r r e n t gain.
S u b s t i t u t i o n of Equations (3-15),
(
6
, (
1
) and (3-18) i n t o
Equations (3-13) and (3-14) y i e l d s
di
= i +aSr
e
fr
f
i
dv
fr
f f C j e = e J - t r r, ir r
and
The diodes can be modeled by simulating t h e equation f o r instantaneous
diode c u r r e n t .
Charge c o n t r o l theory provides t h e r e l a t i o n s h i p
where
id
is t h e instantaneous diode c u r r e n t
q
i s t h e minority c a r r i e r excess charge s t o r e d i n t h e device
T
f
i s t h e minority c a r r i e r l i f e t i m e
C
i s t h e junction t r a n s i t i o n - r e g i o n capacitance
j
v
i s t h e voltage across t h e junction
d
The low frequency diode c u r r e n t i s
S u b s t i t u t i o n of t h i s r e l a t i o n s h i p i n Equation (3-21) y i e l d s
If t h i s e q r e s s i o n i s time scaled according t o t h e r e l a t i o n s h i p 'p = kt,
then Equation (j-23) becomes
Figure
3-12. Circuit of a grounded emitter transistor amplifier.
3'
r i .
a3
a]
0
The Laplace transform of Equation (3-24) i s
As an example of the use of t h e separation principle, t h e grounded
emitter t r a n s f s t o r aniplifier shottn schematically i n Figure 3-12 t r i l l be
modeled using conventional analog computer progra.nmiing of Equations (3-lg),
(3-20),
(3-25), and (3-26).
The r e s u l t i n g analog computer diagram i s
shown i n Figure 3-13.
It has been shown t h a t t h e breadboard method of sirrmla?;ion r e t a i n s
a c t u a l c i r c u i t topology.
This i s made p o s s p l e by using sensing r e s i s t o r s
t o d e t e c t junction currents.
The low frequency component of t h e juncti.on
. current i s used a s a measure of t h e charge stored i n the junction.
Effects
such as base widening and various interdependencies a r e provided without
any programming required.
I n the conventional analog method of simulation, diodes a r e used t o
provide t h e Junction nonl-inearities i n t r a n s i s t o r models.
Simuiation
based on t h e Eber's-Moll. t r s n s i s t o r model includes two-simulated i n t e r a c t i n g
diodes which permit adjustment of individual device parameters such a s
nonlinear current gain an2 recombination lifetimes.
I n a hybrid sirnulatior,, nonlinear f u ~ c t i o n ssuch a s nonlinear current
gains can be provlded by d i g i t a l computer function generation.
Base
resistance and other parameter cha.nges can be controlled by the d i g i t a l
computer program.
This