DO 910 Simulation System — Technical Manual

This document is an English translation of the original German-language “DO 910 Simulationssystem — Technisches Handbuch” published by Dornier-System GmbH, Friedrichshafen.

Overview
Mounting and Calibration Notes
Wiring
Power Supply
IEC/IEEE Interface
Analog Computing Elements
- Potentiometer Module
- Summing Amplifier Module
- Integrator Module (relay-controlled)
- Multiplier Module
- Variable Diode Function Generator Module (VDFG)
- Dead-Time Element Module
Logic Elements
- Flip-Flop / Monoflop Module
- AND/NAND Gate Module
- Clock Generator / Counter Module

1. Overview

The DO 910 is a hybrid simulation system manufactured by Dornier-System GmbH, Postfach 1360, D-7990 Friedrichshafen. The system combines an analog computing section with a digital interface and is controlled by a Commodore CBM 4032/8032 computer via the IEC/IEEE-488 bus.

System Structure

Component	Part Number
DO 910 Simulation System (complete)	SMC 910-100 000.00.0
Control Unit	910-200 000.00.0
Analog Modules (A)	—
Digital Modules (D)	—
Patch Panel	—
Power Supply / Accessories	910-430 000

Analog computing element plug-in modules:

Potentiometer module (AH 80 A)
Summing amplifier module (AD 81 A)
Integrator module (relay-controlled)
Multiplier module (AD 82 A)
Variable Diode Function Generator (AP 80 A)
Dead-time element (AE 80 A)

Logic element plug-in modules:

Flip-flop/monoflop (AL 82 A)
Clock generator / counter (AL 81 A)

2. Mounting and Calibration Notes

2.1 General Notes

The following notes provide guidance on mounting, dismounting, and calibrating the DO 910 computing elements and power supply voltages.

Some calibration procedures can be performed with the system fully assembled, using potentiometers accessible through the patch panel. Calibrating the supply voltages and interface components requires partial disassembly.

Safety warning: Before opening the unit, always unplug the mains lead. Both the analog chassis and the interface are powered from 220 V. Some calibration steps require operating the unit in the open state. If there is any uncertainty about which parts may be touched, contact an experienced service technician or Dornier Service. All work must comply with applicable DIN and VDE regulations.

For most calibration tasks a Commodore CBM 8032 computer is not required. A minimum 4.5-digit digital voltmeter is recommended; multiplier calibration additionally requires a signal generator and oscilloscope.

2.2 Disassembly of the Analog Chassis and Interface

Unplug the mains lead and disconnect the IEC cable from the interface.
Remove the four screws securing the rear panel; detach the rear panel.
Disconnect the flat-ribbon cable and the mains wiring harness between the analog section and the interface.
Remove the four front-panel screws securing the analog chassis, then pull it forward.
Remove the four front-panel screws securing the interface, then pull it forward.
Access covers:
- Rear cover of analog chassis — for removing computing element modules
- Top cover of analog chassis — for calibrating analog supply voltages
- Bottom cover of analog chassis — for calibrating multipliers, dead-time elements, and logic clock
- Top cover of interface — for calibrating the ADC, MDACs, and interface reference voltage
- The bottom cover of the interface need not be removed for calibration.

2.3 Removing and Installing Computing Element Modules

Computing element modules may only be removed with the power switched off (preferably with the mains lead disconnected). Modules are mechanically connected in groups of four via a spring/groove coupling shared with the potentiometer module above them. To remove a group:

Loosen the countersunk screws on the relevant patch panel segments, including the potentiometer module.
Push all four modules forward from the rear.
If the contact friction makes this difficult, brace a small board against the four lower modules and press or tap lightly with a small hammer.

When reinstalling, insert the four lower modules and the potentiometer module halfway, verify correct spring/groove engagement, and press the entire block gently into the connector strip (without a hammer).

4. Calibration of Supply and Reference Voltages

4.1 Analog Section

The calibration potentiometers for the analog supply voltages are located on the top of the DO 910. Their functions:

No.	Calibration potentiometer for
1	+5 V
2	+12 V
3	+15 V
4	−15 V
5	Overload threshold +10 V
6	Overload threshold −10 V

The two reference voltage potentiometers are located at the rear of the chassis next to the flat-ribbon connector, labelled P10 and M10.

Bus pin assignment (rear bus wiring)

Pin	Signal
15 (top)	Overload
14	T/H switching
13	Chassis ground
12	Relay ground (for 12 V)
11	+12 V
10	+15 V
9	+10 V
8	Reference ground (for 10 V)
7	Analog ground (for 15 V)
6	−15 V
5	+15 V
4	Digital ground (for 5 V)
3–2	Not used
1 (bottom)	—

Calibration procedure (supply voltages)

Supply	Measurement pins (ground / voltage)	Target value
+15 V	6 / 10	+15.00 V
−15 V	6 / 5	−15.00 V
+12 V	12 / 11	+12.0 V (or 12.05 V with empty patch panel)
+5 V	3 / 4	+5.0 V

Calibration of reference voltages

The reference voltages (+10 V and −10 V) are measured between Pin 8 (ground) and Pin 9 (+10 V) / Pin 7 (−10 V).

Before calibrating the reference voltages, set the overload detection thresholds:

Adjust the voltage to +9.95 V (or −9.95 V) using potentiometers P10 and M10 at the rear.
Adjust potentiometers 5 and 6 until the overload indicator just triggers.

To verify overload triggering, measure directly at Pin 1 (+10 V overload) and Pin 15 (−10 V overload), or run the following BASIC program on the CBM 8032:

10 OPEN 1,30,8
20 GET#1,D$
30 IF D$="" THEN D$=CHR$(0)
40 D=48 AND ASC(D$)
50 PRINT D: GOTO 20

Output values:

0 = no overload
16 = −10 V overload active
32 = +10 V overload active
48 = both overloads active

After verifying that potentiometers 5 and 6 respond when a voltage deviates 50 mV from its nominal value, set the reference voltages to +10 V and −10 V with a tolerance of 1 mV.

4.2 Interface

The only voltage requiring calibration in the interface is the +10 V reference, adjusted at potentiometer P11. The interface reference voltage can only be measured via the front-panel ground and reference jacks after the analog chassis is reconnected via the flat-ribbon cable. Calibrate to +10.0 V ± 1 mV.

5. Summing Amplifier Module (Summier-Einschub)

The summing amplifier module contains three amplifiers, each with a calibration potentiometer accessible via a hole in the patch panel field (located within the amplifier symbol on the front panel).

Upper summing amplifier: Connect both unit-gain inputs to ground; adjust output to 0 V. Tolerance: approx. 100 µV.
Middle summing amplifier: Connect the ten-gain input to ground; adjust output to 0 V.
Lower summing amplifier: Configure as a summing amplifier with unit-gain feedback; connect ten-gain input to ground; adjust output to 0 V.

6. Integrator Module (Integrierer-Einschub)

6.1 Relay-Controlled Integrator

Only a zero-offset calibration is performed (in the summing-amplifier operating mode) using the patch-panel potentiometer. Tolerance: approx. 100 µV.

6.2 Electronically-Controlled Integrator

The electronically-controlled integrator allows calibration of both zero-offset and drift in HOLD mode. Two calibration potentiometers are accessible through the patch panel.

Zero-offset calibration (P2, upper potentiometer): Configure the integrator as a summing amplifier; connect the unit input to ground. Adjust the output to 0 V with a tolerance of approx. 100 µV using P2.

Drift calibration (P2, lower potentiometer): Connect a 1 µF feedback capacitor (×1 time scale). Connect a unit input to ground. Switch to continuous-compute mode (DR — Dauerrechnen) — either by appropriate connection of the S and H control inputs or via the CBM 8032 MONITOR program. Adjust the drift to a minimum using the lower potentiometer.

Switch to HOLD (HT) mode and verify drift. In both operating modes, drift must be less than 80 µV/second. Iterative calibration may be needed; in HT mode, drift is influenced by the upper potentiometer (P1).

7. Multiplier Module (Multiplizierer-Einschub)

7.1 Summing Amplifiers

The two summing amplifiers in the multiplier module are calibrated in the same manner as the upper summing amplifier described in Section 5.

7.2 Multiplier

Each multiplier has one zero-offset potentiometer accessible through the patch panel, plus three additional potentiometers on the module itself (accessible from outside when the appropriate chassis cover is removed). A signal generator and oscilloscope are needed for precise calibration.

Calibration sequence:

Connect the multiplier in its standard configuration (output connected back as multiplier). Connect both X and Y inputs to ground; adjust the output to 0 V (zero-offset potentiometer, tolerance: approx. 500 µV).
Connect X to ground; apply 20 Vpp, 50 Hz from the signal generator to Y. Adjust the output to a minimum using potentiometer 1 (or 4).
Connect Y to ground; apply the signal generator to X. Adjust the minimum using potentiometer 2 (or 5).
Adjust potentiometer 3 (or 6) so that the multiplier output deviates as little as possible for the corner values: X·Y = +10 V / +10 V, +10 V / −10 V, −10 V / +10 V, −10 V / −10 V.

Repeat the calibration cycle if the first pass is unsatisfactory.

8. Comparator

The comparator is located inside the potentiometer module, below potentiometer P4 on the front panel. Its calibration potentiometer (accessible through the module front panel) sets the switching symmetry so that the comparator switches between +5 mV and −5 mV.

9. Logic Clock Generator

A frequency-adjustment potentiometer is located at the bottom edge of the clock generator/counter module (accessible after removing the lower cover plate). To calibrate:

Speed up the clock generator by a factor of 10 (via the MONITOR program).
Measure the patch-panel output 3 with a frequency counter.
Adjust to 10 kHz ± 1 Hz.

10. Dead-Time Element (Totzeitglied)

Calibration of the dead-time element must be carried out outside the analog chassis and is therefore performed at the factory.

11. Analog-to-Digital Converter (ADC)

Remove the top cover of the interface and connect the interface to the CBM 8032 and the analog chassis. Ensure that the analog section reference voltages are within 1 mV of their targets before calibrating the ADC.

Calibration potentiometers P1 (zero offset) and P2 (gain) are located at the front-left of the interface board, behind the jacks for channels 0 and 1.

Enter the following BASIC program on the CBM computer:

10 OPEN 1,30,1: OPEN 2,30,2: OPEN 3,30,3
20 PRINT#1, CHR$(0)
30 GET#2,M$: GET#3,L$
40 IF M$="" THEN M$=CHR$(0)
50 IF L$="" THEN L$=CHR$(0)
60 W=INT(16*ASC(M$)+8*(ASC(L$) AND 15)/0.2048)
70 IF ASC(M$)>127 THEN W=-20000+W
80 PRINT W:
90 GOTO 20

This program reads ADC channel 0 and continuously displays the measured voltage in millivolts on the CBM screen. The ADC resolution is 5 mV.

Calibration procedure:

Connect channel 0 to ground. Adjust P1 so that the display shows 0. Position P1 at the centre of the 0-display range.
Apply −10 V to channel 0; adjust P2 until the display shows −10000. If the display already shows −10000, reduce the gain first, then re-adjust to −10000.
Verify that the display shows 9995 for +10 V input.
Apply +5 V (accurate to ±2 mV) from the ten-turn potentiometer on the analog section to channel 0. Verify that the display reads between 4995 and 5005. Repeat for −5 V input (display should read between −4995 and −5005). If the two readings are unsymmetrical, use P1 to improve symmetry.

Repeat the entire procedure iteratively if necessary.

12. Multiplying DAC (MDAC)

Remove the top cover of the interface. Ensure interface and analog reference voltages are within tolerances. The MDAC calibration uses the following potentiometers (all located at the front of the interface board, behind jacks for ADC channels 5–7 and MDAC channels 0–3):

MDAC Channel	Zero-offset potentiometer	Gain potentiometer
0	P4	P3
1	P6	P5 (implied from pattern)
2	P8	P7
3	P10	P9

Enter the following BASIC program:

10 INPUT "KANAL"; K
20 OPEN 1,30,7+2*K: OPEN 2,30,8+2*K
30 INPUT "MSB, LSB"; MSB, L
40 PRINT#1, CHR$(MSB): PRINT#2, CHR$(L)
50 GOTO 30

Connect the MDAC inputs to +10 V. After starting the program, calibrate channel 0 as follows:

Input MSB=0, LSB=0 → Adjust zero-offset potentiometer (P4) to 0 V output (tolerance: < 200 µV).
Input MSB=128, LSB=0 → Adjust gain potentiometer (P3) to +10 V output (tolerance: < 200 µV).
Input MSB=127, LSB=0 → Verify output is between −9.993 V and −9.998 V. If not, adjust P4 for symmetry, then re-correct the gain.

Repeat iteratively as needed. Apply the same procedure to all other channels.

Overview of Plug-In Modules and Schematics

The technical manual includes full schematic diagrams for all sub-assemblies under Dornier-System part numbers in the 910-xxx and DO 80/DO 910 series:

Power supply (SP 910-150 000): ±5 V/2.5 A, ±12 V/1.5 A/0.8 A, ±15 V/1 A, ±10 V reference
Interface board (SP 910-921 000 series): ADC multiplexer, operating mode control, comparator readout, digital inputs/outputs, MDAC boards, command decoder, reference element
Potentiometer module (SP E 916 100): includes the comparator and relay driver subcircuit
Summing amplifier module (SP E 916 200 / DO 80 — Summier-er)
Integrator module (SP E 916 300 / DO 80 — Integrierer), including relay-controlled and electronically-controlled versions
Multiplier module (SP E 916 400 / DO 80 — Multiplizierer)
Variable Diode Function Generator (SP E 916 600 / DO 80 — Funktionsgeber)
Dead-time element (SP E 916 700 / DO 80 — Totzeitglied)
Flip-flop / Monoflop logic module (SP E 947 400 — AL 82A)
AND/NAND gate logic module (SP E 947 200)
Clock generator / BCD counter (SP E 977 300 — AL 81A)
Interface cable harness (EL 910-115 200/300/400)
Complete wiring diagram (AU 910-000 000)

All analog computing elements operate with ±10 V signal range and ±15 V/±12 V/+5 V supply rails. The reference voltages of ±10 V are used as the machine unit (±MU). The system is housed in a compact enclosure and uses plug-in (Einschub) card-edge connectors for all computing elements.

[condensed — schematic pages consist primarily of circuit diagrams and component tables rather than prose text]