Reference / Paper · 1995
A Simple and Inexpensive Implementation of Time Division Multiplier for two Quadrant Operation
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A four-page technical article published in IETE Technical Review (Vol. 12, No. 1, 1995) presenting a simple, low-cost two-quadrant time division multiplier (TDM) circuit built from standard CMOS and linear ICs. The circuit uses a sawtooth waveform generator, a comparator, and a low-pass filter to produce an output voltage proportional to the product of two input voltages. Experimental results tabulate accuracy within about 0.1% error for supply voltages up to ±5 V.
- Manufacturer
- Practical Electronics
- Author
- J. Selvam; Jagadeesh Varadarajan Kumar
- Year
- 1995
- Type
- Reference / Paper
- Language
- English
- Learning track
- specific applications
- Pages
- 4
- Credit
- Via ResearchGate (DOI: 10.1080/02564602.1995.11416496). Uploaded by Jagadeesh Varadarajan Kumar.
- Practical Electronics
- time division multiplier
- analog multiplication
- op-amp circuits
- sawtooth waveform generator
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A Simple and Inexpensive Implementation of Time Division Multiplier for two Quadrant Operation
See discussions, stats, and author profiles for this publication at: https://www.researchgate.net/publication/277593298
A Simple and Inexpensive Implementation of Time Division Multiplier for two
Quadrant Operation
Article in IETE Technical Review · March 2015
DOI: 10.1080/02564602.1995.11416496
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Jagadeesh Varadarajan Kumar
Indian Institute of Technology Madras
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