application-note · English
The Simulation of Transport Delay with the HYDAC Computing System
This two-page EAI bulletin (No. ALHC 64019, 1964) describes a hybrid computing technique for simulating transport delay on the HYDAC Computing System using analog-to-digital conversion, digital function storage, and logic components. The program supports up to ten independent delay channels with storage capacities of 16, 64, or 256 words per channel and variable delay times, overcoming the phase-error and multiplier-count limitations of classical Pade-polynomial analog approaches. Sample results for two-channel transport delay with a velocity step change are presented.
transport delay simulationhybrid analog-digital computationHYDAC systempartial differential equations