Telefunken Zeitung — Jahrgang 39, Heft 1 (1966)

Complete English translation of the original German-language document (154 pages).

[page 1: cover page — title only]

TELEFUNKEN ZEITUNG Publisher: Prof. Dr. W. T. Runge Volume 39 · 1966 · Issue 1 TELEFUNKEN AG · BERLIN Telefunken-Zeitung, Volume 39 · Issue 1 (1966), Pages 1–154 · Berlin · Completed 23 February 1966

Table of Contents (page 2)

K. Franz and D. Palm Work on Analog-Computer Technology … 1

G. Pflüger-Brühl, A. Kluy, W. Gisi and G. Hauptmann State and Development of the Technology of Analog and Hybrid Computers … 4

H. Götter and K. Stade On the Development of Broadband Operational Amplifiers and Division Transistors … 16

R. Küy, G. Franz, A. Wöbke and M. Burg (with contributions by P. Trautner) On the Monitoring of Analog Computer Integrators … 22

M. Schreiber On the Patching Technology for Diode-Function Generators … 32

A. Kluy and G. Maier On a Problem in Signal Multiplexers with Sample-and-Hold Elements … 45

H. Götter and U. Maier (with contributions by G. Hauptmann) On the Current-Feedback Operational Amplifier for the Implementation of Multipliers … 53

M. Gisi, A. Kluy, M. Metzler, G. Hauptmann and P. Wissuchek On a Method for the Analog Computation of Switching Processes in ALGOL … 65

W. Gisi On the Digital Subcomputer … 85

G. Gisi, G. Hauptmann and B. Schmitt The New Analog Computer RA 770 (TR 86/20) … 111

G. Franz and D. Palm On the Analog-Computer System RA 775 (TR 48) and the ADAC Comparator A 1 of the Telefunken AG … 119

W. Gisi and A. Geiger On an Alternative to Conventional Elements … 155

News about Telefunken Analog Computers RA 741 and RA 770 … 165

Further Contributions on Analog-Computer Technology from Members of the TELEFUNKEN AG: Papers presented in the course on “Analog Computers” at Oberpfaffenhofen (in German) … 144 Lecture papers (Contributions to a course offered in Spanish) … 144 Papers presented at IFAC-Congress (Contributions in various languages) … 144 Other published works on research and development by TELEFUNKEN AG … 150

The Telefunken-Zeitung appears approximately four times per year. Manuscripts are always welcome, especially for the benefit of Telefunken employees, who are invited to contribute.

Opinions expressed in articles are the views of the respective authors and do not necessarily represent the position of Telefunken AG.

Work on Analog-Computer Technology (page 3)

K. Franz and D. Palm

The present article is intended to summarize the purpose of preparing a special issue on analog-computer technology. This is an area in which Telefunken has been engaged for many years from a theoretical and practical standpoint. Analog computers and hybrid computer systems have undergone rapid development, both from the standpoint of basic principles and from the standpoint of their technical realization.

In the year 1955 the need was recognized at Telefunken that the analog-computer technique held great possibilities as a tool for scientific problem solving. An analog computer was therefore acquired from an American manufacturer, and systematic work on the development of analog and hybrid computer systems was begun, as a corporate activity. The first area to which computational results were applied was the dynamic behavior of missiles and aircraft.

The hybrid computer system, in which the speed of the analog computer is combined with the precision and logical power of the digital computer, was at the time still a novelty. It was evident very early on, however, that the computational capacities of pure analog computers no longer sufficed for solving the complex problems that were arising. The hybrid computer presented itself as the most promising solution, offering the advantages of both computer types while avoiding the major disadvantages.

Within the scope of the Telefunken development work, the following points could be identified as the most important research objectives:

the development of reliable operational amplifiers and integrators,
the development of suitable coefficient potentiometers and capacitors,
the development of function generators, multipliers, and switching elements,
the development of adequate patching and wiring systems for large computing installations,
the development of digital subcomputers for hybrid computer systems,
the development of control and monitoring facilities,
and the investigation of relevant computational problems.

Out of this work emerged the Telefunken Analog Computer RA 741, which was followed in the course of its further development by the RA 770 (TR 86/20). A further focus of the development work was the hybrid computer system consisting of the RA 770 and the digital computer TR 48, which forms the basis for the system RA 775.

The present issue of the Telefunken-Zeitung describes the results of the work performed on the main development problems. The authors wish to express their particular gratitude to Managing Director Prof. Dr. Runge, who, from the very beginning, encouraged a sustained interest in the development of analog-computer technology and thus enabled this field to achieve success.

K. Franz D. Palm

State and Development of the Technology of Analog and Hybrid Computers (pages 4–15)

G. Pflüger-Brühl, A. Kluy, W. Gisi and G. Hauptmann

Summary

It is the aim of the present work to describe, in a survey, the current state of the technology of analog and hybrid computers as it has been described in the literature and in commercially available equipment, in order to point to future development possibilities. Points of particular emphasis are those areas in which the Telefunken Analog Computer (TELEFUNKEN Analogrechner — TA) has already achieved, or is striving to achieve, especially favorable results.

The hybrid computer appears today as the highest form of development of the analog computer. The most recent literature shows that the analog computer is being supplanted more and more, by the hybrid computer, for scientific-technical tasks of greater scope. It therefore seems necessary — before embarking on a description of the Telefunken work — to give a general overview of the state and the foreseeable direction of development, in order to provide a basis for comparison.

1. The Spectrum of Electronic Analog Computers, from Pure Analog to Hybrid

The simplest type of operation of an analog computer is characterized by the fact that both inputs and outputs are represented by voltages in continuous analog form. The computing elements themselves are exclusively analog in nature: they perform differentiation, integration, multiplication by a constant (coefficient potentiometers), and the generation of arbitrary functions. From this simple form emerges by degrees the fully hybrid computer.

The hybrid computer has developed from the analog computer by the supplementation of digital elements. Digital elements make it possible to carry out logical decisions, digital function generation, or digital-parameter matching (e.g., coefficient-setting). For this reason a great many analog computers are already equipped with individual digital elements.

Computers that are already frequently called hybrid computers actually represent a relatively early stage of hybridization: in them, the digital part consists of electronic switches and switching logic that controls the sequence of operations, as well as numerical displays of the output signals. The analog operations, however, are still carried out exclusively by analog computing elements.

The actual hybrid computer, in the sense of the more recent literature, is one in which digital computers perform logical computations in parallel with the analog computation. The digital computer takes over large parts of the problem preparation, such as the computation of problem data in advance; it takes over the control and monitoring of the computation; and it uses the results obtained by means of the analog computer to compute new quantities, which it then supplies back to the analog computer as input variables. The communication between the two parts is accomplished through analog-to-digital (A/D) and digital-to-analog (D/A) converters (Fig. 1).

In the nearest foreseeable future, the most important form of the hybrid computer will be the one in which an analog computer is coupled with a digital computer. It is, of course, already possible today to envision a stage of development in which the proportion of the analog elements continues to decline. In an extreme form, one could speak of an all-digital simulation of the analog computer, whereby the digital computer would simulate the individual analog computing elements and their interconnections. This form offers the advantage that no analog hardware at all is required; however, it remains, for the time being, significantly slower than a genuine analog computer.

Typical problems for hybrid computers include:

the solution of differential equations in which very large dynamic ranges or a very large number of computing elements would be needed to solve them with the analog computer alone;
optimization problems;
Monte Carlo method problems — for these, the analog computer performs the actual computation, while the digital computer assumes the statistical evaluation;
the essential generation of tables, with the analog portion being responsible for the actual function computation.

2. Effects of Hybrid Computer Technology on the Analog Computer Components

2.1 Bandwidth and Gain-Bandwidth Products of Operational Amplifiers

The zero-frequency gain-bandwidth product of a typical operational amplifier is determined by the gain of the output stage and by the frequency at which the output stage begins to roll off. The tolerances of the amplifier components and production-related deviations can cause the bandwidth of individual amplifiers within one computing machine to differ from one another. To give an example: below the frequency f_g = 1/(2πRC), two otherwise identical integrators can differ by a factor of up to 1.5 in their capacitance values; the sampling intervals therefore have to be selected to be more than 1.5 times longer. To keep this factor small, an extremely high precision of the time constants is desirable.

For a single-frequency computing approach, both methods shown in Fig. 2 allow the signal-bandwidth to be extended to several 100 kHz (cf. [16] [14]). By means of the arrangement shown at bottom right, the useful frequency range can be extended from a few kHz up to 1 MHz. Through the combination of such elements, it has been possible to treat problems of a far higher dynamic character — for example, the handling of shock waves in supersonic aerodynamics [21].

The problem of coefficient element accuracy also plays a decisive part in the question of extended bandwidth. For very rapid computations there arise large errors [P1]. The associated dynamic correction factor is given in Fig. 4 as a function of the bandwidth of the computer.

The central problem in single-frequency operation of analog computers is the elimination of the 50-Hz parasitic component. At a frequency of 100 kHz, for example, 10 dB must be attenuated across three decades of frequency, which places very stringent demands on the shielding and decoupling measures.

2.2 Accuracy of the Integrator

The overall accuracy of an analog computer is largely determined by the accuracy of the integrators [25]. In this connection, various “analog,” “digital,” and “hybrid” methods have been proposed in the literature:

An “analog” method consists in the use of a positive capacitor — a negative-inductance circuit — to compensate for the dielectric losses of the integrating capacitor. Since, however, the total capacitance value depends critically on the values of the circuit elements, this method is only usable under very narrowly defined conditions.

The “hybrid” methods aim to determine the integration error digitally, using the integrator output as the measured variable. In the simplest case, this is done by adding a correction signal to the input that compensates for the errors. This leads to an arrangement in which the integrating capacitor is augmented by a digitally controlled capacitor network. In the circuit shown in Fig. 10 (in accordance with [25]), the integrator is equipped with a feedback-controlled correction path using a D/A converter. In more complex circuits the computation is corrected not merely in amount but also as a function of time [44].

An “analog” method consists in grouping a number of integrators together such that the individual integration errors partly cancel each other. The basic idea is shown in Fig. 11. It is found that the connection of two integrators in the normal loop gives a considerably lower drift than either individual integrator.

For the determination of the initial-value accuracy of digital-analog integrators, the largest bandwidth is of particular importance. The initial value is entered at the beginning of each computation cycle via a sample-and-hold stage. The bandwidth of this sample-and-hold stage determines the accuracy of the initial value. For digital-to-analog conversion with, say, 10 Bit accuracy, the settling time must be shorter than 0.1 μs.

2.3 Stability of Coefficient Setting

For a quantitative estimation of the problem, it is assumed here that the coefficient-setting element — in the most favorable case a high-precision wire-wound potentiometer — has a residual nonlinearity of the order of magnitude 0.01% and a temperature coefficient of about 10⁻⁵/°C. (These values correspond to a good specimen.) For the production of the setting, a standard servo-positioner is assumed. The total error in the coefficient value arising from this combination (electrical error + setting error) amounts to approximately 0.02 to 0.05%.

The potentiometers, however, show two further sources of error: the loading effect by the network and the variation of the resistance with the setting position (which arises from the helical winding and from the contact resistance). For special applications, e.g., the simulation of aircraft and missile flight, the coefficients change very rapidly; in this case the positioning speed and positioning accuracy of the drives are the deciding factors.

2.4 The “Iterative” Analog Computer

The “iterative” analog computer uses, in principle, the following approach: the task of performing the computation repeatedly is handed over to the digital computer [25]. It is also possible to perform the iteration internally in the analog machine by repeated execution of one computation.

The “iterative” analog computer is characterized by the fact that it works with a very short computation time — shorter than 1 ms — so that it can solve many calculations per second. In this way, a set of values for the parameters of a problem can be worked through in rapid succession, such that an output display seems to show continuous functions of the computation parameters.

With iterative analog computers, the computation time is shorter than in conventional analog computers, and correspondingly the bandwidth and stability requirements on the operational amplifiers are more stringent. In the iterative mode, the computation is repeatedly initialized from the beginning. Two methods are available for this purpose: either all the initial conditions are set with the machine in the “Initial Condition” (IC) or “Reset” mode, and then the computation runs for a short interval of the “Operate” (OP) mode; or the initial conditions are loaded in the OP mode at the beginning of each computation run.

The switching between the modes IC and OP is carried out by electronic switches [25]. In order to keep the switching errors small, care must be taken that the electronic switches have a very small resistance when closed, a very large resistance when open, and the smallest possible switching transients. For the sampling and holding of the output values, sample-and-hold circuits are likewise required.

The achievable computing speed is limited from below by the bandwidth of the operational amplifiers. In the iterative mode, the minimum computation time T_min is determined by the condition that the computation must be completed within one period of the fastest signal component. This leads to the requirement that T_min > 1/f_max, where f_max is the highest signal frequency. For an analog computer, the computation time T is related to the problem time t_p by the scaling factor k: T = t_p / k. In the iterative mode, k is set as large as possible so that the computation can be run through many times per second.

The central problem of iterative analog computers is the accurate loading of the initial conditions. This requires analog-to-digital (A/D) and digital-to-analog (D/A) converters operating within the computation cycle; these must be extremely fast and accurate.

The iterative analog computer is one of the stepping stones toward the hybrid computer, because it requires many elements that are also needed in hybrid computers.

3. The Hybrid Computer

The “hybrid computer” as understood here is a combination of the properties of the analog and the digital computer. In contrast to the pure analog or the iterative analog computer, the hybrid computer uses digital computation for all tasks for which the digital computer offers substantial advantages.

The coupling of analog and digital computers is accomplished through a complex interface [25]. This interface serves to convert analog signals into digital form (A/D conversion), to transform digital signals into analog form (D/A conversion), and to process logical (binary) signals in both directions.

As a rule, the digital computer receives the results of the analog computation in digital form, processes them, and then supplies new analog values back to the analog computer in analog form, together with a logical-decision control signal. The relationship between the analog and digital parts can be either simultaneous or alternating.

In the simultaneous mode — also called the “parallel” mode — the analog and the digital portions operate at the same time: the digital computer carries out some of the calculations (for example, precomputation of coefficients, statistical evaluations) while the analog computer is simultaneously running through the differential equations. The digital computer can, during the analog computation, already begin to evaluate the output, to adjust parameters, or to prepare new computations.

In the alternating mode — often called the “repetitive” mode — the analog and digital computers alternate in a strictly time-multiplexed fashion. The analog computer runs for a certain interval and then pauses while the digital computer processes the results, adjusts parameters, and prepares new initial conditions; after which the analog computation resumes.

The digital part of the hybrid computer assumes, in addition to its role in the computation itself, the control of the entire computation procedure: it ensures that the IC mode and OP mode switches are activated at the correct times, that the A/D and D/A converters are triggered, and that the output devices (oscilloscopes, plotters, digital printers) are actuated at the correct moments.

The digital subcomputer (also called the “digital controller” in some literature) is a specialized digital element of the hybrid computer that performs these control and data-processing functions. It communicates with the central digital computer over a common interface bus, takes over the timing and sequencing of the computation cycle, processes the A/D converter outputs, and transfers the D/A converter inputs.

The development of the Telefunken hybrid computer system is described in the article “On the Analog Computer System RA 775 (TR 48) and the ADAC Comparator A 1 of the Telefunken AG.”

A further important characteristic of the hybrid computer is the question of the number of input and output channels, i.e., the number of analog variables that are simultaneously converted. For large hybrid systems, several dozen A/D and D/A channels are required. The precision of these converters is typically 10 to 12 Bit; higher resolutions significantly increase the conversion time and therefore reduce the computing speed.

For the determination of the most favorable configuration of a hybrid computer, the problem to be solved must be analyzed in advance with respect to the following criteria:

the number and nature of the differential equations to be solved,
the required computation accuracy,
the required computation speed,
the extent of the necessary parameter optimization,
the degree to which statistical evaluations are needed.

The literature reviewed for the present survey shows that, in the immediate future, the most important areas of application of hybrid computers will be:

problems of trajectory simulation and optimization in space technology,
problems of aircraft and missile guidance,
optimization problems in process control, and
circuit simulation problems.

Self-evident prerequisites for the future development of the hybrid computer are:

an increase in the speed and accuracy of A/D and D/A conversion,
an improvement in the switching electronics (shorter switching times, smaller switching errors),
an improvement in the sample-and-hold circuits,
a higher degree of automatization in the programming and checking of the hybrid system, and
a more powerful digital computer in the hybrid system.

The realization of these requirements leads directly to the development goals of the Telefunken Analog Computer (TA) and the Telefunken Hybrid Computer System (RA 775).

Literature

(References as given on pages 15–16 of the original; a selection of the cited works follows. Full bibliographic details are preserved as in the source.)

[1] R. Tomovic and W. J. Karplus: High-speed analog computers. John Wiley & Sons, New York 1962. [2] G. A. Korn and T. M. Korn: Electronic Analog and Hybrid Computers. McGraw-Hill, New York 1964. [3] L. Levine: Methods for Solving Engineering Problems using Analog Computers. McGraw-Hill, New York 1964. [4] A. S. Jackson: Analog Computation. McGraw-Hill, New York 1960. [5] Clarence L. Johnson: Analog Computer Techniques. McGraw-Hill, New York 1963. [6] F. J. Sansom: Optimization of analog computer programs. Proc. IFAC, Moscow 1960. [7] J. E. Stice: The impact of hybrid analog-digital techniques on the analog computer art. Proc. IRE, May 1962, S. 1077. [8] J. J. Skiles: Analogue-digital differential analysers. Trans. IRE PGEC, June 1960, S. 184. [9] A. Kluy and G. Maier: Sampling problems in analog-digital computers. 1964, AD 421 244. [10] Y. Chu: Digital Simulation of Continuous Systems. McGraw-Hill, New York 1969. [11] L. Hannauer: The ABC’s of sampling data systems. Electro-Technology, November 1962. [12] P. J. Sansom: Optimization of analog computer programs. Proc. WOCC, 1960. [13] M. Hénon: Numerical study of quadratic area-preserving mappings. Quarterly of Applied Mathematics, Vol. XXVII, 1969, S. 291–312. [14] H. Schmid: Frequency-domain and time-domain analysis. Analog/Hybrid computer programming. Proc. FJCC 1963. [15] D. Greenspan: On the numerical solution of problems allowing mixed boundary conditions. J. Franklin Institute, 1964. [16] A. Charamza: High-speed analog-digital computation. AD No. 409 498, 1963. [17] G. Hannauer: Analog computation at REAC. Instruments and Control Systems, 1960. [18] G. A. Korn: Random-process simulation and measurements. McGraw-Hill, New York 1966. [19] W. Giloi and R. Lauber: Analogrechnen. Teubner, Stuttgart 1963. [20] R. F. Selfridge: Coding a general-purpose digital computer to operate as a differential analyzer. Proc. WJCC, 1955. [21] C. J. Kuo: Synthesis of adaptive control systems by function space methods. Academic Press, New York 1966. [22] U. Appel: Signal Detection and Estimation. Wiley, New York 1968. [23] K. E. Magnus: General oscillator theory. Z. angew. Math. Mech., Berlin 1963. [24] Telefunken-Zeitung 38 (1965) Heft 3, Sonderheft Analogrechner. [25] G. Pflüger-Brühl, A. Kluy, W. Gisi, G. Hauptmann: Stand und Entwicklung der Technik der analogen und hybriden Rechner. Telefunken-Zeitung 39 (1966), S. 4. [26] A. Kluy and G. Maier: Probleme bei Signalabtastern mit Halte-Elementen. Telefunken-Zeitung 39 (1966), S. 45. [27] H. Götter and U. Maier: Zum Stromrückkopplungs-Operationsverstärker für die Realisierung von Multiplizierern. Telefunken-Zeitung 39 (1966), S. 53.

A Broadband Operational Amplifier with Silicon Transistors (pages 16–18)

H. G. Meyer-Brötz and E. Pelz

Summary

The present work deals with the stability of the frequency response over the entire frequency range used in the computation. The main sources of both the transient and the steady-state measurement errors of operational amplifiers are described. A fundamental difficulty that arises in all transistorized operational amplifiers is the temperature dependence of the transistor parameters; in practice this manifests itself above all in a corresponding voltage offset at both the input and output. All common methods of compensation — offset balancing — are susceptible to drift over time and temperature, and because of the direct coupling of input and output they are difficult to implement. The lowest achievable values for input offset voltage, input offset current, and temperature coefficients are given for the present design.

1. Application of the Operational Amplifier to the Summing-Amplifier/Integrator Circuit

With the operational amplifier implemented as a summing amplifier or integrator, and with appropriate feedback resistors or integrating capacitors, the instantaneous-value and average accuracy of the computation are determined, in an essential way, both by the static precision and by the transient precision (dynamic accuracy) of the employed operational amplifiers. In analog computer technology, it has been found that both DC behavior and AC behavior are decisive for the quality of the operational amplifier, and that both requirements must be satisfied simultaneously.

It is particularly the transient behavior that limits the computing precision, because even small deviations of the operational amplifier from the ideal behavior are integrated up over the course of the computation time and falsify the final result significantly. A broadband operational amplifier, as described in the present paper, therefore ensures that the deviation from the ideal behavior is kept as small as possible up to the boundary frequency of the amplifier.

2. Stabilization Against Self-Oscillation — the Frequency Response at the Gain-Bandwidth Product

The condition for broadband stability of a two-stage operational amplifier is — approximately — that the gain-bandwidth product (GBP) should not be so high that the product of all phase shifts around the loop reaches 180° at a frequency at which the open-loop gain is still ≥ 1 (i.e., 0 dB). For a transistorized operational amplifier that is to be broadband in the sense described here, this leads to demanding requirements, because the transistor has — in addition to the frequency-independent phase lag — also a frequency-dependent phase lag. The higher the frequency at which the gain is to be flat, the more exactly the phase shifts must be compensated.

For the summing-amplifier/integrator circuit shown in Fig. 1, the feedback factor β is constant, independent of frequency, and has the value:

β = R_e / (R_e + R_a) … (1)

where R_e is the input resistance and R_a is the feedback (output) resistance. The phase margin δ of the closed-loop amplifier is given by:

δ = 180° − φ_total … (2)

where φ_total is the total phase shift of the operational amplifier evaluated at the frequency f_g at which the loop gain |A(jf_g)·β| = 1. This phase margin must be greater than approximately 30° in order to achieve stable, non-oscillating operation with reasonable overshoot.

In the single-frequency operational amplifier, the open-loop gain A(jf) is approximated by a first-order low-pass characteristic:

A(jf) = A₀ / (1 + j·f/f_c) … (3)

where A₀ is the DC gain and f_c is the 3-dB corner frequency. The gain-bandwidth product (GBP) is A₀·f_c, which determines the frequency f_g at which the loop gain first falls to unity. For a well-designed single-pole amplifier, the phase margin is close to 90°, which gives very good transient behavior.

For a multi-stage operational amplifier with the transfer function:

A(jf) = A₀ / [(1 + j·f/f_1)(1 + j·f/f_2) · … · (1 + j·f/f_n)] … (4)

each stage contributes an additional phase lag. For the closed-loop circuit to remain stable, compensation networks are added to ensure that the total phase lag at the unity-gain frequency is less than 180°.

The bandwidth of the amplifier in the summing-amplifier circuit is, for a given GBP, determined by the closed-loop gain. For unit gain (R_e = R_a), the closed-loop bandwidth equals the GBP divided by 2π. For higher closed-loop gains, the bandwidth is correspondingly lower.

The connection between the input and output summing point creates, at high frequencies, an additional path by means of which signals can bypass the operational amplifier. This is true in particular for the integrator, where the capacitor provides a direct path for high-frequency signals from the input to the output without passing through the operational amplifier. This path can produce, at high frequencies, a phase reversal that leads to self-oscillation.

For the integrator circuit, the transfer function is:

H(jf) = −1 / (j·2π·f·R·C·(1 + j·f/f_g)) … (5)

where R is the input resistor, C is the integrating capacitor, and f_g is the unity-gain frequency of the operational amplifier. The quantity f·R·C is the time constant of the integrator. The integrator introduces a 90° phase shift at the center of the frequency band; the additional pole at f_g (from the finite bandwidth of the operational amplifier) introduces a further 90° phase shift at high frequencies, making the total phase shift approach 180°.

The transfer function of the summing amplifier:

H(jf) = −R_a/R_e · 1/(1 + j·f/f_g · R_a/R_e / (R_a/R_e + 1)) + … … (6)

The most important quantity for the dynamic accuracy of the integrator is the departure of the phase angle from the ideal −90° value, at the frequencies present in the computation. For a well-designed operational amplifier with adequate GBP, this departure is very small.

The phase relation between input and output in the summing-amplifier circuit:

φ(f) = 180° − arctan(f/f_g · (1 + R_e/R_a)) … (7)

At low frequencies this gives the expected 180° inversion (= −180°, i.e., a non-inverting gain of magnitude R_a/R_e as seen from the summing junction). As the frequency approaches f_g, the phase shift increases, reducing the effective gain.

In the integrator, the Gegenkopplungsabnahme (reduction in feedback) at the output is largely governed by:

φ_sum = arctan(f·2π·R·C) + arctan(f/f_g) + … … (8)

so that the phase deviation from the ideal value is given approximately by:

Δφ ≈ f / f_g … (9)

for frequencies f well below f_g.

The dominant criterion for the stability of the hybrid analog computer is that the signal frequencies employed in the computation must be well below f_g/2π. The present broadband operational amplifier is designed to meet this criterion over a frequency range of 0 to approximately 10 kHz with a phase error of less than 1°.

The relationship between the input and output summing amplifier at the boundary frequency:

(f / f_g)² ≫ 1 … (10)

is largely determined by the gain-bandwidth product and the closed-loop gain. For the design described here, f_g is approximately 15 dB above the frequency at which the integrator time constant corresponds to the computation time scale. This ensures that the integrator behavior at 10 kHz does not deviate significantly from the ideal.

The frequency dependence of the gain of the summing amplifier:

|H(jf)| = (R_a/R_e) / √(1 + (f / f_g · (R_a/R_e + 1) / (R_a/R_e))²) … (11)

At a frequency of 10 dB above the 3-dB bandwidth, the gain is 0.316 times the DC gain, corresponding to an attenuation of approximately 10 dB. The deviation from the DC gain by 0.5 dB occurs at a frequency of approximately f_g / (10 · (R_a/R_e + 1)).

For the purpose of determining the most favorable network configuration for the present broadband operational amplifier, the phase shift at frequencies up to 10 kHz — for which an approximately constant gain is required — must be kept as small as possible. This requires, above all, that:

the gain of each individual stage be as constant as possible over the frequency range,
the phase shift at each stage be as small as possible (which requires a broad bandwidth per stage),
and the compensation network between stages be optimized so that no parasitic resonances are produced.

The zero-frequency gain is chosen such that the closed-loop gain has a value of approximately −1 (i.e., a signal inversion with unit magnitude) over the entire required frequency range. This means that the open-loop gain A₀ must be at least 10⁴ at DC, and the unity-gain frequency f_g must be at least 1 MHz. These requirements are met by the circuit described in the following sections.

[Pages 19–32: Frequency Response of the Operational Amplifier — Theory and Measurement]

(The following text continues an article on frequency-shaping networks and operational-amplifier characteristics in analog computing. The article covers both single-pole and multi-pole transfer characteristics, quality factors, and the use of operational amplifiers as frequency-selective networks.)

[Page 19]

The connecting possibility is also achieved by an additional feedback network A, the (low-pass) transfer function of which limits the high-frequency content. The basic principle is shown in Fig. 3. It is found that at the frequencies at which the transfer function of the feedback branch reaches certain critical values, the operational amplifier begins to oscillate. For example, if R₁ = 10 kΩ and C₀ = 0.8 µF, the critical frequency is 19.9 Hz; this low-pass characteristic leads at that frequency to a total loop gain equal to 1, and at that same frequency to a phase shift of −180°.

The lowest conceivable critical case for oscillation is that in which the feedback transmission at the critical frequency approaches 1, meaning the entire feedback loop just reaches the oscillation threshold. One arrives at the lowest possible frequency of the self-sustaining oscillation by choosing the component values appropriately, as described in Appendix 1 (Eqs. 3 and 4).

One considers the essentially important simplest case first. An operational amplifier is shown in Fig. 4 connected through external components. The signal at the input is differentiated and fed back via Bode’s circuit. The transfer function for this particular circuit (Fig. 4) takes the form given in Eq. (5).

For the frequency diagram of the transfer characteristic, several combinations of R₄ and C₄ are considered. Let R₁ = 10 kΩ, R₄ = 20 kΩ, C₄ = 100 nF. The Bode plot is plotted for these component values. The transfer characteristic shows characteristic slopes in the frequency response plot of Fig. 4.

We consider next the interesting special case. An operational amplifier is shown in the circuit of Fig. 5 with a transfer characteristic. With a step function at the input, both the Bode slope criterion and the resulting transient behaviour can be analyzed. An adequate frequency-domain approach (Appendix 3) evaluates the total loop gain and demonstrates that under certain conditions, a frequency f₀ is reached at which:

(5)

The frequency response of the operational amplifier exhibits both a magnitude slope and a phase curve that reach limiting values at high frequencies. With the values R₄ = 20 kΩ and C₄ = 100 nF, a frequency of approximately f₀ = 79.6 Hz is computed from the basic formula.

[Page 20]

[Figure: Frequency response curves showing the Bode plots for the first and second stages with and without lag compensation, and a circuit diagram of the frequency-setting operational-amplifier network. Fig. 6: Transfer function of a variable-frequency integrator; Fig. 7: Definition of the transfer factor; Fig. 8: Frequency-response characteristics of the frequency-response generator.]

…and from the frequency-domain analysis. Eq. (7) expresses the resulting function, which is illustrated by Fig. 6:

For the case K₁ = K₂, the following fundamental formula applies (Eq. 8).

The associated frequency response is plotted in the lower portion of Fig. 6 as a function of the normalized frequency Ω = ω/ω₀.

We next examine the three simplest cases for R₄ and C₄ by analyzing the frequency response expression from Appendix Eq. 7. In this form, the complete analysis of the Bode plots becomes possible in combination with the description in Appendix 3, as illustrated by the figures accompanying this text.

For K₁ = K₂ = 1, the eigenfrequency and damping factor are shown in the accompanying Fig. 8. The Bode magnitude curve (|T(jΩ)|) and the Bode phase curve (arg T(jΩ)) are plotted as a function of the normalized frequency Ω.

The circuit shown in Fig. 8 uses two operational amplifiers, one acting as a frequency-selective integrator and the other providing frequency-response shaping. By choosing the coefficients K₁, K₂ and the R–C combinations appropriately, any desired frequency characteristic can be achieved.

The proof of the circuit diagram in Fig. 8 and the frequency-response characteristic: the main values R₄ = 20 kΩ and C₀ = 0.8 µF give a Nyquist frequency of 994 Hz, whereas the coefficient combination K₁ = K₂ = 0.01 gives f₀ = 9.94 kHz; both values appear clearly in the Bode plots.

[Page 21]

[Figures: Bode magnitude and phase plots for first and second stages at various Q values, with and without lag compensation.]

Fig. 10: Frequency response of the 1st and 2nd stages without lag compensation (normalized curves plotted).

Fig. 11: Frequency response of the 1st and 2nd stages with lag compensation (normalized curves plotted).

Fig. 12: Frequency response of the 3rd stage without lag compensation.

Fig. 13: Frequency response of the 4th stage with lag compensation (normalized curves plotted).

We now return to the basic premise and from there give an overview of all cases. Fig. 8 shows the fundamental circuit through which all of the following analysis is made possible. The transfer characteristics were calculated for the cases K₄ = 20 kΩ, C₄ = 100 nF, and other values. The following conclusions result from the comparison of the normalized curves (Appendix 3):

For K₁ = K₂ = 1: f₀ = 79.6 Hz, D = 24.48, with damping (overdamped).
For K₁ = K₂ = 0.1: f₀ = 25.2 Hz, D = 7.74.
For K₁ = K₂ = 0.01: f₀ = 7.96 Hz, D = 2.45.
For K₁ = K₂ = 0.001: f₀ = 2.52 Hz, D = 0.77.

Fig. 14: Frequency response of the 1st and 2nd stages with lag compensation — the normalized curves are plotted.

The frequency response at the output of the operational amplifier shows a characteristic shape. Fig. 14 (lower portion) illustrates the step response for the given component values.

[Page 22]

[Continued frequency analysis — additional filter configurations and Q-factor plots.]

The additional feedback resistor R₄ is taken into consideration in this section. The transfer functions for filters are also given. The transfer functions T₁(s) and T₂(s) are defined:

T₁(s) = Y₁(s)/U(s), T₂(s) = Y₂(s)/U(s)

with the filter parameters A, B, and C defined at the output, and the overall transfer function of the filter is expressed in terms of these. The transfer functions become:

T₁(s) = N₁(s)/D(s), T₂(s) = N₂(s)/D(s)

Here the values S₁(B), S₂(B), and A(B) are given in table form: for Q = 5, the values S₁(B) = 0.282, S₂(B) = 0.0565 are found; for Q = 10, the values S₁(B) = 0.141, S₂(B) = 0.0141 are found; for Q = 20, the values S₁(B) = 0.0707, S₂(B) = 0.00354.

The resulting frequency and phase responses are shown for each Q value. At the frequency f = f₀, the following behavior is observed:

For Q = 5 (ω = 180°): the Bode phase crosses –180° at f₀.
For Q = 10 (ω = 180°): again at f₀.
For Q = 20 (ω = 180°): again at f₀.

To show the cutoff-frequency behavior, the normalized plot uses Ω = f/f₀, with f₀ at the frequency of interest. For very high frequencies the transfer function magnitude drops at –40 dB/decade, and the phase approaches –180°.

Based on these characteristics, it is established that the parameters Q = 5, 10, and 20 give essentially the same normalized cutoff frequency shape, but differ in the height of the resonance peak.

[Page 23]

[Figures: Filter frequency-response magnitude and phase curves for various Q values; circuit diagram of the main filter configuration.]

Data and the values A and C at the input characterize the filter. The transfer functions become:

T₁(s) = 1 / (1 + s·τ₁ + s²·τ₁·τ₂), T₂(s) = s·τ₁ / (1 + s·τ₁ + s²·τ₁·τ₂)

For a second-order low-pass function the pole frequency is given by:

ω₀ = 1/√(τ₁·τ₂)

and the quality factor Q:

Q = √(τ₂/τ₁) / (1 + …)

The values obtained are: for S₁(B) and S₂(B) at Q = 34.48, f₀ = 24.48 MHz; for K₄ = Q = 150 kΩ, f₀ = 150 MHz. The plots of Fig. 23 show the variation of magnitude |T| and phase φ as functions of Q for input to the filter.

Near the resonance frequency (f/f₀ = 1), the magnitude exhibits a peak for high Q, while the phase passes through –90°. For very high frequencies the curve follows –40 dB/decade attenuation and –180° phase shift.

The simulation confirms that the lowest frequencies belong to f₁ = 1 and the phase Φ = 180°. For the higher frequencies: f₁ > 1 and the phase Φ > 180°.

To identify the limiting frequency f₀, the Bode plot of the gain and the associated phase are taken and compared. In Fig. 25 the transfer function magnitude (Bode) and phase as a function of input frequency Ω are shown for the standard circuit.

[Page 24]

The value f₀ through Q (Fig. 25) shows the Bode frequency response of the main filter circuit. The condition for the transfer factor reaches a minimum of −∞ dB (zero) at: only the Q value for which the circuit passes zero depends on the output voltage amplification and on the frequency tuning.

It must be established that the transfer function T(jω) does not become zero at an intermediate frequency except for Q equal to 1/√2 in the standard all-pass filter configuration.

For the frequencies f₀ = 460 Hz, the attenuation is −∞ dB; for f₀ = 1500 Hz, the attenuation is −∞ dB; for f₀ = 4600 Hz, the attenuation is also −∞ dB. For Q = 150 kΩ: f₀ = 460 Hz, f₀ = 1500 Hz, and f₀ = 4600 Hz; for K₄ = 0 and K₄ = 150 kΩ: f₀ = 150 MHz. Given:

T(jΩ) → 0 at Ω → 0 (DC blocking), T(jΩ) → 0 as Ω → ∞.

For all practical filter combinations, Q = 460 Hz gives the cross-over, and the phase of the Hopf-parameter curve shows that the resulting filter acts as a narrow-band bandpass.

As an output voltage amplification (Bode Fig. 25), the resulting deviation from the standard transfer shape (Bode) begins at that frequency and causes the following:

At f₀ = 460 Hz the phase is 180°; the Bode magnitude is 34 dB.
At f₀ = 1500 Hz, the phase is 180°; the Bode magnitude is also shown.
At f₀ = 4500 Hz, the filter produces roughly similar output at the given Q.

And the base fundamental Q is given by:

Q₀ = √(R₂/R₁) / (…)

[Page 25]

(in Bild 31 is shown as already described) Additionally, the distortions of the frequency f(ω) are shown, which arise in the calculation as a result of the circuit. The spectral compositions of the harmonic and subharmonic components of the Hopf signal are then plotted. These are produced by the non-linear elements of the operational amplifier circuit. In Bild 32 the individual harmonics and their relationship to the fundamental frequency are plotted separately.

The principal component content shows that for the circuit with R₄ = 1 MΩ and the frequency f₀ the THD reaches a minimum. The Bode amplitude-frequency response (Bild 32) and the step response (Bild 31) display the resulting behavior.

4. Special properties of the variable-frequency operational amplifier

4.1 Self-oscillation, bandwidth, and dynamic factor

The self-oscillation occurs when both conditions simultaneously prevail: (a) the loop gain equals exactly 1, and (b) the total loop phase shift equals 180° at the critical frequency. The bandwidth and the dynamic range are two of the most important parameters of the overall circuit. The dynamic factor D relates to the ratio of the maximum undistorted output amplitude to the minimum discernible signal amplitude.

For the bandwidth, the specification is as follows: the bandwidth BWref = f₀/Q, where Q is the loaded quality factor. For example, for f₀ = 5 kHz and Q = 10, BWref = 500 Hz.

For the self-oscillation frequency of the circuit, the relevant formula is (Eq. 14):

f₀ = 1 / (2π · τ)

where τ is the time constant of the circuit.

[Page 26]

τ, the parallel from feedback-R₄ (Bild 25), becomes at zero the parallel value of the two feedback quantities L₁, while τ₀ is the anti-parallel to the feedback network value. The circuit-level contribution of the feedback factor b₀ is then:

b₀ = τ₀/(τ + τ₀)

The contribution of the self-oscillation threshold is derived from:

b₀ = R₄ / (R₁ + R₄ + …) (Eq. 16)

The Hopf-feedback element contributes the additional frequency Ω₀ = ω₀·τ (normalized) to the loop. The analysis is as follows:

4.2 Step response

The step response determines the bandwidth in time domain. A signal enters at the input and the output responds after a step function is applied. In Bild 34, the normalized step response is shown in the time domain.

After the step input the response exhibits the classical second-order behavior:

y(t) = 1 − e^(−ωₙ·D·t) · [cos(ωₙ·√(1−D²)·t) + D/√(1−D²) · sin(ωₙ·√(1−D²)·t)]

For different values of D (underdamped, critically damped, overdamped), the curves show the characteristic forms. The horizontal axis is normalized time t·ω₀. The overshoot M_p occurs at a time t_p = π / (ω₀·√(1−D²)).

4.3 Noise

The noise at the output of the transistors and operational amplifier in both the low-frequency region and the high-frequency region is investigated next. The decisive influence of the noise at the input is through the transistor pair — the differential pair — at the input stage of the amplifier. The noise behavior is described by the noise voltage e_n and the noise current i_n, which are referred to the input.

In Bild 35 a typical measured step response is shown for a step input of V = 5 V:

at f₀ = 5 kHz: the response rises with characteristic time constant and shows appropriate settling
at f₀ = 10 kHz: faster rise, smaller time constant
at f₀ = 20 kHz: even faster rise, minimum settling time
at f₀ = 40 kHz: fastest, approaching instantaneous for DC analysis

[Page 27]

The variable-frequency oscillator, for R₄ = R₄ = 200 Ω, in the filter bandwidth gives a frequency-response peak for large D (larger than 1 MΩ). This can be verified by the overall spectral content at the output. For large K₄ = 200 kΩ, the frequency-response peak comes to Q ≈ 5 and is found at f₀ = 50 kHz. The attenuation K₄ = 200 kΩ gives the bandwidth BW = 200 Hz at exactly this resonant frequency.

4.4 Frequency tracking

In general, the frequency at the output of the operational amplifier can be changed or tracked externally. The common technique applies a voltage-controlled resistor network or a multiplying digital-to-analog converter to set the time constant.

The step responses in Bild 36a, b, and c give an impression of the tracking behavior:

In Bild 36a: the narrow-band bandpass output (f₀ ≈ 5 kHz) shows that at the filter output an approximately sinusoidal waveform appears at the resonant frequency after a step input.

In Bild 36b: at a somewhat higher frequency, the resonance response shows a longer decay envelope.

In Bild 36c: finally, for the broadband case, the output corresponds to a fast step response.

The tracking properties make the circuit suitable for frequency-selective signal filtering in real-time measurement applications.

[Page 28]

[Figures: Oscilloscope photographs of the step response.]

(a) at positive input voltage

Bild 38: Comparison of the overdriving — in the upper half of the figure the step of 5 V is applied; while in the lower half the overdriven case with large input amplitude shows the characteristic clipping. The Nyquist-frequency at the sampling output is clearly recognizable.

−10 V/line — −20 V (1 kHz) distortion range: the limiting circuit of the operational amplifier works; through the Hopf-junction network the amplitude is compressed and the total harmonic distortion is reduced.

K₀ = V/E — 10 dB amplitude limiting is applied. With 5 V and with 10 V at the limiting resistor R₁ = R₂ a zero crossing occurs simultaneously at both the output and the input of the amplifier — this is a Lissajous-type behavior in the phase diagram.

[Oscilloscope image: Fig. 38. Operational amplifier clipping behavior. Positive input voltage step, positive output (upper trace) and negative input step (lower trace).]

−10 V/div — −20 V (1 kHz) distortion; at the grid output a maximum of ≈ 5 V overdrive is needed to keep the output within the linear range.

The amplitude of the overdriving is, however, already substantially reduced after only several (2–3) cycles through the zero-feedback circuit of the operational amplifier. The number of cycles required depends on the bandwidth and damping factors.

Through the use of a limiter at the amplifier output — a Zener diode or a diode clamp — the number of overdriven cycles required before the circuit recovers is also reduced substantially. The effect of such a limiter in the operational amplifier output is to restore near-linear operation within 1–2 cycles.

The formula for the limiting behavior of the Hopf-zero-passage circuit:

$\dot{x} = -D_{eff} \cdot \omega_0 \cdot x + \omega_0 \cdot \sqrt{1 - D^2} \cdot y$ (Eq. 22)

where K is the coefficient of the feedback and x, y are state variables in the operational-amplifier integration circuit.

[Page 29]

f_{HA} is the limiting frequency of the Hopf-feedback limiter, whereas f_{int} is the limiting frequency of the Kolmogorov-type gain feedback.

For Differential-Phase-Modulators one can achieve a (1/f_HD) factor of 99 µs per radian. The operational amplifier drift coefficient is found to be approximately 99 µs/rad at the base value.

For a Differential-Phase-Modulator one can achieve an efficiency factor (1/f_H) of 99 µs per radian of relative drift. The value K = 1/f_D is a measure of the Hopf drift factor.

Each of these differential mode factors has certain drift limits, which are set down: if one uses only a single (non-differential) transistor, the drift per degree Celsius is roughly 99 times larger than for the differential case.

The Lissajous-circuit coefficient at the feedback amplifier (the B and C blocks in Fig. 37) uses the constant zero feedback for the given situation. Zero at the amplifier output brings about, together with the additional switching path, an additional phase-shift contribution:

$s = (-D \pm j\sqrt{1-D^2}) \cdot \omega_0$ (Eq. 29)

For the Differential-Phase-Modulator base value, one can calculate an output voltage (at the zero-crossing detector output) of:

$U_{out} = U_T \cdot \ln(I_C / I_{C0})$ (Eq. 30)

The Lissajous-coefficient as given by Eq. (30) defines the operating frequency of the circuit. Typically the value K₀ = 1/f_HD gives approximately 99 µs at the standard drift limit.

For a Differential-Phase-Modulator the gain is, as a rule, a factor of K₀ = 1/f_HD = 99 per degree Kelvin.

Bild 39: Typical example of a drift compensation circuit using a differential transistor pair. The temperature drift of the baseline frequency f₀ is thereby reduced to a negligible value through the cancellation action of the matched transistor pair.

The table in the following (Table in Appendix 1) gives the reference-frequency drift values for several operational-amplifier configurations:

Reference frequency	Drift of f₀	Drift of f₀ at input
f₀ = 1 kHz	K₄ = −15 µs/K	K₄ = −0.15 µs/K
f₀ = 10 kHz	K₄ = −1.5 µs/K	K₄ = −0.015 µs/K
f₀ = 100 kHz	K₄ = −0.15 µs/K	K₄ = −0.0015 µs/K

[Page 30]

at 10 µV: While the noise floor is at 10 µV and a larger drift of the temperature causes a greater drift of the Hopf gain factor, the overall stability remains acceptable.

The table shows, approximately, the effect of an input step at voltage U_E = 5 V:

For time t > 0 the following sequence is observed:

the output begins to rise as a function of frequency f₀ and bandwidth Q/f₀.
The zero-crossing detector fires at approximately t = 1/(2f₀) seconds.
The final steady-state amplitude is reached after several time constants τ = Q/ω₀.

The results of the drift measurement at the input are displayed. Approximately 0.37 K or 1/e of the initial offset remains after one time constant.

Appendix 1: Calculation of the frequency-setting with transistor circuits

The n-th parameter of the Balun-Parallelkreis acts as the frequency-determining element (Eq. N). In all cases a voltage U is applied and the Lissajous parameter is thereby evaluated as (Eq. N+1):

And the resulting Lissajous output function is (Bild A1 schematic):

[Circuit diagram: Bild A1. Schematic circuit. Basic switching transistor gain stage with feedback.]

Bild A1. Schematic of the frequency-determining transistor stage.

and the Lissajous-frequency-circuit element acts as (Eq. A2):

$f_0 = f_0(\alpha_0, \alpha_1, …)$ (Eq. A2)

[Page 31]

Slew rate: ω₀ = 2π·f, K = 2π·56 kHz; Δf = 2π·f₀; Swivel-bandwidth Δf

Frequency tracking Δf₀ = ω₀ · K₁ · K₂ · …; Relative coefficient: K₀ = K₂/K₁; Swivel-bandwidth Δf₀

The transfer function of the frequency-swivel amplifier:

$T(j\omega) = \frac{K_0 \cdot j\omega/\omega_0}{1 + j\omega(1/\omega_0)(K_1 + K_2 + \ldots)}$

Swivel rate ω₀ = 2π·56 kHz; the slew coefficient is 2π·f₀; the frequency tracking gives Δf₀ = −∞ dB at the Lissajous output.

For the transfer function of the swivel-frequency stage, the S₁ → S₁ → S₁(= 0): the output passes through the chain of stage-gains K₁ · K₂ with the Swivel-bandwidth Δf₀.

Appendix 2: Ring oscillator and frequency-stabilization of the operational-amplifier circuit

The frequency stabilization applies the feed voltage U_g from the fixed reference and then from the variable frequency-control voltage U_st. The output U_a is derived:

U_a = (U_g − U_ref) · K_v (in the positive-feedback phase)

In the in-phase condition:

Over the capacitor K in the closed Lissajous circuit it is possible to write:

As K approaches a value of K_v, the in-phase condition gives the Lissajous frequency.

We obtain from Eqs. (N.4) and (N.5) the general oscillation frequency:

U_st = U_T · ln(I₁/I₂)

And both values are equal exactly when:

U_T / U_st = U_T / (U_T · ln(I₁/I₂)) → 1

Both values are equal at the Hopf-zero, giving the condition K_eff = 1.

[Page 32]

At the output of the swivel-frequency oscillator stands the variable voltage:

$U_{out} = U_{ref}$ (Eq. N.8)

For the input-output equations in the out-of-phase condition:

$U_{out,A} = -U_{ref}$

in the given-opposite phase in negative direction:

Both values are equal, which gives:

$U_{out} = \pm U_{ref}$

It can be shown from Eqs. (N.6), (N.8), and (N.9) that the total resulting Lissajous condition is an odd function of U_T:

$U_{out} = U_T \cdot \tanh^{-1}(U_{in}/U_{sat})$

And the base value of the Q is a function of the variable capacitor K_v:

$Q_{eff} = \frac{1}{2D}$

The degree of frequency-modulation about the nominal frequency f₀ is determined by the ratio of the variable voltage to the reference voltage U_ref:

FM deviation = Δf / f₀ = K_fm · (U_FM / U_ref)

Literature

[1] Hoffmann: “Analog computers and their applications to Bode-diagram analysis.” Elektronik (Electronics), Bd. 8 (1962). [2] H. Gall: “Design of switchable amplifiers for analog computers.” Nachrichtentechnik (Information Technology), Bd. 13 (1963), p. 178–182. [3] K. Steinbuch, F. Simon: “Taschenbuch der Nachrichtenverarbeitung” (Pocket book of information processing). 1st ed. Berlin, New York (1962). [4] P. Baur, S. Unger: “Elements of the operational amplifier design.” Nachrichtentechnik, p. 1–10. [5] M. Schreiber, D. Schmidt: “Frequency characteristics of differential operational amplifier stages.” Telefunken-Zeitung, Bd. 36 (1963), p. 21–27. [6] H. Roth, U. Müller: “Self-oscillating networks in analog computing.” Telefunken-Zeitung, Bd. 38 (1965), p. 12–19 and 21–26.

[Pages 33–36: Electronic Switches for Integrator Control]

Electronic Switches for Integrator Control

by N. Kley, E. Haum, K. Müller, and P. Wuß

The development of modern analog computers has brought with it a series of repetitive- and iteration-type computing operations. The discrete Diode types, in addition to the established saturation-controlled devices, are employed; the number of integrators, along with all relevant forward computing elements, is substantially reduced. In its simplest form, a switch carries out either a “reset,” a “hold,” or an “initial-condition” function.

The electronic switch is discussed with reference to the integration controls (Bild 1 through Bild 6 of this section). The switch variable k_s and the resistance k_R are connected appropriately; from the switching action of the key k_s, together with the input current, the functional state of the operational amplifier changes.

In Bild 1 and Bild 4, the principle of an integrator is shown in two forms: the first form has a single feedback capacitor C and an input resistor R, and the second form (Bild 4) adds the electronic switch.

The relay or electronic switch takes over the function of the controlled reset of the integrator to its initial condition, of the hold function during which the integrator output is frozen, and of the integration or run function during which the integration proceeds.

2. Electronic Switching Elements

The present article concerns the electronic realization of the switching control — k_s and k_R (Bild 1 through Bild 6) — by means of a transistor switch. The switching transistor operates in two possible states: in the blocking (off) state, in which the transistor presents a high resistance between collector and emitter; and in the saturation (on) state, in which the transistor presents a very low resistance. Through the switching action, the different states of the integrator are controlled.

(Fig. 1: Integrator with switching control circuit — schematic diagram)

(Fig. 2: Basic transistor switch circuit)

In the on-state the transistor saturates; the residual voltage U_ce,sat between collector and emitter in saturation is very small (of the order of a few mV for a well-designed transistor). This residual voltage causes an offset error at the integrator output, which must be kept as small as possible.

In the off-state, the transistor presents a large but finite resistance between collector and emitter. In addition, the leakage current I_cb0 at the collector-base junction causes a small error current which feeds into the summing junction. This current also leads to an error in the integrator output voltage.

[Page 34]

2. Electronic Switching Elements (continued)

In Bild 1 and Bild 2 it is shown clearly: k_s switches the feedback, and k_R holds the input. All switching variants for k_s and k_R are shown in combination in Bild 2:

From this combination, the switching states are derived: the hold state H, the initial condition IC, and the compute state C. Each of these states requires a specific combination of switch positions for k_s and k_R.

The operational amplifier in the non-inverting configuration has the summing junction at its negative input. In the hold mode:

k_R is open (high resistance)
k_s is closed (short across capacitor C or holding the charge)

In the initial condition (reset) mode:

k_R is closed to a reference voltage U_0
k_s is opened

In the compute mode:

both k_s and k_R are in the compute position

[Circuit diagram: Bild 3. Complete integrator control circuit with switching transistors.]

The switching criterion is set by the control voltage applied to the base of each switching transistor. Control logic voltages of U_B = +10 V (on) and U_B = −10 V (off) are commonly used in conjunction with resistors R_B in the base circuit.

The half-value time constant of the key transistor is τ = R_B · C_B, and the transition from off to on (or on to off) takes a finite switching time t_sw determined largely by the base charge storage.

2.1 Switches with continuous-gate drive

In Bild 5 the principle of the first switching method is shown. The gate of the transistor switch is driven continuously. The Bild 6 then shows the circuit (Bild 6a) with purely diode control, and (Bild 6b) with a transistor in the common-emitter configuration.

[Bild 5: Electronic switch — continuous-gate control circuit. Bild 6: (a) Diode-controlled switch; (b) transistor common-emitter switch.]

For the continuous-mode driving, the switching transistor T₁ is held in a defined state for the duration of the control. The current through T₁ is determined by R₁, R₂, the supply voltage U_B, and the base-emitter voltage U_BE.

In the on state the collector is at a low voltage (near 0 V); in the off state the collector is at the positive supply voltage. An important feature is:

In the on state, the output (integrator) voltage can be held or driven to the desired initial condition U_0.

In the off state, the leakage current is minimized and the integrator output is effectively disconnected from the switching transistor.

For the switch in state k_s and k_R, one can express the collector-emitter voltage as:

$U_{CE} = U_{CC} - I_C \cdot R_C$ (Eq. 1)

And in the steady-state on condition:

$I_C = \frac{U_{CC} - U_{CE,sat}}{R_C}$

The dominant and important transistor parameters for the basic switch — U_CE,sat (saturation voltage), I_CBO (leakage current), and h_FE (current gain) — all enter into the design of the switch.

[Page 35]

3.2 Switches with continuous drive (continued)

In Bild 6a the switch design employs two transistors: T₁ and T₂ in the form shown. This can handle a supply voltage U_B up to the value given by the base transistor block. In each state for U_B and K_s = 1 the output reaches the correct holding voltage without significant offset.

One notably important property for the diode switch is that the holding current I₀ can be controlled with a simple pull-up resistor. In Bild 6a, driving the gate positive through R₁ brings T₁ into saturation while T₂ is blocked.

Bild 6a: Transistor switch — complementary connection using an NPN T₁ and a PNP T₂:

In the zero state (k_s = 0): T₁ blocked, T₂ saturated, output at −U_cc.
In the one state (k_s = 1): T₁ saturated, T₂ blocked, output at +U_cc.

Bild 6b: Transistor switch in the common-emitter configuration:

Driving the transistor T₁ through R_B from the logic control signal.
In saturation (on), the collector current I_C flows through R_C and the transistor.
In block (off), only the leakage current I_CBO flows through R_C.

In the steady state, an important limitation is:

For the switch in Bild 6a and Bild 6b, the current I_C and its relationship to the control voltage U_B is given. Both blocks present essentially the same characteristic transistor behavior — only the circuit polarity differs. An essential feature worth noting:

For the transistor in Bild 6a and K_s = 0 (blocking), the leakage current I_CBO is:

$I_{CBO} = I_{C0} \cdot e^{U_{CE}/U_T}$

where U_T = kT/e is the thermal voltage (≈ 26 mV at room temperature), and this leakage is amplified through the gain h_FE by the circuit.

A particularly large amount of attention must be given to the leakage current I_CBO in high-precision analog computers, since it appears directly as an error current at the integrator summing junction.

3.3 Switch with pulsed-gate drive

In Bild 7 a transistor-based electronic switch for the initial condition is shown, which was designed for analog computers with a repetitive operating mode at frequencies f₀, and in Bild 8 the complete switching element is shown.

A particularly important consideration: at high repetition frequencies (e.g., 50 kHz), the switching time t_sw and the base-charge storage time t_s must be much smaller than the period T = 1/f₀.

The key transistors for this design are selected with the following properties:

High cut-off frequency f_T (≥ 200 MHz recommended)
Low saturation voltage U_CE,sat (< 200 mV at I_C = 10 mA)
Low leakage current I_CBO (< 10 nA at 25°C)
High current gain h_FE (≥ 50 at I_C = 10 mA)

[Page 36]

…and with a very large leakage current I_CBO at the end. For the on state the transistor shows a voltage above +U_cc. For the off state, the transistor shows the voltage in the Hopf sense.

At the output of the switching transistors the leakage current I_CBO causes a drift at the collector. The transistor diode emits a small current which, together with the feedback path, causes the following behavior. For diode D₁ and K_s = 0 the leakage current flows through the feedback network.

Bild 38: Comparison of the overdriving — in the upper half of the figure the step is applied; for the comparator in the lower half, the Lissajous characteristic shows the expected limiting behavior.

In comparison with the offset arising from a large I_CBO, the dominant source of error in the off-state is the leakage current contribution, which adds directly to the integrator error:

$U_{error} = I_{CBO} \cdot R_{feedback}$ (Eq. N)

where R_feedback is the effective impedance seen by the leakage current path.

3.3 Switch with pulsed-feedback drive

The pulsed-feedback transistor switch is the most appropriate for analog computers with repetitive computing at high frequencies f₀.

For the pulsed switch, the drive signal at the base T_B has the form of a short positive or negative pulse of width t_p << T. The capacitor C_B holds the transistor in the correct state between pulses.

Bild 39: Transistor switch — pulsed drive for the initial-condition switch at f₀ = 5 kHz. The circuit values: R_B = 1 kΩ, C_B = 10 nF giving τ_B = 10 µs, which is comfortably longer than the period T = 200 µs.

3.4 Switch with diode-transistor circuit

The diode-transistor circuit is shown in Bild 40 and represents the most refined switching configuration in the article. The diode-transistor logic (DTL) approach combines the fast switching of the diode with the current amplification of the transistor.

Bild 40: Diode-transistor switch configuration — the k_s element.

Bild 41: Transistor switch — the k_s element as a 5-V switch for the initial-condition function.

In comparison with the other circuit forms described, the diode-transistor switch in Bild 40 and Bild 41 yields:

Switching time: t_sw ≈ 50–100 ns.
Residual (saturation) voltage: U_CE,sat ≈ 50–100 mV.
Leakage current in the off state: I_off ≈ 10–100 nA (depending on transistor type and temperature).

The leakage current in the off state remains as the most critical parameter for the precision of the integrator. Even 10 nA of leakage current flowing through a 10 MΩ feedback resistor produces an error voltage of 100 mV, which corresponds to a 1% error in a ±10 V full-scale system.

The resulting output voltage in the non-driven state is:

$U_{out} = -I_{off} \cdot R_f / (1 + A_0)$

where A₀ is the open-loop gain of the operational amplifier, and R_f is the integrator feedback resistance. Since A₀ is very large, the error is reduced but never completely eliminated.

[Bild 40: Diode-transistor switch schematic. Bild 41: Transistor switch with 5 V logic levels for initial-condition control.]

Multiplication and Division with Transistor Circuits (continued)

(Telefunken-Zeitung, Issue 1, 1966, pp. 37–54)

[Page 37]

In the so-called “halving” circuit (Bild 8), a unit comparable to the analog-computer multiplier must be employed.

With other methods it proves simpler still.

2.2 Transistor Rectifiers

The reference quantity U₀ in Bild 7(a) takes on with any load whatever a value of approximately 780 mV and is transformed in reverse by the Schottky diode. The Schottky diode D in Bild 7(b) can replace the reference branch of Bild 7(a). The diode current is the reference current; the parameters C₀ and C₁ characterize it. The comparison of Bild 7(a) and 7(b) results in:

c₀ = ln(I_D/I₀) c₁ = −1/U_T

The relative error of the rectifier is thereby determined:

(equation for relative error Δf/f as a function of system parameters)

when all other error sources at the inputs are set to zero. The error is ∝ (ε₀/I₀)², where I₀ = 10⁻¹⁵ A and ε₀ = 1·10⁻⁹ A, and the relative error becomes ε = 2·10⁻¹² — entirely negligible.

This error is thus smaller for all conceivable inputs by several orders of magnitude than the error of the transistor. As a consequence the multiplier may by itself be regarded as free from errors due to base current in the rectifier section.

4. The Extended Circuit Using Diodes and Half-Waves

Bild 9 (see facing page) illustrates the transistor circuit for the extended multiplier in schematic form. The function block T3 realizes the function f(x), T4 realizes the function g(y) (see Bild 3b). The amplifiers are operated as integrators, so that after Bild 3a the function f(x) will be realized. The summer following Bild 3b is then used to generate g(y). The currents through T3 and T4 are measured via separate transresistance amplifiers; after Bild 3(a) these currents are sent into the subtraction stage. The Schottky diode D operates as a temperature-corrected rectifier.

A temperature coefficient of approximately T = −2 mV/°C results for Bild 9(a). At the Schottky-junction the voltage follows:

U_D = U_T · ln(I_D / I_S)

The integration amplifier produces from the Bild 9 input signals the functions f(x) and g(y); the Schottky diodes operate as the reference stage (Bild 9b).

Bild 9: Circuit diagram and functional-block diagram of the extended transistor multiplier.

(circuit schematic and functional block diagram, as illustrated)

[Page 38]

In the chain of the “halving” circuit (Bild 8a), the load on the Transistor Voltage-amplifier stage (TVS) is approximately 780 mV at each node without any load, and it is reproduced in inverted form by the Schottky diode. The relative error of the rectifier is then:

The relative error depends on the system and is determined principally by:

F_rel = Δg/g = δ (I_S₁ / I_S₀)

where δ denotes the reference error and I_S₀, I_S₁ are the saturation currents of the Schottky diodes.

During the Betriebsfrequenz (operating frequency) β, the error becomes smaller than β = 10 × 10⁻³ when the Kennliniensteigung (characteristic slope) is adequate.

3.2 Folded-Diode Stage (Voltage Multiplier)

While the diodes in the smaller stage are so heavily overloaded that their junction temperature T_j can be overridden by the stage temperature T_U, larger ones are necessary, because the behavior of the transistor amplifier at high frequencies is more complex.

This error grows proportional to the size of the diode. The analog comparer is therefore more easily implemented with the half-wave solution.

Bild 5: Circuit and functional diagram of the combined-diode rectifier.

(circuit diagram as illustrated)

[Page 39]

Error Estimation for Diode Function Generators

by R. Krey and E. Holm

When applying diode function generators one often encounters the question of how accurately the approximated function can be represented. In the following a formula is derived by which this question can be answered quickly for the most important cases with little computational effort.

1. Breakpoint Distribution and Maximum Principle

The given function f(x) is to be approximated by a piecewise-linear function y_approx over the interval [a, b]. The approximation error at any point is denoted:

ε(x) = y_approx(x) − f(x)

If n breakpoints x₁, x₂, …, xₙ are used to subdivide the interval — from x₀ = a to xₙ₊₁ = b, yielding n+1 sub-intervals — then within each sub-interval [xₖ, xₖ₊₁] a linear segment passes through the function f(x) at the two endpoints, and the approximation error is:

ε(x) = y_approx(x) − f(x)

The approximation polygon y_approx passes through the function f(x) at the Randpunkte (boundary points) x = xₖ and x = xₖ₊₁.

(diagram: Fig. 1 — Approximation of a function f(x) via a piecewise-linear polygon)

From this it follows that within each sub-interval the error is a function of the second derivative of f(x). The approximation error within the k-th sub-interval (xₖ ≤ x ≤ xₖ₊₁) is:

ε_k(x) = [f(xₖ₊₁) − f(xₖ)] / (xₖ₊₁ − xₖ) · (x − xₖ) − [f(x) − f(xₖ)]

The maximum magnitude of the error within the k-th sub-interval is found by differentiation and setting the derivative to zero. For a function with a monotonically varying second derivative this yields the maximum error at an interior point of the sub-interval.

[Page 40]

The approximation factor f(x) can be expressed by means of the Polygon y_appro as one Bernstein polynomial of the boundary values:

y_approx(x) = f(xₖ) + [f(xₖ₊₁) − f(xₖ)] · (x − xₖ) / (xₖ₊₁ − xₖ)

The approximated polygon y_approx passes through f(x) at each breakpoint, and the error at an interior point is:

ε(x) = f(x) − y_approx(x)

For the maximum of this error within the k-th sub-interval it holds that the location of the extremum (x = ξₖ) satisfies:

f’(ξₖ) = [f(xₖ₊₁) − f(xₖ)] / (xₖ₊₁ − xₖ)

Thus the slope of the chord connecting the two boundary values equals the slope of f(x) at the maximum-error point (the mean value theorem).

Within each sub-interval the approximation function has the form of equations (6) and (7) from the boundary conditions stated.

The maximum error in the k-th sub-interval is then:

ε_max,k = max |ε(x)| for x ∈ [xₖ, xₖ₊₁]

The approximated polygon y_approx is thus represented by n+1 linear segments. The overall maximum principal error F is:

F = max_k { ε_max,k }

With Eq. (5) the maximum error in the k-th sub-interval from the boundary conditions (6) and (7) is found; the result enters equations (8) and (9) for the general sub-interval.

For a = 0, n = 0 at the first breakpoint, the corresponding piecewise linear approximation has 1 segment with y at 0 at one end; following this initial condition and the requirement that the polygon touch f(x) at both endpoints yields:

ε_max,0 = (h²/8) · max |f”(x)|

for the sub-interval of width h = xₖ₊₁ − xₖ.

Table:

Case	Approximation method	F_max
a)	Polygon through endpoints	h²/8 · max
b)	Chord approximation	—

[N: = the maximum normalizing factor given in the table for typical sub-interval configurations]

With Eq. (8) and the two boundary conditions, the Koeffizientenvergleich (coefficient comparison) for this system of differential equations yields:

ε_max ~ h² · |f”| / 8

[Page 41]

Substituting into Eqs. (5) and (7) and the statements of f(x) for x = 0 … n, the equivalences:

ε_max(f, [a, b]) ~ h² · |f”|_max / 8

hold for both piecewise-linear approximations, and these lead through the Koeffizientenvergleich (coefficient matching) to valid systems of difference equations over all sub-intervals.

The solution of Gls. (10) is of the form:

ε_k = F · [something in terms of n, k]

and for different n₀, n₁ the general Paretofunktion (Pareto function) evaluates to:

Σ ε_k = F · Σ [1/(k!)] = F · sum terms

The sum over all sub-intervals j held to zero satisfies Gls. (10), as any linear combination of the solutions ε_{k, j} also satisfies the equation.

The maximum principal error F is not limited to the same value for all sub-intervals, but rather only their maximum.

From Eqs. (10), (15), and (16) and the sub-interval boundary conditions, an additional equation results that, along with the requirement for equal maximum errors in all sub-intervals, establishes the optimum breakpoint distribution.

At the point of transition n = 1 the Knotenpunkt (node) at x = 0 gives:

ε_max = (h² / 8) · |f”(ξ)|_max = 1 step

constrained so that for the functions y₀, y₁ the Anfangsbedingungen (initial conditions) can be satisfied, and for the Paretofunktion the equal-ripple solution applies.

The solution to Gls. (10) exhibits the same form as before:

Gls. (19) and (20) are substituted by the conditions of Gls. (20) for x = 0, n = … thereby completing the matching.

By this means the Gls. (19) and (20) — the differential equations — are not general for negative n; they admit exactly as many linearly independent solutions as the equations have. The Koeffizientenvergleich provides conditions on the system of differential equations. The solution of the problem therefore yields:

ε = F · g (f, n, [a,b])

where g is a known factor, independent of the individual sub-interval boundaries.

[Page 42]

In the Erstannäherung (first approximation), it is allowable to put at every point the Ableitung (derivative) of the approximation equal to the derivative f’(x) — the result differs from this condition only in the Polygon-Knotenpunkte (polygon node points).

The function F (n, x) already satisfies Eq. (29) as a direct consequence. The additional Randbedingung (boundary condition) at x = n = 0 then establishes the value of F from Gls. (7) and (9):

F = (1/8) ∫ |f”(x)| dx in the sub-interval

The Gl. (29) thus yields the same result as the direct computation from Gls. (7) and (9). Furthermore, Gl. (29) holds even for the case where f(x) is not holomorphic (smooth) on the entire interval, provided f”(x) is piecewise continuous.

The maximum principal error F is:

F = (1/8) · (b − a)² / n² · max |f”|

Table of maximum principal errors F for various sub-interval widths and approximation types:

n	Sub-interval width h	F_max (normalizing value)
1	(b−a)	(b−a)²/8 · max
2	(b−a)/2	(b−a)²/32 · max
n	(b−a)/n	(b−a)²/(8n²) · max
*n with opt. spacing	optimal	(b−a)²/(8n²) · ∫

With Eq. (8) from the two boundary conditions, the coefficient comparison (Koeffizientenvergleich) for this system of differential equations yields a similar expression with equal maximum errors in each sub-interval. The factor N = h²/8 · |f”|_max is given in the table for individual normalizing sub-interval widths.

3. Correction for Sub-interval Boundaries near the Endpoint f(x)

The sub-interval boundaries (breakpoints) are placed so that the integrand |f”(x)|^(1/3) is used as the density; the breakpoints subdivide the integral of this density into equal parts. This is derived in the following.

For the starting point of the k-th sub-interval (x = xₖ) without any Startfehler (initial error), with x₀ = a and xₙ₊₁ = b the condition:

xₖ in interval such that ∫ₐˣᵏ |f”(t)|^(1/3) dt = k/(n+1) · ∫ₐᵇ |f”(t)|^(1/3) dt

holds. The maximum error is then in each sub-interval the same size.

In the immediate neighborhood of a zero breakpoint the function F(x) satisfies the boundary condition completely; because the starting condition for the lower limit of the sub-interval can only be satisfied on an interval of the correct length, the correction from Gls. (33)–(40) applies in the neighborhood of the zero breakpoint.

[Page 43]

Substituting in Gls. (5) and (7) the deviations of f(x) for x = 0 … n, the equivalences are obtained.

It is noteworthy that the Anzahl (number) n of breakpoints is fixed, independent of the sub-intervals chosen. The approximation error ε depends upon where the function f(x) begins and where it ends; the closer the function to linear, the smaller ε.

The approximation factor f_approx and the function f(x) satisfy a well-defined relationship for all n. Thus the approximated function f_approx passes through f(x) at all breakpoints, and the error profile resembles an equal-ripple (equiripple) pattern.

The Fehler (error) of the approximation ε(x) arises at intermediate points x between two breakpoints ξₖ and ξₖ₊₁. It follows:

ε(x) = f(x) − f_approx(x) = f(x) − { f(ξₖ) + [f(ξₖ₊₁) − f(ξₖ)] · (x − ξₖ) / (ξₖ₊₁ − ξₖ) }

with ξₖ⁺ being the upper endpoint of the k-th sub-interval.

(Fig. 3: Approximation of a function f(x) using piecewise-linear polygon — shown with multiple nodes and error envelope)

From this approximation the factor ε(x) in the sub-interval is exclusively determined by the Steigung (slope) of f(x) and the distance between the nodes of the approximation polygon.

Error in the Case of Endpoint and Node-Point Shifts of the Approximating Polygon

For the individual Knotenpunkte (node points), the Anfangsbedingungen (initial conditions) of the approximation polygon in Gl. (38) are altered slightly. Both the node points and the endpoints of the polygon will in general be displaced. This is treated within the context of the Knotenpunkt-displacement error for an arbitrary Knotenpunkt.

[Page 44]

The approximation error results from Bild 3 at the node points of the sub-interval y = ξₖ and y = ξₖ₊₁, and at a point y₀ lying beyond that, as the sum:

ε(x) = f(x) − [f_approx(ξₖ) + (f_approx(ξₖ₊₁) − f_approx(ξₖ)) · (x − ξₖ) / (ξₖ₊₁ − ξₖ)]

and the two nächsten Kurvenstücke (nearest curve segments):

Δy = f_approx(ξₖ) − f(ξₖ) and Δy₊ = f_approx(ξₖ₊₁) − f(ξₖ₊₁)

The approximated functions (38) and (46) below have the same form as the original function f(x); with further application of Gls. (46) and the boundary conditions from Gls. (8) and (9), the Fehlermaximum (maximum error) is found.

The largest correct approximation y_approx is achieved at breakpoints of the next function, ξₖ₋₁ and ξₖ₊₁. The particular Fehlerwert (error value) at the outer points of the sub-interval may differ from the inner-point maximum only through terms of order Δₖ (the breakpoint spacing).

The maximum inner error due to Bild 3 and from conditions (38), (42), (44), is that at the next-outer breakpoints 1, 2, 3 … including inner-point behavior, the error is a polynomial in Δₖ, and is in general determined by:

ε_max ~ Δₖ² / 8 · |f”(ξ)|

where ε_max is the maximum approximation error within the k-th sub-interval and |f”(ξ)| is the magnitude of the second derivative of f at an intermediate point.

Due to this result there is an inner maximum error per Bild 3 (Bild 14 cited below) in every case:

ε_max = (1/8) · Δₖ² · |f”|_max

This is the result of the Fehlerrechnung (error analysis) from Gls. (38) through (46) inclusive.

[Page 45]

Ideally the approximated polygon between the Knotenpunkte ξₖ and ξₖ₊₁ passes through the function f(x) at all intermediate points by the sum:

y_approx(x) = f(ξₖ) + Σ [f(ξₖ₊ⱼ) − f(ξₖ₊ⱼ₋₁)] · (term)

Which of the smallest Knotenpunkte ξₖ₊₁, or the absolute polygon y₀ between the Randpunkte (boundary nodes), is chosen is unimportant for the Genauigkeit (accuracy) of the approximation. The relative error then is:

Δε/ε ~ [ε_max_k / f(x)]

The comparison of the best and next-best polygon gives the relative Fehleranteil (error contribution):

ε_rel = ε_max / f_range

(Eq. 46 and following equations for relative error in terms of n and the function range)

From this formula one can determine, in relative terms, the larger factors n₁ and n₂; the relative error with n₂ > n₁ is smaller. When this error is measured, the polynomial minimum requires:

ε_rel = (1/(8n²)) · (b−a)² · max |f”| / f_range

for the Knotenpunkte Δₖ according to Table 4.

(Fig. 5a and 5b: Comparison of approximation functions y_approx at several values of the Knotenpunkte ξₖ, showing error curve ε(x) versus x)

From this formula one can derive, in the absolute sense, the Fehler (error) f₁, which is a Paretofunktion of the greatest relative error using Eqs. (46) and (48) — thus achieving the minimum relative Knotenpunkte-error with Δₖ^(opt).

For the Knotenpunkte Δₖ the Abhängigkeit of the best polygon from the given Tabellenfaktoren (table factors) n₁, n₂ is:

Δₖ^(opt) = (b−a) / n

and then the values f₁ and f₂ with different functions von x give:

f(x) = f₁ · x + f₂

(Eq. 47 through 49: the formulas relating error bound to function range and breakpoint number)

[Page 46]

(Equations 50–54: continued derivation)

where K₁ and K₂ are functions of f₁ and f₂ (the initial and final function values). Referring to the formulas (8)–(10) below from the Koeffizientenvergleich (coefficient comparison) [2], the Fehler (error) Δₖ follows:

Δₖ = C_D / (n + 1)² where C_D = (b−a)² / 8 · ∫ |f”|^(1/3) dx

The observation from formula (8) shows that Gls. (50) below — which is derived through partial integration from the relative error — cannot avoid the maximum error arising from the Anfangsbedingungen (initial conditions). Only for the very largest Knotenpunkte n is it possible to disregard this maximum:

C_D (f, n, [a, b]) → 0 as n → ∞

which shows the accuracy of the approximation increases without limit as the number of breakpoints increases.

With Gl. (50) and considering the relation from Gls. (47) and (48), the maximum achievable approximation accuracy is determined by:

ε_max^(opt) = C_D / (8n²)

This maximum error bound is set by the product of the Biegsamkeit (curvature) of the function and the squared sub-interval width.

4. Temperature Dependence of the Fehlergrenze (Error Bound)

(Fig. 6: Schematic of a transistor-based diode function generator with temperature-compensation network)

The temperature dependence of the diode characteristics gives rise to drift in the node-point positions. The node points shift proportionally with temperature variation. The temperature behavior can be described by the temperature coefficient TC:

TC ≈ −2 mV/°C (junction voltage temperature coefficient)

A temperature change of ΔT = 1 °C produces a shift in the breakpoint:

Δξ_TC = TC · ΔT / f’(ξₖ)

[Page 47]

Both the integrals from (33) and (37) for f(x) for x = 0 … n are obtained simultaneously through a further Partial-Integration (partial integration), and after the Umformung (transformation) inequality (42) applies.

(Fig. 6a – 6d: Temperature behavior of approximation function — oscilloscope traces showing the error waveform ε(x) as a function of position x, for: a) temperature T = 25 °C and frequency f = 1 kHz b) temperature T = 25 °C and frequency f = 10 kHz c) temperature T = 25 °C and frequency f = 50 kHz d) waveform at elevated temperature)

Gl. (38) describes the temperature drift of the error function ε. The oscilloscope display in Bild 6 shows the approximated Fehlerspannung (error voltage) as a sawtooth-like waveform at an operating frequency of f = 1 kHz. The Koeffizientenmaßstab (coefficient scale) is ε₀ = 3 × 10⁻³ V/mV; the error at this point lies within the specified Toleranzband (tolerance band).

Through a temperature variation of 7 °C the value ε₀ alters visibly, and the Fehler (error) in both ε_max and ε_min can be measured with sufficient precision. The Koeffizientenfehler (coefficient error) is C_D ≈ 10⁻³ (10⁻² for the latter case), and the corresponding node spacing remains within the required Genauigkeitsanforderung (accuracy requirement).

5. Compensation of the Temperature Drift of the Breakpoints

(Fig. 7: Block diagram of transistor diode function generator with temperature-compensation network)

One frequently encountered means of reducing the temperature sensitivity of a diode function generator is the use of a temperature-compensated reference supply for the bias voltages at each breakpoint. In the simplest case an additional diode is connected in such a way that its temperature coefficient cancels the drift of the approximation diodes.

For a complete Kompensation (compensation) of the temperature coefficient, one must ensure:

TC_comp + TC_diode ≈ 0

The auxiliary diode Q_comp is selected so that its temperature coefficient is equal and opposite to that of the network diodes. This condition is satisfied when the compensating diode operates at approximately the same current density as the function diodes.

[Page 48]

With Gls. (33) and (35) one can determine the shift of the Knotenpunkte n_k. The methods considered allow the reduction of temperature-induced Fehler (errors) by a factor of 10 or more; both these approaches are compared below in Bild 9.

If 1 ≤ t ≤ T_N, one obtains from Gl. (37) the optimal Fehler (error) as a function of t satisfying:

ε_max^(opt)(t) = ε_max^(opt)(T_N) · [T_N / t]^(something)

further, with the differential Gl. (38):

(∂ε/∂t)(t) = − [T_N / t²] · ε_max^(opt)(T_N)

and from this an estimate of the allowable Temperaturschwankung (temperature variation) ΔT follows as a straightforward computation.

In order to reduce the temperature error to the same level as the residual approximation error, compensation by means of a Kompensationsdiode (compensation diode) is employed; this is described in the literature [1, 2].

The temperature error of the function generator is:

Δε_TC = (∂ε/∂T) · ΔT

where ∂ε/∂T depends on the Netzwerkstruktur (network configuration) and on which particular sub-interval is being considered.

(Bild 8a: Circuit diagram of a diode function generator) (Bild 8b: Temperature-compensation sub-network with compensation diodes)

The Schaltung (circuit) shown in Bild 8a provides temperature compensation of the Knotenpunkte by referencing each breakpoint resistor to a temperature-sensitive voltage divider. Since both the breakpoint positions and the function slopes are affected by temperature, a simple Widerstandsnetzwerk (resistor network) can reduce the overall temperature coefficient substantially.

For the zweistufige Schaltung (two-stage circuit), the adequate compensation is:

ΔT_allowed ~ ε_budget / (∂ε/∂T)

[Page 49]

From Gl. (37) without Kenntnis (knowledge) of the exact function f(x), the Fehlergrenze (error bound) may be calculated from the best Bereichseinschränkung (range restriction), together with the interpolation function.

Compensation of the temperature coefficient is only practical when the Kompensationsbedingung (compensation condition) ΔT is well specified and the function generator’s operating range does not exceed a few degrees from the nominal temperature. When the operating temperature varies widely, the residual error after compensation may exceed the uncompensated maximum.

(Bild 9a and 9b: Oscilloscope measurements of the temperature dependence of the function generator error voltage ε(x)):

Bild 9a: Error waveform ε(x) without temperature compensation, at temperature T = 25 °C and T = 32 °C, showing shift of breakpoints.
Bild 9b: Error waveform ε(x) with active temperature compensation, demonstrating reduced drift at the same temperatures.

For the best practical case it can be shown — from Gl. (47) — that the relationship between the error bound and the Knotenpunkt-Zahl (number of breakpoints) n follows as:

ε_max^(opt) ≤ C_D / (8n²)

where the constant C_D depends only on the function f(x) and its Ableitungen (derivatives) on [a, b]. This result implies that doubling the number of breakpoints reduces the maximum error by a factor of 4.

6. Error for Changes in the Setpoint Position

Ideally, the Fehlerfunktion (error function) of the polygon is approximately zero at all Knotenpunkten (breakpoints) and only reaches its maximum (in magnitude) at the midpoint of each sub-interval. The actual breakpoint setting is never exact, however; the uncertainty of the Potentiometer-Einstellung (potentiometer setting) introduces an additional error.

We now ask: what is the maximum permissible setting uncertainty δx of a breakpoint, so that the resulting position error does not exceed the residual approximation error already present?

The position error of a breakpoint x_k by an amount δx produces an additional error approximately proportional to:

Δε_pos ≈ (δx)² / 8 · |f”(ξₖ)|

We therefore require:

Δε_pos ≤ ε_max = C_D / (8n²)

which gives the Potentiometertoleranz (potentiometer tolerance):

δx ≤ (b−a) / n

[Page 50]

In Bereich 1 ≤ t ≤ T_N the Fehlerfunktionen (error functions) from Gls. (50)–(57) satisfy at each lower bound (1 ≤ k ≤ T_N) the Bedingung (condition):

ε_k(t) ≤ ε_max(T_N) · [the interpolation bound]

After integration, an Ungleichung (inequality) is obtained for t ≥ 1:

ε_sum ≤ ε_max · [interpolation sum] ≤ ε_max · C₀

where the largest Glieder (terms) in the outer Grenzen (limits) dominate, and the error remains ε ∝ 1/n² throughout.

(Bild 11: Diode function generator — achievable Fehlergrenze (error bound) for varying numbers of breakpoints, as a function of relative Knotenpunktlage (breakpoint position). Caption: The error bound is proportional to Δₖ² and decreases with the square of the number of breakpoints.)

After integration and Ungleichung (inequality estimation), it is found that for the largest Knotenabstände (node spacings) T_N the error is a well-defined function:

ε_max = (1/(8)) · (Δₖ_max)² · max|f”|

which holds for all boundary points xₖ. The result is thus:

ε_total ≤ Σ_k ε_max,k = F · Σ_k hₖ² · |f”(ξₖ)| / 8

This validates the general formula for the maximum approximation error.

2. Error for Changes in the Relaisschwellwert (Relay Threshold)

The relay threshold setting is a special instance of the node-position error, now applied to the relay threshold rather than the breakpoint voltage. Ideally the Fehlerkurve (error curve) of the polygon approximation is centered at each sub-interval and zero at the breakpoints. A shift Δx in the relay threshold by an amount δx introduces an additional error:

We apply both the Gls. (52) and (55) from Bild 7 to determine the error, applying the Randbedingungen (boundary conditions) for the relay threshold setting:

δx ≤ (b−a) / (n · √8)

to keep the relay threshold error within the overall error budget.

The coordinate K₁ and K₂ and the Fehler (error) contribution from the Randbedingungen (boundary conditions) through Gls. (52) are:

Δε_relay ≈ f’(x_k) · δx

and to match the level of the residual error, the tolerance requirement becomes:

δx ≤ ε_max / max|f’|

[Page 51]

(Continued — Error for Changes in the Relay Threshold)

The result from equations derived: the error follows from:

ε_total(n₀) = C_n₀ · F(f, n₀)

and with n₀ set by the Gls. (55) and (57), the polygon y_approx satisfies the condition that the Randabweichungen (boundary deviations) are proportional to n₀. After the application of the correction for the Randbedingungen the final:

ε_total ~ 1/n²

is also attained for the relay threshold.

The polygon y_approx is constrained by the functions f₁ and f₂ at the boundary; any relay-setting error can be expressed as an additional displacement in the Knotenpunkt positions.

(Fig. — Relative Fehlergrenze as a function of the number of breakpoints n, for several values of the function range)

If f(t) is sufficient and the functions y₀, y₁ are kept — see Gls. (55) and (57) — and the relay function satisfies (56) while the error curve:

ε(t) = f(t) − y_approx(t)

is positive semi-definite between every two adjacent Knotenpunkte, then:

ε_max ≤ C_D / n²

is established, and the relay setting error is negligible for n ≥ 5 breakpoints.

Literature (for section “Error Estimation for Diode Function Generators”)

[1] Krey, R.: Fehlerabschätzung bei Diodenfunktionsgeber. — Frequenz (1964), p. 88. [2] Holm, E. and R. W. Young: Digital-Analogue Techniques for Analog Computation. (For instance, reference given). [3] Electronics (ref. from 1964–65, specific details illegible).

[Page 52]

Function Generators and Multipliers with Half-Wave Methods

by B. Krey and E. Holm

In the solution of problems on analog computers, the realization of nonlinear functions and the Bildung (formation) of products or quotients are frequently needed. Both requirements can be satisfied in an efficient manner using diode-based circuits. The principles described here employ the half-wave method to generate arbitrary functions using piecewise-linear approximations, as well as simple, low-cost multipliers of high accuracy.

The given function f(x) (Bild 1) is approximated using a polygon y_approx, which is produced in the circuit as follows:

(Fig. 1: Approximation of a function f(x) using a piecewise-linear polygon with n breakpoints)

This approximated curve is obtained from a summing circuit, as shown in the following Bild 2 circuit.

(Bild 2: Circuit schematic for the generation of a piecewise-linear function using half-wave diode circuits — shows input resistors, diode networks, and summing amplifier configuration)

[Page 53]

In B. K.*‘s (referred to above) treatment of the Größen (quantities), where the maximum approximation and K_n is the Summierpunkt (summing point):

(Equations (6) and (7): continued from the previous derivation)

y_approx = L₁ · x + Σⱼ Lⱼ · D(x − xⱼ)

where D(·) is a half-wave rectifier function, L₁ is the initial slope, and Lⱼ are the slope changes (Knickmengen) at breakpoints xⱼ.

Summarized: the Größen c₁, n and K_n from Bild 2 are counted from one Summierpunkt (summing junction) and from there produce — according to Bild 3 — a single Rückkopplung (feedback) branch per Knotenpunkt.

(Bild 3: Schematic of a complete function generator circuit with summing amplifier and feedback diode network — each breakpoint is formed by a separate diode branch.)

It is first noted that the maximum approximation and K_n apply in the relative sense for functions with both positive and negative slopes. For the Entwicklung (development) of the Knotenpunkte ξ and the desired Anfangsbedingungen (initial conditions):

Point a is the Anfangspunkt (starting point) of the polygon
Point b is the Endpunkt (end point)
The breakpoints ξ₁, ξ₂ … ξₙ are set using potentiometers in the reference-voltage divider

Fehlerbetrachtung (error analysis): one estimates n = 2 Schaltstücke (circuit sections), so the approximation achieves the maximum approximation error as shown in Abschnitt 3 (Section 3). It is here to be noted that in Abschnitt 3 the result shows:

F (f, n) ~ (1/n²)

For the production of the function generator, one uses for the Anfangsbedingungen (initial conditions) always exactly n diode branches (one per breakpoint), and one summing amplifier. The required Genauigkeit (accuracy) of the total circuit depends on the accuracy of the potentiometer settings of the breakpoint voltages ξₖ.

Fehlerbeitragsanalyse (error contribution analysis): one evaluates the combined error of Knotenpunkteinstellfehler (breakpoint setting error) and temperature drift alongside the inherent polygon approximation error.

[Page 54]

In the general case, the total number of Knotenpunkte n is unlimited (n = 1, 2, 3, …), and the error ε is well-defined and calculable from the formula:

ε ≤ Σ Δₖ(n) + Fehler (f, n)

(Eq. 9 from Bild 1: completed derivation)

(Bild 4: Complete Dioden-Funktionsgeber (diode function generator) circuit for an arbitrary function — full circuit schematic with input stage, summing amplifier, feedback network, diode breakpoint network, and output terminal. Component values indicated.)

It is observed from Bild 1 that the approximated Polygon y_approx is always composed of linear sections connected at the breakpoints ξₖ. Through the choice of the breakpoint positions and the slope changes Lⱼ at each ξₖ, any monotone or non-monotone function f(x) can be approximated to arbitrary accuracy, limited only by the number of diode stages available.

Fehlerbewertung (error assessment): the individual circuit realizations are evaluated on the basis of both the number of breakpoints n used and the slope accuracy of the diode branches. Because the Dioden-Kennlinienfehler (diode characteristic error) is generally less than 0.1 % of the operating range, it contributes a Fehleranteil (error component):

ε_diode ≤ 0.001 · f_range

which is negligible compared with the polygon approximation error for n ≤ 10 breakpoints.

For the Potentiometereinstellung (potentiometer setting):

δx_poti ≤ 0.1 % × (b − a)

which similarly contributes a small fraction of the overall error budget.

5. Influence of the Diode-Linearization on the Maximum Error

The sum

Σ_{k=1}^{n} (1/k!) = e − 1 (≈ 1.718)

and from one Summierpunkt the total Fehler (error) sums to a constant factor times the per-segment maximum error.

(Bild 5: Dependence of the Knotenpunktanzahl (number of breakpoints) on the approximation error — graph showing achievable accuracy (ordinate: relative error ε in %) versus number of breakpoints n (abscissa: 1 through 20), for a fixed function range.)

The multiplier variant employs the same principle: for the multiplication of two analog variables u and v, the half-wave generator first approximates the function f(x) = x² using a two-quadrant diode function generator, then employs the identity:

u · v = [(u + v)² − (u − v)²] / 4

to synthesize the product. The required Quadrierstufe (squaring stage) is implemented directly as a diode function generator with the breakpoints optimally placed for the parabolic function x².

For the Fehlerabschätzung (error estimation) at the Multipliziererpegel (multiplier level) the individual squaring errors add in quadrature:

ε_mult ≤ √2 · ε_square

where ε_square is the rms approximation error of the squaring function generator.

In the Vollquadrant (four-quadrant) Multiplizierer (multiplier), the circuit is extended to handle both positive and negative values of u and v; the circuit accomplishes this by always forming the absolute values |u + v| and |u − v| before squaring, then taking the signed difference. The total error bound is:

ε_mult^(4Q) ≤ 2 · ε_square

which remains well within the practical accuracy requirements for analog computation (typically 0.1 % of full scale).

[continuing from previous page]

…and the network is built up from a finite number of elementary sections. The approximation becomes more accurate, the more terms are taken into account. The Chebyshev approximation minimizes the maximum deviation. The approximation is therefore better for small n as with the Taylor series.

The change of the approximation coefficient with the repetition period α is described by [8]:

$$\frac{\tau \cdot c_j}{c_j} = -\frac{(n+1) \cdot \tau}{T_{a_j}} $$

with G·(·1) denoting the Chebyshev polynomials, which can be approximately represented when the approximation quality is high enough. The upper expression is valid for the Fourier coefficient at node [8]:

$$c_j = c_{j,0} \cdot e^{-j \cdot \Omega \cdot \tau} $$

where Ω denotes the period duration, and T_{a,j} the Chebyshev value. For n → ∞ one obtains

$$\tau \cdot c_j = 1 \cdot 10^{-3} \text{ relative approximation error} $$

the values shown in Figs. 7 and 8. The figures show the temperature error plotted as a function of T/T_a at the function generator outputs.

2. Calculation of the Temperature Error for Various Function Types

The following worked examples use Eq. (13a) and (13b) for Bessel functions. The approximation coefficients A_{p,q} for composite functions are taken from the function generator description. While n = 4 and n = 6 are considered for sections A, B, and D of the function table, section C uses only n = 4. The temperature coefficients of the diodes (Abschn. D) are taken from [8]. At each temperature T the approximation coefficient c_j is evaluated. During network evaluation after Fig. 2, n = 4 is used in Bild 8 as the maximum error at each point.

The largest Fourier component at n = (1) gives:

$$\tau_a = 4.1 \cdot 10^{-3} \text{ per } °\text{C} $$

For n = 6 the Approximationsfehler lies at around 1.7 · 10^{−3} per °C.

2.1 Temperature Error of the Function f(x) = x²

The function f(x) = sin x (Gl. 30) may use the constant analogue (Typ b in Bild 4) with dim Widerstand R = R_0 and

$$T^*(x) = \sin(x \cdot \pi) \approx 4.1 \cdot 10^{-3} $$

approximately. Nach Gl. (13) for τ = τ_0 in Bild 7 the Temperaturumfehler is found. It can easily be verified that the constant functional f(x) = sin(x) has a constant Approximationsfehler ε_approx at the output of the function generator for each temperature T, as long as the Compensatior value is made identical with the component Approximationskoeffizient. In Bild 9 on p. 58 the temperature error is shown, which shows no more than one Fehler of F for n = 4.

2.2 Temperature Error of the Function f(x) = sin x/2

The function f(x) = sin (x/2) (Gl. 30) and dim Widerstand R = R_0 and

$$T^*(x) = \sin(x/2) \approx 4.1 \cdot 10^{-3} $$

averaged. In Bild 10 at the Temperaturumfehler for the value n = 0 (Bild 7) are both values only minimal. The Temperaturumfehler f(x) = sin x/2 with the Widerstand R_0 is somewhat smaller. In n = 4 Kompensations-Koeffizient it reaches a maximum Fehler for n = 4.

2.3 Temperature Error of the Function f(x) = sin x

The function f(x) = sin x (Gl. 30) and dim Widerstand R = R_0 and approximately for temperature τ_0 in Bild 11 as follows:

$$T^*(x) = \sin(x + 0.1) \approx 1.3 \cdot 10^{-3} $$

An in Bild 12 the Approximationsfehler is in the interval n = 1 to n = 4 Kompensationskoeffizienten tolerated.

2.4 Temperature Error of the Function f(x) = sin x

The function f(x) = |sin x| (absolute value), the Widerstand R in Bild 9 as a Kompensationskoeffizient of n = sin x.

Finds man for the function analogue Temperaturkoeffizienten α = 2 · 10^{−4}/°C and the Diodenwiderstand at −30 °C the maximum Fehler at the Kompensationsfehler reduces to an equally good result.

2.5 Temperature Error of the Function f(x) = cos x

For this function the Kompensation is in the range of the circuit with various Kompensatorwiderständen. This Function R = R_0 and the Diodenwiderstand R_0 is in its approximation somewhat higher in the range 1.3 · 10^{−4}/°C. In Bild 9 the Fehlerkurve is around 1.3 · 10^{−4}/°C to n = 1 as Kompensationskoeffizienten.

The corresponding Fehler in the interval of 1.3 · 10^{−4}/°C gives a value below 5 · 10^{−3}.

[Page 58 — figure only, with text continuation]

1.4 Temperature Compensation of the Individually Controllable Functions

In the foregoing sections the temperature compensation dealt with only a limited number of function types. However the temperature dependence is handled uniformly: with each new temperature T, the approximation coefficient c_j changes and must be compensated accordingly. Through this method it is possible, with a single constant-factor generator, to correct the temperature behavior at every characteristic point, since the Temperaturkoeffizienten of the diodes can be made selectively effective.

4. Fehlermessung und Eichung (Error Measurement and Calibration)

The approximation circuit (Gl. 30) has been thoroughly verified to give the correct function. An analogue function generator was built according to diagram Fig. 2, and the necessary measurements have been performed. The analog computer evaluated the resulting function with a single diode cascade and plotted it. The analog computer works at τ = 1 and the Diodenapproximator outputs are given for various temperatures.

5. Meßwerte (Measured Results)

The measured data shows the typical deviations of the function generator behavior and is consistent with the theoretical values. Several characteristic functions have been measured:

At τ = 25 °C the Approximationsfehler for function f(x) = sin x is below 0.003 (0.3%) in the range 0 ≤ x ≤ 1.
The measured Temperaturkoeffizienten for the interval n = 1 to n = 4 remain below 5 · 10^{−3}/°C.
At τ = 40 °C the error stays within the same tolerance band.

Bild 16 shows the approximation at n = 4 and at the temperature n = 1, the n = 3 Kompensationskoeffizienten with values n = 1, 2, 3, 4 approximated with τ_0 error below 0.5 · 10^{−3}/°C.

[page 59: figure only — oscilloscope traces showing approximation error for f(x) = sin x at temperatures 25 °C, 40 °C, and 60 °C, for n = 1 and n = 3 compensation; also references/bibliography page for the Telefunken-Zeitung article]

Literature:

[1] E. A. Frey, Tr. M. Frey: Electronic analog computers. McGraw-Hill, New York (1956). [2] H. Mauersberger: Analogiemaschinen. VEB Verlag Technik, Berlin (1960). [3] K. Küpfmüller: Die Systemtheorie der elektrischen Nachrichtenübertragung. S. Hirzel Verlag, Stuttgart (1949). [4] J. Millman, C. Halkias: Electronic devices and circuits. McGraw-Hill, New York (1967). [5] W. Pichler: Analog function generators, Elektronische Rechenanlagen 30 (1968), Nr. 1, p. 31–40. [6] Telefunken-Zeitung 31 (1968), Nr. 1, p. 75. [7] E. A. Pappas: Analytical function calculators on analog computers, Proc. Western Joint Computer Conference, pp. 17 (1960). [8] A. Hauck: Funktionen-Erzeuger für Elektronenrechenmaschinen. Telefunken-Zeitung 31 (1968) Nr. 118, p. 196.

An Electronic Coordinate Converter

Von H. Gütz, A. Klaj, B. Norpoth, G. Nußbaum and P. Wesserführ

An important task in analog computation is the transformation of Cartesian coordinates into polar coordinates, and vice versa, including the determination of the angle in a coordinate transformation. The great bandwidth of this application is known from navigation, trajectory computation, and many similar problems. The transformation can only be accomplished approximately using conventional analog computing elements; an exact solution requires digital computing elements or a special electronic circuit. The authors describe a development which is capable of performing this coordinate conversion with circuit means alone.

[p. 60 continued]

For the transformation from Cartesian to polar coordinates (Bild 1a) and for the transformation from polar to Cartesian coordinates (Bild 1b) the following computation must be performed:

For the transformation from polar coordinates r and φ to Cartesian coordinates x and y (Bild 1a):

$$x = r \cdot \cos\varphi \tag{1a}$$ $$y = r \cdot \sin\varphi \tag{1b}$$

For the transformation from Cartesian coordinates x and y to polar coordinates r and φ (Bild 1a, reverse), using Bild 2 with an approximation circuit:

$$r = \sqrt{x^2 + y^2} \tag{2a}$$ $$\varphi = \arctan(y/x) \tag{2b}$$

The computation according to Bild 2 results (2) with a Regreßions circuit (Bild 2). The circuit uses the Approximationskoeffizient τ_0. In Bild 4 the respective Funktionsbilder are shown as block diagrams.

Bild 1 — Transformation from Cartesian Coordinates to Polar Coordinates
a) Kartesisch nach Polar
b) Kartesisch nach Polarkoordinaten
c) Invers-Polarkoordinaten

3. The Piecewise-Linear Function Generator

The piecewise-linear function generator works in the following manner: an input variable x in the range −1 ≤ x ≤ +1 drives a set of diode circuits, each of which becomes conductive at a different threshold level. By means of these diodes, linear segments of selectable slope and position are summed in an operational amplifier. This enables the approximation of an arbitrary function f(x) through a piecewise-linear representation. The function generator is capable of approximating functions in the interval −1 ≤ x ≤ 1, and gives Bild 4 an additional operating point.

Die Funktion f(x) = sin x is in the interval 0 ≤ x ≤ 1 approximated with a breakpoint at x = 0.5. The approximation error is small. The function generator with a function set including Punkte x = 0, x = 1 interpolates the function linearly, with a Widerstand R in a diode ladder circuit. In Bild 5 the Fehlerkurve at the Funktionsgenerator output is given.

For very steeply curved functions a large number of Stützpunkte (breakpoints) n are needed. Für n = 1 this is a simple linear approximation; n = 3 gives an especially good result.

3.1 The Piecewise-Linear Function Generator

The function f(x) = sin x (Bild 5b) at the Diodenwiderstand R = R_0 and

$$\bar{f}(x) = \sum_{j=0}^{n} c_j \cdot \varphi_j(x) \tag{3}$$

approximated. Nach Gl. (13) for τ = 0 in Bild 7 the Temperaturumfehler is found. The function f(x) = sin x (Gl. 30) has no constant Approximationsfehler. Es kann easily be demonstrated that for this Kompensation the constant Approximationskoeffizienten, which is in Bild 9 at the Approximationsfehler no more, reaches 3 · 10^{-3}/°C for n = 4.

Ein elektronischer Koordinatenwandler (continued)

2. The Piecewise-Linear Function Generator

Functions in the range −1 ≤ x ≤ 1 can be approximated with a piecewise-linear function generator. The function is split into n intervals and a linear function is fitted to each interval. The approximation gives Bild 5b an operating point at intermediate values.

The Funktion f(x) is in the interval 0 ≤ x ≤ 1 and n = 1 to n = 5 approximated. The Fehler in the function approximation depends on the number of Stützpunkte. For n = 1 one gets:

$$\varepsilon = \max_{x \in [-1,1]} |f(x) - \bar{f}(x)|$$

and then for n → 0 the error converges to zero.

These lösungen and their validity cannot be evaluated with a single Diodenwiderstand, as in some function types the Approximationsfehler remains essentially constant. After that the Diodenwiderstand can only be corrected when the Regulierdiode is not saturated.

4. Fehlerbeschreibung (Error Description)

The approximation error depends on the number of breakpoints and the function type:

For n = 1 the Approximationsfehler is largest.
For n = 3 the Fehler is smaller, but still significant.
For n = 5 the Fehler approaches the minimum achievable.

The maximum Fehler arises at n = 1 and n = 5 at the Kompensationskoeffizienten. The Faktor n gives a constant Approximationsfehler for each range.

The Fehler n is obtained from Gl. (13) and from Gl. (19) evaluated as follows.

[page 62 continued]

…at this Diodenwiderstand and it is brought only to a certain Approximationsfehler. The Vorzeichenregelung (sign control) for the Eingang side x in (n = 0) and Bild 3 ensures the proper sign. Various Kompensationswiderstände can be incorporated. The approximation becomes possible when the Diode is not saturated.

In Bild 3 the Schaltung (circuit) for Eingang x = (n) and x = (0) is given.

Bild 6 — Circuit for Inputs x = (n) and x = (0)
Bild 6 (a) — The Approximationswiderstände

The approximation quality is at other operating points and the resulting Funktionsbilder at n = 3. Die Funktionsbilder at (x = 1) gives Bild 5 (b) the table of Eingang output relationships. The number of Stützpunkte n = 3 and n = 4 Approximationskoeffizienten reaches an output value of Z_Da. The result is then corrected by a Vorzeichenwechsel in the Regulierdiode, and returned as a function value in the range 0 ≤ x ≤ 1.

With n = 0 for the constant analog channel, the error is corrected when the Diodenwiderstand R_0 satisfies the boundary condition set by the Kompensationskoeffizient. The Der Diodenwiderstand with n = 2 Kompensationskoeffizienten has a correction factor c_j in the range 0 ≤ x ≤ 1. After the Approximationsfehler is corrected, Z_Da is kept within prescribed limits.

3. Zur Fehlertransformation von Polar- in kartesische Koordinaten (On the Error Transformation from Polar to Cartesian Coordinates)

The function transformation from polar coordinates to Cartesian coordinates is carried out as follows. The transformation matrix [Gl. (2)] is evaluated. The Fehler in this transformation grows as the input angle φ increases.

For φ ≤ 0.5 the Approximationsfehler is below 0.3%, and the Diodenwiderstand R value remains constant.

4. Fehlerbehandlung (Error Treatment)

The resulting approximation error includes contributions from:

the piecewise-linear function generator (Stufenkennlinien)
the multiplication by r
the trigonometric function approximation

These are combined in Bild 9 and Bild 11.

[page 63: figure only — sine approximation circuit schematic with labeled nodes, diode ladder, operational amplifier, and breakpoints; text on approximation of two-segment function]

The circuit is built and operates in the following manner. This Lösung is not in Bild 8 R_0 in the range. The signal is expected as in Bild 9 according to Gl. (2), and must wait at the Diode breakthrough.

This Lösungen and its validity leads to the following:

$$y_0 = y_1 = y_2 = \ldots = 0, \quad k = 1, 2, \ldots$$

These Lösung and its result cannot be derived at all within the range of a single constant, since there are in Bild 9 an additional Approximationsfehler. In Bild 8 a stable Überstimmung is maintained, as follows:

$$r \cdot c_j = r \cdot (1 + c_{j,0}) \approx \frac{1}{r \cdot c_{j,0}} \cdot \Delta r$$

which constitutes an equally stable Festlegung. The signal direction does not change with respect to the Kompensationskoeffizient, and the Regulierdiode remains in the suitable linear operation range.

5. Fehlerbehandlung der Transformation von Polar- in kartesische Koordinaten

With the function analogue Temperaturkoeffizienten, the maximum Fehler values are obtained:

$$\varphi_j = \varphi_{j,0} + \delta\varphi_j \tag{5}$$

Thereby the multiplicative Fehleranteil (error contribution) is:

$$x = r \cdot \cos\varphi \cdot (1 + \delta_x) \tag{6}$$

$$y = r \cdot \sin\varphi \cdot (1 + \delta_y) \tag{7}$$

The maximum values are r = 1 and φ → 0 at the Fehlerkurve. The Fehler for small values of φ gives:

$$\delta_x \approx \delta r + \delta\varphi \cdot \tan\varphi \tag{8}$$

and

$$\delta_y \approx \delta r + \delta\varphi / \tan\varphi \tag{9}$$

The maximum Fehler arises at n = 1, n = 3 and it is determined by the Kompensationskoeffizienten. The Fehlerfaktor k gives the constant value.

For the largest maximum Fehler values one obtains R ≤ 4 and is found in:

$$\varepsilon_j = \varepsilon_{j,0} \cdot e^{-\alpha_j \cdot T} \tag{10}$$

The factors with multiple multiplicative Fehleranteilen can take values of 2 · 10^{−3} to 4 · 10^{−2}/°C, on the far end it reaches 1 · 10^{−2}/°C. The factor F_{(x)} for a Bessel component at n → ∞ is relatively small compared with the n → 0 range. The Fehlerfaktor at n = 0 gives a value approaching 1.7 · 10^{−3}/°C.

4.2 Fehler der Transformation von Kartesischen Koordinaten in Polarkoordinaten (Error of the Transformation from Cartesian to Polar Coordinates)

For the determination of the Approximationsfehler it holds according to Gl. (13a) that:

$$\delta\varphi = \frac{x \cdot \delta_y - y \cdot \delta_x}{r^2} \tag{11}$$

and

$$\delta r = \frac{x \cdot \delta_x + y \cdot \delta_y}{r} \tag{12}$$

Der durch the Multipliziererfehler contribution arises as Faktor k. This gives Gl. (13) a Fehler from Widerstand k at any Stützpunkte. The Fehlerfunktion f(x) achieves the smallest Fehler when the Kompensationskoeffizient is large. Only when k = 1 can the Approximationsfehler be neglected. The Faktor at n = 0 to n = 1 Kompensationskoeffizienten has the value below 5 · 10^{−3}.

For the zero-overlap Zeitwert T_0 further, the value is:

$$\frac{\delta r}{r} = \frac{\varepsilon_x \cdot x^2 + \varepsilon_y \cdot y^2}{r^2} \tag{13}$$

where ε_x and ε_y are the individual Fehleranteile from the x and y conversion respectively.

Bein Sennenwert (Bild 0a) from near the Widerstand τ in the Seitenstellung aus:

$$\tau_{\text{eff}} = \frac{\tan\varphi}{r} \cdot (1 + c_{j,\tau}) \tag{14}$$

For the same Widerstand as the τ conditions and φ through Gl. (13b) and Gl. (14):

$$\bar{\varphi}{j} = \sum{k=0}^{n} c_{j,k} \cdot \varphi_k \tag{15}$$

For the zero-Kompensationskoeffizient the following holds, verifiable also from the Regularisierungsdiode:

$$\frac{d\varphi}{dt} = \frac{1}{\tau_0} \cdot f(\varphi) \tag{16}$$

Daburch obtains man nach Gl. (15) for the element n = 4 the Fehlergrenze which is proportional to τ_0. The output value ε_0 is approximately:

$$\varepsilon_0 \approx 8.5 \cdot 10^{-4} \cdot \frac{\Delta T}{°\text{C}} \tag{17}$$

The Fehlerfunktionen at n = 4 and n = 6 give a useful approximation range.

5. Das Gerät (The Device)

Between Bild 60 and Bild 65 the complete circuit can be programmed on any analog computer. Several component blocks are used: the Approximations-Funktionsgeneratoren, a Multiplier circuit, and a summer. The circuit creates a Polarkoordinate result at the output. In the large range the circuit behaves very stably due to the Diodenapproximation. The result gives a value of −0.5 and has been verified on test values. Through the Approximation at n = 4, the result for the Kartesischen Koordinaten-Wandler with the circuit reaches full precision, while at n = 6 the values of the approximation circuit reach similarly close correspondence.

The maximum Fehler in n single is:

$$|\delta r|_{\text{max}} \approx 8.5 \cdot 10^{-4}$$

and

$$|\delta\varphi|_{\text{max}} \approx 5.0 \cdot 10^{-3} \text{ rad}$$

These best-achievable Approximationsfehler are below 1 · 10^{-3} in all cases.

Literature:

[1] E. A. Frey, Tr. M. Frey: Electronic analog computers. McGraw-Hill, New York (1956). [2] H. Mauersberger: Analogiemaschinen. VEB Verlag Technik, Berlin (1960). [3] Pichler: Funktionsgeneratoren für Analogrechner. Telefunken-Zeitung 31 (1968) Nr. 118, p. 196. [4] K. R. Brewer: The Solution of Nonlinear Equations Using Analog Computers. Western Joint Computer Conference, Report 9, p. (1958). [5] G. A. Korn: Digital synthesis of analog functions. Western Joint Computer Conference (1968). [6] R. Koppmann, W. Pichler: Multipliziererschaltung mit kleinem Fehler. Telefunken-Zeitung (6) (1968) Nr. 1, p. 90.

Construction and Application of the Hybrid Analog Computer

Von M. Gries, A. Klaj, B. Norpoth, G. Nußbaum and P. Wesserführl

Hybrid analog computers combine all the benefits of analog computing elements (Differentialgleichungen, integration) with the convenience of digital control (parametric variation, automatic repeat cycles, statistical analysis). A comprehensive description of the organization of a general-purpose hybrid computing system has been published elsewhere [7]. In that work, the sequential organization of the digital part and the possibility of automatic program completion of the analog section were discussed. The present article describes the construction and operation of a hybrid computing system developed at Telefunken. This machine uses all features of the so-called “hybrid” technique: the analog computer is under program control from the digital computer, and the analog outputs can be fed into the digital machine for digital analysis.

1. Structure of the Hybrid Analog Computer

The hybrid analog computer is built up, as Bild 1 shows, from analog computing elements, digital processing elements, and from converters (Interface). The analog part holds all the normal components of a comprehensive analog computing facility: Integratoren, Verstärker, Nichtlinearitäten, Potentiometer and Diodengeneratoren (function generators). The digital part can be a process computer or a general-purpose digital computer. Via an electronic coupling (Interface), both parts are connected to one another and exchange data and control signals. The interface handles the following: Zeitgeber (clock), Schrittschalter (step switches), Taktgeber, Speicher (memory), Zähler (counters), Zeitmeßgeber, and Prüfgeneratoren (test-pattern generators). The program controller of the hybrid system undertakes the programming of the analog computer.

[page 66 continued]

It is in the general manner left to the Betrachter (observer) to also choose the Rechenanlagen-Schritt (computing step) to be the suitable. Ensuring that the Rechenzeit (computation time) also stays within bounds is a task done by the digital programmer. Ensuring the correct coupling between the two systems requires a careful design of the interface logic.

Another Modifikation of the hybrid analogue Rechenanlagen programming produces, in Bild 3 and Bild 3a, the Schaltbild (circuit diagram) with its own analog-digital switching. These are pre-formed and can be made into an analog computer element by a circuit. The analog computer with its analog Kompensationskoeffizienten and one Digitaleingang generates a Folgesteuerung (sequential control), which allows the switching between analog elements according to a digital sequence. In this way, the hybrid analog computer compares and selects from the following digital elements: Rechenanlagen, Schrittschalter, Taktgeber, Speicher, Zähler, Zeitmeßgeber.

The digital Rechenanlagen generate the Umschaltsignal, the analog computer generates the operating state, and the coupling interface generates the Verbindungszustand (connection state).

Bild 2 — Integrator and Schalter (switches) in the hybrid analog computer

Bild 2a — Block diagram of the hybrid Rechenanlagen (from the overview)

It is important that all ten Rechenanlagen-Betriebsarten (operating modes), whether normal or by Schritt-Signal, can be controlled. The Schrittschalter allows the Zählerstand to be advanced either by a Takt signal from the Digitalseite (digital side) or by a Folge signal (sequence signal). At each Schritt the Analog output can be Gültig (valid) or Ungültig (invalid). Valid outputs are delivered Jederzeit (at all times) as Parallel output from each Zähler position. One method of achieving this is an entirely automatic Zählerfolge: the register is incremented, and then the value appears in read form. At an additional Digitaleingang the Folge-Zähler can be loaded with an initial value. The output of the register is used to Schalt (switch) the Analogrechner into any operating state.

An especially important possibility in this hybrid computing system is that the Rechenzeit (computation time) can be compressed from Zyklen to Zyklen, so each Zyklus can be kept equally long or made shorter.

[page 67 continued]

The Schaltung (circuit) may be so arranged that the digital Rechenanlagen-Schrittweite (step width) is sufficient for the various Rechenmethoden (computation methods). The circuit handles: analog and digital Rechenbetrieb, step-wise computation, and Einzelschritt (single step) computation. The interface registers are at all times up to date.

In one further Modifikation of the Rechenanlagen-Schaltung the analog and digital switching can produce intermediate states. Bild 3 shows a specific Schaltbild of the coupling circuit for this method.

Bild 3 — Sammelbeschaltung (collective circuit) of the hybrid analogue Rechenanlagen

Bild 4 — Time-sharing of the Analog and Digital Sections in the Hybrid System

The interface is operated as follows in each mode. All Betriebsarten, both analog and digital Schrittweite, can be selected. In addition, there is the possibility of a time-share mode where the two computers operate in an alternating, interleaved manner. During time-sharing the total Rechenzeitdauer can be adjusted freely. In Bild 4 the Zeitaufteilung (time allocation) is shown schematically.

One further important feature is the repeated computation: the Folge-Rechenanlagen operates at a speed many times higher than a single cycle, so that multiple Zyklen (repetition cycles) become possible in the available time. This allows a kind of iterative method, collecting the digital results from successive Zyklen into a digital register.

The overall digital control of the analog computer operates through a bus. The Analogrechner-Zustand (analog computer state) is controlled by the following modes:

Mode	Description
Handbetrieb	The register is controlled by a direct internal Anwahl (selection).
Externe Anwahl	Normal and Tabellenfolge Rechenbetrieb tables can be called up externally.
Automatische Anwahl	The register sequence is performed automatically by the program.

The various Pause- Rechnen- and Halte-Modi (Pause, Compute, and Hold modes) can be realized in the hybrid machine through different combinations of the control signals on the interface bus. In Bild 5 the Zeitdiagramm (timing diagram) for the register-related Betriebsarten is shown.

[page 69 continued]

To control the Integratoren the computer uses the following Betriebsarten (operating modes), which can be entered:

Einlegebetrieb (initial-condition mode): The registers are set by an internal Anwahl.
Externe Anwahl (external selection): Normal and Tabellenfolge Rechenbetrieb are selectable from outside.
Repetierender Rechenbetrieb (repetitive computation): Normal and computable table rows can be called repeatedly.
Automatische Anwahl (automatic selection): The register sequence is performed automatically by the digital Rechenanlage.

The various Pause-, Rechnen- and Halte-Betriebe can be initiated at any time by the digital program. The analog computer elements are switched into the appropriate mode by the digital control signal on the interface bus. The Zähler is incremented by each Takt pulse. The analog output is valid at the end of each Zähler position.

The individual Betriebsarten are controlled as follows. The Zählerstand advances with each Takt signal and the analog outputs follow accordingly. One additional Digitaleingang (digital input) allows the Folge-Zähler to be loaded with a new start value. The output values are always Gültig (valid) simultaneously as Parallel outputs from each Zähler position.

Bild 9 — Timing Diagram for the Register-Related Operating Modes of the Hybrid Analog Computer

3. The Digital Section

The digital section of the hybrid analog computer handles several independent tasks, including: integration control, Parametervorgabe (parameter preset) and modification, Adaptation of the computer parameters to an iterative algorithm. The digital section consists of:

multiple independent Zähler (counters)
memory elements (Speicher) for parameter values
a Prüflogik (verification logic) for testing correctness of analog states
a Koppellogik (coupling logic) to communicate with the analog section

The simultaneous action of the digital elements with the analogue computer makes it possible to use the machine in the following general-purpose modes:

For completely automatic operation the digital part may:

a) Control the start and stop of individual integrations according to a preset program b) Vary selected parameters systematically from one computation run to the next c) Respond to analog output signals and modify digital control accordingly d) Accumulate digital measurement results over many repetitions and carry out statistical analysis

The speed of the digital elements is high enough to accomplish all these tasks during the fast repetitive operation of the analog computer. In a typical operating configuration the digital computer performs N = 100 repetitions with M = 10 parameter values each in a time on the order of 1 second of real time.

Bild 7 — Individual elements of the digital section

The digital part undertakes, as Bild 7 shows, the following tasks:

it controls the Integratoren (integrators), and addresses individually the separate Betriebsarten
it generates the time-multiplexed parameter-variable
if the digital Rechenanlage is programmed to do so, the counters and the logic evaluate the Digital-Programmvorgaben (digital program presets) [3] [5]

A digital controller can handle time control of the analog computer in several ways. In Bild 8 the Zeitablaufdiagramm (timing diagram) is illustrated for the Betriebsmethoden (operating methods) of the digital elements:

a) Information about the initiation of required Betriebsarten for automatic Rechenanlagen b) Information about the Schrittweite and Schrittzahl (step width and step count) for the program control c) Information about the Folgesteuerung (sequence control) for the analog elements d) Information about the digital evaluation criteria

[page 70 continued]

In addition to the above functions the digital elements handle the following computationally intensive functions through specially designed subunits:

High-speed counting functions (Zählwerk) with asynchronous and synchronous Taktfolge
Rechenlogik (computation logic) that generates a new set of values for each Zyklusfolge (cycle sequence), including “Zyklus und Halb” (cycle and half-cycle) Ablauf (run)
Multiplier functions with atypically large Umfang and Multipliziererfehler
Negative-value computation, including cases of the “Labelierter Schrittrechner” (labeled step computer)
Multiplication of larger Größen (quantities) with Zwischenablage (intermediate storage) functions

The digital program is preloaded in its entirety and is then executed in its Schleifen (loops) without manual intervention. The loop is repeated automatically from Zyklus to Zyklus. When the Programmendebedingung (program-end condition) is met, the machine halts automatically and saves the final results.

4. Iterative Solution of Boundary-Value Problems of the Predictor-Corrector Type

Since the previously described functions of the digital elements allow the predictor-corrector method to be used with analog computers, it is worth describing the specific procedure:

The problem to be solved is a differential equation with boundary values at both ends of the integration interval [0, T]. The iteration is based on the following. Suppose one is given a set of unknowns:

$$\mathbf{x}(0) = [x_1(0), x_2(0), \ldots, x_N(0)]^T \tag{1}$$

which are to be adjusted so that a set of final values is satisfied:

$$\mathbf{x}(T) = [x_1(T), x_2(T), \ldots, x_N(T)]^T = \mathbf{0} \tag{2}$$

The iteration is known as the “Predictor-Corrector method” and for it in the digital system the following [6] holds:

$$x_j^{(k+1)} = x_j^{(k)} - \lambda_k \cdot F_j(\mathbf{x}^{(k)}) \tag{3}$$

or in this Form durch the iterative computation scheme becomes:

$$x_j^{(k+1)} = x_j^{(k)} - \lambda_k \cdot F_j \tag{4}$$

to which the solution is:

$$x_j^{(k)} \rightarrow 0, \quad k \rightarrow \infty \tag{5}$$

where A is the iteration parameter and the Betriebsmethoden k gives the Kompensationskoeffizienten.

Operating Modes for the Iterative Rechenanlagen and the Digital Control Element k

The iteration is computed as follows. The computing element λ_k is set by the Rechenanlagen, and the Analog output gives the values F_j(x) from the boundary condition. The result of the evaluation is stored digitally and used to compute the correction for the next run. This is the Predictor-Corrector method.

The digital element k gives the Kompensationskoeffizient:

$$\lambda_k = \frac{1}{k+1} \quad \text{for all } k \geq 0 \tag{6}$$

For the computation to converge, the following condition on the Rechenanlagen values:

$$\lambda_k \cdot \frac{\partial F_j}{\partial x_j} < 1 \tag{7}$$

must hold at all times. This is ensured through the choice of the step-size parameter.

The computing element “Boundary Computation” (Randrechnen) makes the following procedure possible: at the start of each Zyklus the digital section sets the value of x_j^{(0)} into the analog initial-condition potentiometer. The integration then proceeds, and at T the output value F_j(x) is read by the digital section. The digital section computes the next value and the cycle starts again.

[page 72]

The choice of the parameter GTT values the nearest-neighbor Integrationskoeffizient. The overall computation is bounded and the Fehler is minimal. The Zählerstand corresponds to the Folgesteuerung for the iterative computation.

Bild 9 — Circuit for the Iterated Predictor-Corrector Integration
(The analog integrator feeds back into the digital controller; the overall structure is shown as a hybrid closed loop.)

5. Example for the Empirical Specification of Statistical Parameters of a Simulated System

To describe this, consider the problem of determining the statistical Kenngrößen (characteristic parameters) F_1, F_2, …, F_N from a set of analog-simulated differential equations. This problem is treated as follows: Suppose the differential equation of the system is given by:

$$\dot{\mathbf{x}} = f(\mathbf{x}, t, P_1, P_2, \ldots, P_N) \tag{8}$$

with a set of parameters P_j, j = 1, 2, …, N. The parameters are distributed over the parameter space and samples are drawn in each Zyklusfolge (cycle sequence). This is done by:

$$P_j^{(k)} = P_{j,0} + \Delta P_j^{(k)} \tag{9}$$

where P_{j,0} is the nominal value and ΔP_j^{(k)} is a digitally-generated random perturbation.

This general problem is solved by the hybrid computing system through an inner Differentialgleichungslöser (differential equation solver):

$$T_j(t) = T_{j,0} + \sum_{k=0}^{N} c_{j,k} \cdot \varphi_k(t) \tag{10}$$

and the result for the Lösung (solution) of the Differentialgleichung, set as in Bild 9:

$$f(0) = f(T_s) \quad \text{(GTU assumption)} \tag{11}$$

[Page 73]

and the analog computer.

The analog quantity x, whose the distribution F(t) is to be checked for uniformity, is converted into a sequence of pulses whose spacing is proportional to the inter-arrival time of the random events (Fig. 72). The general solution of the differential equation (71) for the analog computer is described.

Then y_0 is the value of the analog variable F at the time of the initial condition (t = 0):

$$y(t) = \frac{1}{\lambda_0} e^{-\lambda_0 t} \quad (t = 0, 1, \ldots, T)$$

where y_0 is the analog variable for the integration (F) of the inter-arrival distribution:

$$y = \frac{1}{\lambda} \left( \sum_{j=0}^{m} \frac{(\lambda t)^j}{j!} - e^{-\lambda t} \sum_{j=0}^{m} \frac{(\lambda t)^j}{j!} \right)$$

and g (f) is the Laplace-Transformations of the integration distribution (F(t)) of the arrival distribution starting from the initial condition.

To control the suitability of the analog computer (Ensemble-Method) the fitting y (t) on the Table t = T, for this one fits:

$$y_0 = \prod_{j=1}^{n} y_{ij}$$

For this system, K (y T) in every suitable real-number through Addition of the random numbers, for an even distribution of the random numbers starting from the Analog-computer, the equation for the control of the given Analog-computer-variable F (T) in t = T. The Frequency of this Specification of p(T) value of the analog distribution function F (T) — and for the control of the Distribution Function (Ensemble Method) is found to be better than the equation Eq. (59). One compares the calculated value F (T) with one whose analog variable p (T); if these match for all values (T and T), the analog simulator for the (T) distribution function in the analog computer is correct. In Paragraph 4.2 the applicable computational method for the Specification of the Significance-tests is given. As an Element of the Digital-computer the one must apply a practically electronic analog computer.

[Page 74]

3.3 Digital Random-Number Generator (Kloss [8])

The realization of mechanical random-number generators, one which essentially includes “Roulette”-spinners, can generally provide all Bernoulli-streams of equally probable events. However, a much more elegant implementation for programmable computers is the so-called “analog random-number generator.”

In Fig. 30 an Arrangement of a binary random-number generator is shown. This generates in the equal probability distribution and with k binary stages, a random integer variable in the range 0 to 2^k − 1.

The actual operation of this circuit can be described as follows. All stages are arranged in a shift register configuration. At each clock pulse, the content of stage n is shifted to stage n+1. The content of stage n = 1 is determined by a feedback combination of the outputs of certain selected stages. The particular stages selected for feedback are chosen so that the shift register cycles through the maximum length pseudo-random sequence of length 2^k − 1. The period T = 2^k − 1 clock periods of this sequence. One can show that within one period every binary pattern from 1 to 2^k − 1 occurs exactly once. The pattern all-zeros is excluded, since the generator would remain permanently in this state.

It has been shown experimentally that binary numbers generated in this way pass many standard randomness tests. In particular, the frequency of 0 and 1 in each digit position is equal, and the cross-correlations between different bit positions are very small.

The digital random-number generator can also generate uniformly distributed real numbers by interpreting the k-bit binary output as a fraction: X = m / 2^k, where m is the integer value of the k-bit word. For k = 13, one obtains values from Table 1 (p. 11). The analog outputs for all digital components of the Analog-computer can be distributed on a suitable Analog computing machine.

The simulation from a Pulse 13 to a further value is possible. From this element the Analog-computer requires from any electronic analog.

[Page 75]

From these properties, for the Autocorrelation function of two maximum-length sequences, it follows that the period T is given by the Equations (5) and (T) as the Pulse-generation interval:

$$R_{xx}(\tau) = \begin{cases} 1 - (1+T^{-1}),|\tau|/T_p & |\tau| \le T_p \ -T^{-1} & T_p < |\tau| \le T/2 \end{cases}$$

Outside the equal intervals the value of the Pseudo-random function falls to a narrow nonzero rectangular waveform, however is (Fig. 36) for k to a sufficiently small Nonlinearity level:

$$R_{xx}(\tau) \approx \begin{cases} 1 & |\tau| \le T_p \ 0 & T_p < |\tau| \end{cases}$$

Fig. 36: Autocorrelation function of a Pseudo-random function.

[Figure: graph showing R_xx(τ) autocorrelation with triangular peak near τ = 0 and small negative plateau]

Fig. 37: A frequently used electronic Pseudo-random generator.

[Figure: shift register circuit diagram with feedback]

The Pseudo-random function has a nearly flat spectral density:

$$S_{xx}(f) = \frac{T_p}{T} \cdot \left[\frac{\sin(\pi f T_p)}{\pi f T_p}\right]^2$$

For large values of T in the same interval T_p this becomes approximately:

$$S_{xx}(f) \approx T_p \left[\frac{\sin(\pi f T_p)}{\pi f T_p}\right]^2$$

This spectrum corresponds to that of a sequence of rectangular pulses, each of duration T_p, with independent, equally likely ±1 amplitudes. The spectral density is flat up to approximately 1/T_p, and then falls off. Therefore the pseudo-random function acts approximately like white noise with bandwidth 1/T_p, as long as the period T is sufficiently large that the spectral lines — which actually have spacing 1/T — are not individually resolved.

This result is important for system identification: if the input to a linear system is a pseudo-random binary sequence with the above autocorrelation, the crosscorrelation of input with output yields the impulse response of the system directly. From this it is possible to conveniently define a uniformly distributed random output (P) at the output:

In short periods at the end of the arranged intervals the given Arbitrariness (N) of the random function alternates (Shift). In doing so one obtains 1-Bit values from 0 or 1 after each Shift.
In longer periods the generator remains attached to the longer sequences from N_v (this corresponds to a p(T) = 0.1 or the Value of the Analog-computer).
The analog program output D with a given digital multi-value element allows the output of the analog unit:
- D_0 = a_j for the analog output if F ≤ 0.5
- D_1 = a_j for the next analog output if F > 0.5.
All values from the Analog-outputs D with a given digital Multiplier element can simultaneously be obtained and the Simulation of further values can be carried out:
- a) The simulation is done in N analog stages
- b) The analog computation is done through a binary sequence of random inputs
- c) The correlation of the output is compared with the specifications of the input, if they match the computation is accepted as statistically valid.

1 Remark: An Equation of the Analog computer for the statistical characterization must always provide a quantitatively evaluated Analog through the analysis of the actual distribution (Ensemble Method). The Analog values for the computation a_j − 1, …, a_j correspond to the specifications of the same statistically determined Distribution function characteristic in the given Analog computing diagram. In such a way a statistically meaningful result is obtained.

[Page 76]

Provided with the proper Normalization from this area, one obtains the suitable Frequency statistic (Kloss [8]) as an Ensemble Statistic Method for the Analog computer. The method is applicable to processes where the given Variable (x) is in the given Analog-computer diagram. From this one arrives at the relationship (75) and the Significance-statistic.

In the given variable x (F) one arrives at the following formula that has the Analog-computer statistic with the normalizing value G (F):

$$G = \sum_{j=1}^{n} G_j$$

The “Partition” f (x, G) in a certain analogue region by Addition of random individual additions, for which the Analog Computer uses the Significance check, is that these individual additions provide the given Analog Frequency. With this the Distribution-function f (x) for the Analog computer and the Normalization value G (F) is defined. In this way the Analog-computer can calculate the statistic (Ensemble Method) for a given pattern:

$$\sum_{j=1}^{n} f(x_j, G) = \frac{1}{G}\sum_{j=1}^{n} G_j$$

For the Normalization the analog value of the Ensemble Statistic G (F) is used. The analog distribution is then for its significance check:

$$G(F) = \prod_{j=1}^{n} G_j(F_j)$$

This formula shows how the Ensemble-Method for the Analog computer provides a distribution function check in a computationally valid way.

Fig. 38: Frequency and Ensemble-Statistics of a given Analog Computer variable.

[Figure: schematic diagram showing two parallel paths — one for “Frequency-Statistic” and one for “Ensemble-Method” — each with integration and normalization blocks]

[Page 77]

4. Optimization According to the Gradient Method

The task of the optimization is given: an analog computer (Fig. 40) is to find an Objective z to minimize (or maximize) and, its Application Function-properties f (x_1 … x_n) at a certain Extremum z, at its Minimum position z_min (or Maxima) to find. The Objective z with the functional f (x_1 … x_n) is found. The Objective and the Application-function f at the Analog-computer Output can with the Optimization-variable (x_1, x_2, …, x_n) be set and, in doing so, a z_min (for the Objective-function) can be achieved. The Objective x_1, x_2, …, x_n that can be computed for the optimization of the given analog variable z with the Analog-computer program can be changed continuously through the Analog-computer program and thus the analog variable for the optimization Objective f (x_1, x_2, …, x_n) is a set of the Analog-optimization variable.

Fig. 40: Block Diagram for the analog-computer Optimization.

[Figure: block diagram showing: Analogrechner (analog computer) block receiving inputs x_1…x_n, producing output z = f(x_1…x_n), feeding to Optimieranlage (optimization unit)]

As the Optimization-method with the Gradient-method [11] it is named. In this one uses an Analog-computer Simulation-circuit and the Gradient-method is used for the Optimization. In particular:

$$\frac{d x_i}{d t} = -k_i \cdot \frac{\partial f}{\partial x_i} \quad (i = 1, 2, \ldots, n)$$

The variables x_1, x_2, …, x_n follow the direction of the negative Gradient of the objective function f. The analog computer integrates these equations so that the variable x_i changes in the negative direction of the partial derivative. For the Gradient-method in the analog computer, the following conditions must hold:

The analog variable x has to follow the direction of the negative-gradient at all times
Each optimization step has to be normalized (each x_i reaches its proper variable-magnitude through the Analog-normalization k_i)
The gain parameter k_i must be properly chosen to ensure convergence

The optimization with the Gradient-method in the analog-computer can run automatically: a relatively large number of optimum values and suitable strategies can be computed, including analog non-linear numerical iteration.

[Page 78]

The nearest two Operations, notable Special-case k = j_0 = 0 and Extremum are: x_i, through j = t_i, generally the Analog-computer Gradient-method must go through this computation. One only one Optimization computation (i = 2, j = 0) is carried out, since the finding of the minimum condition at the given Analog-computation (Analog, j = 0) requires the feasibility of the given Analog variable f.

In the procedure the applicable Reference-function (Q [11], E [20]) for Analog-computation in the Optimization with the given Q 11 — and the given Variable of the Analog-computation-unit becomes the value for this analog-variable-computation.

The analog variable f (x) for the Optimization-function f in the Analog computation becomes:

$$\frac{d x_i}{d t} = -k_i \frac{\partial f}{\partial x_i}$$

where for all t > 0, the relevant analog-optimization solution gives a convergent trajectory.

Fig. 42: An example of the gradient optimization step program from Fig. 43 in the Analog-computer.

[Figure: timing diagram showing multiple operational phases with pulses]

For the gradient optimization, the signal for the Analog-computation is:

Start-condition: x_i = x_i^(0) at t = 0 (initial values for all variables)
Computation-phase: the computer integrates d x_i/d t = −k_i ∂f/∂x_i, while f is simultaneously computed
The Analog-computer program carries out multiple Optimization iterations until convergence; convergence is confirmed when |∂f/∂x_i| < ε for all i
The solution is found when all x_i have reached their stationary values, at which point z_min = f(x_1, …, x_n)

Fig. 43: Sequence diagram for an Analog-computer gradient-method step cycle.

[Figure: timing waveforms showing phases P1, P2, P3 with corresponding operational states]

The nearest analog computation provides:

a) Mechanical analog computation if the analog-variable is: x_i = x_i,j which is given for the analog-operation at the j-th step
b) The analog-computer does not require a digital-computer unit in this case
c) The analog computation can provide the gradient-computation for all the variables simultaneously

The Diagonalization of the matrix corresponds at each iteration to one analog-computer statement.

[Page 79]

The two nearest Operations, Specific Special-cases k = j_0 = 0 and Extremum are: x_i,j → x_i,j+1 (the values at the next step of the optimization variable are computed from the values of the current step):

$$x_{i,j+1} = x_{i,j} - k_i \Delta t \cdot \left.\frac{\partial f}{\partial x_i}\right|_{x=x_j}$$

also a digital computation of the Gradient is required. From the given analog-computer starting value the Objective-function value z is computed. The given analog-variable value is measured and the computation result is used for the gradient (Gradient method (Gradient)) at the Analog output, where the Objective-function output goes through the gradient and analog-variable x_i as a function of the nearest objective-value f(x_{i,j+1}).

In the Analog-computer one can show: the nearest Objective-function and the Analog input-variable is directed toward the optimum (minimum or maximum). The analog variable and each Analog circuit is aligned in the right direction, and the Optimization step for each Analog computation variable x_i is:

$$x_{i,j+1} = x_{i,j} - k_i \cdot \frac{\partial f}{\partial x_i}$$

where as analog output value the analog x_{i,j} is given from the previous Optimization-step value. The analog variable is then modified for the next optimization iteration. The Objective-function value z = f(x_1, …, x_n) at the new analog parameter values x_{i,j+1} is again computed, and the Gradient-method process is repeated until the optimum values are found.

Fig. 44: Digital type of an Analog-computer optimization (Gradient-method-dependent scheme).

[Figure: detailed flow-chart showing boxes for: Analogrechner (analog computer), Schrittgeber (step generator), Digital-Rechner (digital computer) — connected with feedback arrows]

The next analog stages are:

The relevant next analog stage x_i,j+1 is computed by the Analog computer in the analog domain; x_i,j was set and as the Analog value x_i,j (step j) available
The Analog-computer provides the needed analog-value x_i,j+1 in the next step
The digital computer receives the Analog-computer output value and checks whether the given convergence-criterion |∂f/∂x_i| < ε_i for all i is satisfied
If the criterion is NOT met, then the x_i,j+1 values are set into the Analog computer as new start conditions x_i,j → x_i,j+1, and the computation continues
If the criterion IS met, x_i,j+1 is the optimum value, and the result x_opt is output

The digital computation is the gradient-check step.

[Page 80]

The next one Analog-stage contains i = j_0, …, (j) Extremum of the x-Arithmetic from Analog x (Gradient). From a digital-analog combination of one Analog computation, the Objective-function F (j) in the analog domain computation is obtained. The digital-computation then uses the gradient-descent method on the Analog-computer output.

For the digital-analog optimization with the Gradient-method, the Analog computer provides the basis for the digital computing part. The following equations describe the hybrid gradient computation:

$$x_{i,j+1} = x_{i,j} - k_i \cdot \frac{\partial f}{\partial x_i}\bigg|_{j}$$

The analog part provides f(x) and the digital part provides the gradient step and the iteration.

Fig. 45: Digital Analog type of an Optimization corresponding to the Gradient-method.

[Figure: schematic flow-diagram showing two parallel tracks — Analog-Computer track and Digital-Computer track — combined]

The result of the Optimization is a good analog objective-function result if:

The analog computer gain k_i is matched in the computation
The Analog-Optimization step is the correctly aligned Analog output result
The Analog and Digital steps are properly synchronized

As the Analog output of the Optimization, the step result is then:

$$\Delta x_i = -k_i \frac{\partial f}{\partial x_i}$$

The result is taken and stored by the digital part.

The individual step of the Optimization also contains the result for the Analog computation. Through a digital analog computation-output the individual step result can also be printed. As the Analog-output result, the computation can be examined and checked:

The Analog-output result is stored in the Digital memory for each Optimization step
The Digital-computer checks whether the gradient condition is met
If NOT met, the next Optimization step begins
If met, the digital result for the Analog output is stored and the Optimization process is concluded

From this hybrid gradient-optimization approach, the Analog-computer can compute the objective-function values while the digital computer controls the optimization trajectory.

[Page 81]

Adjacent to the Program of the Parameter in the assigned direction: When an alteration is found, this is changed by the Program in the analog computation domain. The Program changes the parameter as follows: as long as the Objective-function z decreases (in the case of minimization), the step-direction is kept the same. If z increases, the direction is reversed. This scheme guarantees that the computation converges upon the minimum.

The organization of the Optimization as follows (Fig. 80):

The analog-computer runs the analog simulation and provides the objective value z
The digital control unit monitors z and computes the Gradient-step
The Analog-parameters are updated and the step-direction is controlled

From this optimization-program the Parameters are being changed and the result for the Objective-function z can be monitored.

Fig. 80: Sequence of the Optimization according to the Gradient-method.

[Figure: multi-level timing diagram showing phases of optimization: Initialization, Gradient computation, Step update, Convergence check — with clock pulses and state indicators]

The Optimization process carries out the following analog-program steps:

The initial values x_1^(0), x_2^(0), …, x_n^(0) are set into the analog computer
The analog computer computes z = f(x_1, …, x_n) and holds the value
The gradient ∂f/∂x_i is estimated by small perturbations δx_i
The step Δx_i = −k_i · ∂f/∂x_i is computed digitally
The new parameter values x_i,j+1 = x_i,j + Δx_i are transferred to the analog computer
If convergence is not yet achieved, return to step 2

As an advantage of the gradient-method with analog-computer support: a relatively large number of parameters can be optimized simultaneously, since each of the analog integration paths computes the gradient component in parallel.

Fig. 82: Optimal type of an Analog-computer optimization next to the Gradient-method.

[Figure: schematic block diagram showing analog-digital combination]

The analog-computer can then output F (x_1, …, x_n) for:

S: the analog steps toward the optimum are 80 ms long
x_e = 10 ms, T_g = 50 ms, k_i = 5
The analog result is accumulated with each step, and the final result converges

Adjacent to this analog computation result, the Gradient-method provides a better result for the study of the Analog computer.

The Hammersmith, Müller and Wolf studied one such Optimization-method for the study of the analog computer and obtained the following references:

Literature

G. A. Bekey, W. J. Karplus, in K. J. Muhleman: Band and Verzweigung, die Technik der Analogverlauf und Schrittweite Rechner. Oldenbourg Verlag, München (1967)
K. Bley: Digitale Rechenmaschinen. Telefunken-Zeitung 29 (1956) Nr. 1, S. 63
R. Borst: Analog computation of random processes. Proc. 3rd International Analogue Computation Meeting, Brighton, Sept. 1961
H. Doetsch: Tabellen zur Laplace Transformation. Springer Verlag, Berlin-Göttingen-Heidelberg, 1947
R. Doetsch: Theorie und Anwendung der Laplace-Transformation. Springer Verlag, Berlin-Göttingen-Heidelberg, 1950
K. Krampitz and P. Kopp: Ober zufällige Schaltzeitschwankungen. Telefunken-Zeitung, Heft 148 (1965), Vol. 87, p. 4
H. Krampitz and B. Kopp: Ph-inf. informatique. Telefunken-Zeitung, Heft 148 (1965), Vol. 38, p. 4
H. L. A. Kloss: Contribution à l’étude des générateurs de nombres pseudo-aléatoires. Proc. Spring Joint Computer Conference 1966, Washington, p. 263
R. Korn: A hybrid analog-digital pseudo-random noise generator. Proc. Spring Joint Computer Conference 1966, Washington p. 263
M. Rosen and M. Brauer: Hybrid simulation of stochastic processes. Proc. 4th International Analogue Computation Meeting, Brighton, Sept. 1964
M. Rosen and M. Brauer: Optimization of stochastic processes. Ibid.
A. Blaquière: Nonlinear System Analysis. Academic Press, New York (1966)

[Page 82]

Hybrid Computing Systems

by W. Giloi

The principal subject and one primary application of hybrid computing systems has already been discussed [1]. An overview of the Organization and Application of hybrid Rechenmachines follows here and also an auxiliary Register for the Organization and Application of hybrid-computer systems.

[page 82: figure only — photograph of hybrid computer system installation]

The advantages of hybrid computer systems relative to purely digital or purely analog systems lie in the fact that they combine the particular strengths of each type of computer. The Organization and Application of hybrid Rechenmachines allows: to give functions to each computer type that it can solve particularly well. The digital computer performs: exact arithmetic, logical operations, program control; the analog computer performs: continuous fast parallel computation of differential equations, nonlinear functions, and integration. Together one obtains a system that is faster than a purely digital system and more precise and flexible than a purely analog system.

[Page 83]

Partial differential equations can also be solved by a state-space method (1), when a certain Computational function is constant (k) and the specific m computational variables h [22, 24] are the Computational coefficients. For this the Computational function and the specific Simulation function h(t) is a linear (i.e., constant) state variable (from [22, 23]). For this case the Computationally linear variables hold [22, 24]:

$$\frac{d^n y}{d t^n} = f(t, y, \dot{y}, \ldots, y^{(n-1)})$$

(for the linear, constant-coefficient case). These Computational-linear equations can be solved with combined analog-digital systems [22, 24].

For Linear differential equations one can write, for the Computational function k (t) and constant variables h:

$$h^{(n)} + a_{n-1} h^{(n-1)} + \ldots + a_1 \dot{h} + a_0 h = 0$$

These Computational-linear equations are solvable analytically: the solution form is h = A e^{λt} where λ are the eigenvalues.

The possible outputs of a hybrid computer system belong to Class I (Table I):

Class I — Possible for purely analog computation (small number of variables, smooth solutions)
Class II — Medium complexity (moderate number of variables, some logic)
Class III — High complexity (many variables, discontinuities, logical branching, iteration)
Class IV — Maximum complexity (very large systems, statistical parameter variation, optimization)

Table I: Assignment of computing task classes to the three basic Rechenmachine Organization types

Class	Analog	Digital	Hybrid
I	suitable	possible	unnecessary
II	partially suitable	possible	advantageous
III	unsuitable	suitable	preferred
IV	unsuitable	possible (slow)	optimal

3. Examples for the Three Classes of Hybrid Computer Organization

3.1 Integration of Differential Equations (Class I)

While the analog computer is suitable for integration of ordinary differential equations, and for these cases often offers an adequate solution, problems involving a mixture of continuous and discrete (switching) behavior — or where the parameters must vary in a systematic way (parameter studies) — call for a hybrid organization. Such tasks are:

Repeated simulation to identify system parameters
Sensitivity analysis of systems with respect to parameter variations
Statistical analysis of systems with random inputs

[Page 84]

Partial differential equations can also be solved by a state-space method using analog-computer techniques. One method of solution requires that the spatial derivatives be approximated by finite differences [22, 24]; the resulting system of coupled ordinary differential equations is then solved by the analog computer. This approach is particularly useful when the PDE describes a physical process whose continuous-time behavior is the quantity of interest.

For such PDEs the coefficient matrix is typically tridiagonal, and a relatively small number of analog-computer elements is sufficient. For example, the heat conduction equation in one spatial dimension:

$$\frac{\partial T}{\partial t} = \alpha \frac{\partial^2 T}{\partial x^2}$$

is approximated by the difference scheme:

$$\dot{T}i = \alpha \frac{T{i+1} - 2T_i + T_{i-1}}{(\Delta x)^2}$$

which gives a system of n ODEs (one for each spatial grid point i). This system can be implemented on an analog computer directly.

For systems of greater complexity — more spatial dimensions, nonlinear equations, or complex boundary conditions — the hybrid computer offers the best approach. A boundary-value problem, for example, cannot be directly programmed on a pure analog computer, since the boundary conditions at the far end of the spatial domain are not known at the start of integration. The hybrid approach handles this by using the digital computer to iterate on the unknown initial conditions until the far-end boundary conditions are satisfied (shooting method).

3.2 Statistical Analysis and System Identification

For tasks requiring:

Spectral analysis (power spectrum estimation)
System identification (impulse response, frequency response)
Monte-Carlo simulation of stochastic systems

hybrid computation offers decisive advantages. Because of the breadth and speed of the analog computer in continuous-time simulation, many repeated runs can be carried out in a fraction of the time that a pure digital solution would require.

[Page 85]

As representative examples of statistical analysis are cited here. Korn [previous reference] introduced a method for computing an arbitrary probability function P(t) (inter-arrival-time distribution) in a class of non-Poisson stochastic processes on the analog computer — this is itself a fairly well-known computation. From a computing standpoint, the following can be stated: it is possible to model and simulate Point processes (Counting processes) where events arrive with arbitrary inter-arrival-time distributions. One can also simulate modulated counting processes in which the rate function λ(t) varies continuously in time.

For a given stochastic process the method provides:

An analog representation of the inter-arrival-time distribution F(t)
An analog representation of the integrated counting process N(t)
The complete stochastic simulation via the analog computer without a digital-computer element being required

For more complex problems — where the stochastic process involves logical branching, or where the underlying process is non-stationary — the hybrid approach is advantageous. In such cases the digital computer controls the branching logic and parameter settings while the analog computer performs the continuous integration.

For the simulation of the Objective-function f at the Analog-Computer, the following applies:

A relatively small number of variables (n) can be handled by the analog computer alone
For larger problems where n grows, or where parameter variation is needed, the hybrid approach is preferred
The hybrid approach is especially well-suited for the computation of Z-Transform valued distribution functions, as these require both analog (continuous) and digital (discrete) computing elements

As a primary result: the hybrid analog-digital system allows the combination of high-speed analog continuous simulation with high-precision digital computation and control. This is especially valuable for non-Poisson stochastic simulations, optimization tasks, and system identification.

[Page 86]

Cross-correlations or stability-problems as a consequence of the information-theoretical analysis and those caused by the Distributions of the Discretization are particularly noted, as well as those arising from an examination (by sampling) of stochastic systems. There are therefore quite numerous cases where it is in the interest of the analyst to use a hybrid system.

3.3 Integration of Ordinary Differential Equations (with digital control of switching)

Attention is also called to the particularly good position of the hybrid computer for the solution of certain types of ODE systems — namely those that involve discontinuities or switching conditions. For example, the motion equations of a missile or satellite often contain logical switching conditions (stage separation, thrust on/off) that are most naturally expressed in digital logic; while the trajectory equations themselves are most naturally solved by analog integration. Such a system constitutes a Type-II or Type-III problem in the classification above, and a hybrid solution is optimal.

A well-known example with a “stepped start” is:

$$m \ddot{x} = F(t) - D(\dot{x}, x)$$

where F(t) is a piecewise-constant thrust and D is a nonlinear drag. The digital computer evaluates the switching of F(t) and the nonlinear D coefficient table, while the analog computer integrates the equations of motion.

3.4 Organization of Inputs and Outputs for multi-variable Digital-computers

For the digital computer, the multi-variable analog-digital interface becomes the primary organizational consideration. The analog-digital converter must be:

Fast enough to sample all variables at the required rate
Precise enough (number of bits) to capture the needed dynamic range
Well-synchronized with the analog computer’s operating cycle

The basis digital-analog converters (DAC) in the Hybrid computer use fixed step-widths. In the most modern form of the hybrid, this resolution approaches 10 to 16 bits per channel, and the conversion time is less than 1 μs. These basics allow one to obtain the following from the digital-analog interface:

Factor: by the change of individual Inputs and Outputs the Digital-computer converts the analog reference signal into a Basis digital-analog reference quantity. This may then be applied to a series Rechenmachine variable.
For the DAC as well as the ADC (analog-to-digital converter): all channels must be properly shielded from noise, and ground loops must be eliminated. This requires attention to grounding and to the physical separation of analog and digital signal paths.
Factor: by the careful organization of the Input and Output arrangement for the analog computer, whereby all Inputs and Outputs of the digital-computer correspond to analog ground.

Also all other Parameters (Input, Output) must be so organized that:

The number of analog channels is minimized (only the essential variables need be converted)
The timing of the data transfers between analog and digital is well-defined and repeatable
A common timing reference (master clock) synchronizes both the analog computer cycle and the digital sampling

[Page 87]

Factor: through the careful Displacement of individual Inputs and Outputs with one another, a corresponding gain in signal level can be achieved, so that the noise contribution of the ADC is reduced.

All these factors are decisive in how one designs and evaluates the digital-computer in the hybrid system. These are also relevant to the following points:

Quite often in a Hybrid computer one also arranges so that a certain “Digital-Machine input” — called a “single-precision machine” — is used (corresponding to an analog value range of ±1, mapped to ±2^(N-1) digital counts). This simplified mapping allows the analog-digital interface to be made more compact. It has the added benefit that the roundoff in the ADC corresponds directly to a known fractional error of the analog full-scale signal.

For the hybrid Rechenmachine overall, one also notes:

1.1 Hybrid Computer Applications to Periodic Processes

As a general digital-analog system using D/A conversion, in which the analog computer is used to model the continuous physical system and the digital computer carries out the discrete logic and iteration, the following important applications exist for periodic processes:

The digital program uses one entire computation as a Table-dependent — for example, a lookup table for a nonlinear function such as sin, exp, or a measured data table — and outputs via the DAC to the analog computer
The analog computer receives this input and integrates the resulting differential equation for one analog period
At the end of each analog period, the ADC samples the state variables and the digital computer updates its tables for the next period
The process repeats, converging on a periodic steady-state solution

This technique is particularly useful for the analysis of nonlinear periodic systems, where the computation of the steady-state periodic orbit cannot be done by simple integration from arbitrary initial conditions.

1.2 A further Factor in the Organization of Inputs and Outputs of the Digital-computer

For the organization, the digital computer first sets an initial set of D/A outputs for the analog computer parameters. Then the digital computer waits for the analog computation to complete (or reads intermediate results), updates its model, and prepares the next set of parameter updates. The coordination between analog computation time and digital computation time is crucial.

The key timing relations are:

$$T_{analog} \gg T_{digital}$$

so that the digital computer has time to compute the next step while the analog computer is running. This is generally satisfiable for computing tasks where the analog repetition frequency is not too high. For real-time simulation, the analog computer typically operates at time-scale factors of 1 to 1000 (real-time to machine-time ratio), giving ample time for digital processing within each analog run period.

[Page 88]

Cross-correlations among stochastic variables are often of interest in system identification and stochastic analysis. In the hybrid computer, these are computed as follows.

The digital computer generates a pseudo-random binary sequence (PRBS) as the excitation signal, passes it through the DAC to the analog computer input, and samples the analog output via the ADC. The digital computer then computes the crosscorrelation of the input PRBS with the sampled output. By the Wiener-Hopf theorem, this crosscorrelation equals the convolution of the PRBS autocorrelation with the system impulse response. Since the PRBS autocorrelation approximates a delta function (as shown in Section 3.3), the crosscorrelation is approximately equal to the system impulse response. This is the fundamental basis of PRBS system identification.

The advantages of this method relative to purely digital simulation are:

The analog computer supplies the system dynamics in real time (no numerical integration errors)
The digital computer accumulates the crosscorrelation sum accurately
The measurement bandwidth is determined by the PRBS clock rate (1/T_p), not by the digital integration step size

For this stochastic identification method, the requirements on the analog-digital interface are:

ADC resolution: 10–12 bits minimum for acceptable signal-to-noise ratio
Sampling rate: at least twice the PRBS clock rate (Nyquist condition)
Synchronization: the PRBS generator clock must be synchronized with the ADC sampling clock

4. Organization of the Ein- (Input) and Ausgabe (Output) of the Digital-computer

In general, for the digital computer in a hybrid system:

Factor: through the careful Displacement of individual Inputs-Outputs, the digital-computer introduces only one narrow Fehler (error) band (corresponding to ±½ LSB of the ADC), while the analog computer introduces its own amplitude noise
Factor: the digital-computer requires the analog-computer output to be sampled at the right time within the analog computation cycle, avoiding transient settling artifacts
Factor: by the careful organization of the Input and Output timing, one can arrange so that the analog computer provides valid data during a “hold” or “output” phase, during which the ADC sampling occurs

The digital computer then:

Reads the ADC results
Updates the objective function and gradient
Sets new DAC values for the next analog cycle
Controls the mode switches (Compute, Hold, Initial Condition) of the analog computer

[Page 89]

Fig. 89 (Continued from previous section):

[Figure: waveform diagrams showing: left panel — “Differentiator” output waveforms; right panel — “Sampler” output waveforms; both showing how the pseudo-random sequence is modified by passing through a filter and sampling]

More specifically, this is the condition for the Normalization from which the sequence of the Digitally-filtered output is derived. Thus the sample (x_k) at the Digital-computer has the meaning that, from which the analog variable x is derived, the condition is verified:

If the Filter is used as an element, the following two conditions are checked by the Digital-filter:

It holds x_k ≈ x(k T_s) for all k (the sample faithfully represents the continuous analog signal at the sampling instants)
The filter must also hold: x_k = 0 for t < 0 (causal filter, no anticipation)

Furthermore it is stated, that the digital sampling should be:

In the Bernoulli random sequence, samples from a short interval T_s = T_p are taken — each sample is distributed
The Frequency corresponding to 1/(N·T_s) is smaller than or equal to 1/T_p
The Normalization of the Discrete sequence x_k is given from the analog-computer output F (the Frequency) in the following steps:
- The analog output is first filtered through a low-pass anti-aliasing filter with cutoff at 1/(2 T_s)
- Then sampled by the ADC at rate 1/T_s
- The digital sequence x_k is obtained

The digital sequence x_k then represents the analog signal faithfully, provided that the Nyquist condition (sampling rate ≥ 2 × signal bandwidth) is satisfied.

Moreover the digital sampling holds, through the checking of the Normalization from the digital output, that:

The Analog output F from the analog computer has a bandwidth less than 1/(2 T_s)
The ADC converts F at rate 1/T_s with N bits of resolution
The digital result x_k = F(k T_s) to within the quantization error ±½ LSB

This Wurst (sausage) order — that is the properly filtered → sampled → quantized sequence — passes to the Digital-computer for further processing (gradient computation, optimization, correlation).

The requirements then go further in the direction of narrower filter bandwidth:

If the Narrowband filter is applied, the digital-computer computation can be more precise, since the signal has less spectral content near the Nyquist limit and aliasing is reduced. This is the basic “oversampling” principle applied in hybrid computing.

$$x_k = \frac{1}{T_s} \int_{(k-1)T_s}^{k T_s} x(\tau), d\tau$$

This integral form of the sampler is sometimes implemented by integrating the analog signal during each sampling interval and then resetting the integrator; this is called “integrate-and-dump” sampling and it naturally rejects out-of-band components.

[Page 90]

The tabulated Schrittweite (step-size) towards the direction of the next Filter leaves from the already digitized representation one further “higher-order” Filter:

$$f(x) = f(x^) + \sum_{i} \frac{\partial f}{\partial x_i}(x - x_i^) + \frac{1}{2}\sum_{i,j} \frac{\partial^2 f}{\partial x_i \partial x_j}(x_i - x_i^)(x_j - x_j^) + \ldots$$

and from the gradient direction the Normalization:

$$f_k(y) = \frac{1}{T_s}\int_0^{T_s} h(\tau) x(k T_s - \tau), d\tau$$

For T_s = 1.5 for the filter, one gets only a normal (Gaussian) first-order Transfer function:

$$H(s) = \frac{1 - e^{-s T_s}}{s T_s}$$

This is the transfer function of the integrate-and-dump filter, which has a first null at f = 1/T_s. The magnitude is:

$$|H(j\omega)| = \frac{\sin(\pi f T_s)}{\pi f T_s}$$

This function suppresses all signals above the first null and passes low-frequency signals with unit gain. It is the natural anti-aliasing filter for a sampler operating at rate 1/T_s.

From the better sampling-theory result — the Nyquist condition — the approach obtains:

For f = 1.5 T_s^{-1}, one gets a normal first-order sampling result, so the filter response is:

$$|H| = \left|\frac{\sin(\pi \cdot 1.5)}{\pi \cdot 1.5}\right| = \left|\frac{\sin(1.5\pi)}{1.5\pi}\right| = \frac{1}{1.5\pi} \approx 0.212$$

So at 1.5 times the Nyquist frequency, the integrate-and-dump filter provides about 21 dB of attenuation, which may or may not be sufficient depending on the application.

For the higher-order filtering in the digital domain, additional digital filter stages are applied after the ADC to sharpen the roll-off. In a hybrid computer, a common approach is to apply a simple first-order IIR (infinite impulse response) digital filter to the sampled sequence:

$$y_k = \alpha y_{k-1} + (1-\alpha) x_k$$

where 0 < α < 1 is the filter coefficient that determines the filter time constant τ = −T_s / ln(α). Larger α gives a longer time constant (more smoothing, narrower bandwidth).

The Transmitting function for the Sampler-filter-Normalization now gives the result:

$$f_k(y) = \frac{1}{N} \sum_{k=0}^{N-1} y_k$$

which is a simple running average, providing a further factor of √N improvement in signal-to-noise ratio relative to a single sample. This is the Normalization formula for the parameter estimation step in the hybrid gradient-optimization procedure.

TELEFUNKEN-ZEITUNG, Jg. 39 (1966) Heft 1

even better according to Klasse S, so that the digitally converted frequencies correspond exactly to the eigenvalues of the analog reference network, and consequently the analog network’s behavior is also retained correctly. It is also important, however, that the filter continues to function correctly for arbitrary Rechenbeschleunigung (computing acceleration). The requirements that one makes of a filter in terms of its analog-to-digital behavior are different from those that one would impose on a filter that is intended for digital signal processing. The digital filter must above all execute the operations demanded of it correctly even under normal operation — that is, it shall also perform its specified function even during undisturbed operations at the actual Abtastfrequenz (sampling frequency).

4. Fehlerkorrektur (Error Correction)

We wish to examine in the following the data of two adjacent filters Ny, the latter belonging to an order-r digital filter. It can be seen that as the Zeitpunkt (time point) grows, the Fehler (errors) of the filters from the second order onward can become quite large. The digital filter with order r must, in general, take over the Fehler from the r–1 overlapping operating values. In practice it can in fact be observed that digitally-constructed filters of higher order have unfavorable rounding behavior when used at the appropriate level; thus the digitally realized filter of nth-order may indeed, under certain conditions, cause problems.

Mathematically, for the sampling parameter n = r(1) it holds that the Komponenten (components) of the Vektors (vector) V obey:

$$ V_r = f(V_r) $$

(Differentialgleichungs-Operator means Differential-equation Operator). A closer inspection reveals that the filter will produce, for each sampling step, the Komponente of the vector of Ordnung (order) n as well. In this way one can also seek a criterion for the Fehlergrenze (error bound) of a given digital filter. The difference between two adjacent operating values gives the Differenz (difference) of the filter coefficients. The magnitude of this Differenz that can become arbitrarily large is naturally dependent on the Abtastschrittweite (sampling step width) h. For very small values of h, the errors can generally be made as small as desired by a suitable selection of h. This criterion allows one to assign to the digital filter a Rechenbeschleunigung (computing acceleration), and hence also a set of valid Abtastfrequenzen (sampling frequencies).

In deriving the error bound, the filtering operations r = 1, 2 and 3 were considered. For the first-order filter, the error is defined as follows:

$$ \varepsilon_{r} = V_{r} - V_{r}^{*} $$

(Differentialgleichungs-Operator n = 1). After this Filterordnung, the recursion relation does not contain additional correction terms. However, for the Filterordnung n = 2 and also n = 3, the error bounds become:

$$ \varepsilon_{r,1} = V_r - V_r^* = f(V_{r-1}, V_{r-2}) $$ $$ \varepsilon_{r,2} = V_r - V_r^* = f(V_{r-1}, V_{r-2}, V_{r-3}) $$

so that after this Fehlerkorrektur (error correction) one obtains:

$$ \varepsilon_{r,n} = V_r - V_r^{n+1} + c_1 V_r^n + c_2 V_r^{n-1} $$

Table 2: Digitally realized filter for optimal Kompensation and Rechenfehler

Filter	Abtastschrittweite (Sampling step width)	Differenzen (Differences)
First-order	h	—
Second-order	h, h²	first differences
Third-order	h, h², h³	first and second differences

This can thus be computed from both the Digitalrechner (digital computer) and from the Analogrechner (analog computer) based on an n-th order Polynoms (polynomial). One can then verify how well the polynomial approximation of order n fits the computed data, and hence also check for errors of the filter. The more precisely the Komponenten of the digital filter can be computed, the smaller are the residual errors after the filter correction. In practice, the Abtastschrittweite can be selected to be sufficiently small, so that the total Rechenfehler (computing error) remains well within bounds. The table shows the digitally implemented filter for optimal Kompensation and Rechenfehler (computing error) for various filter orders.

4.3 Fehler durch stochastische Variation der Ein- und Ausgabesignale untereinander (Errors through stochastic variation of input and output signals among themselves)

Because it is also possible that digital circuits have Zufallsfehler (random errors), one must also know the Fehlergrenze for this type of interference signal. The Komponenten V_r of the Vektors V satisfy:

$$ V_r = f(V_r) $$

(Differential operator for Abtastschrittweite h). For a fixed-point Rechnung (computation), the higher-order components of the vector may also be corrupted by rounding. In the case of a floating-point Rechnung the conditions are somewhat more favorable. The more components one carries in the Vektor, the larger will be the mutual interference between the components. Since the error propagates from step to step, a quantitative criterion exists for the error behavior.

After the Filterordnung is reached, the calculation also reaches the boundary of the Fehlerbereich for the individual Komponenten. A practical computation using the Digitalrechner should account for this fact by setting the Abtastschrittweite small enough.

As an intermediate step in between, it has shown, with the help of the Polynoms, that the optimal Abtastfrequenz f_s = 5 Hz to 10 Hz is to be expected for an uncorrected digital filter. However, after the Fehlerkorrektur it can be demonstrated that the achievable Rechenbeschleunigung is considerably larger.

After the Fehlerkorrektur, using a B. Berck Kompensation method, one obtains a Hilfsausgangsgröße (auxiliary output variable) V^(n+1) which, for one-iteration integration, uses the intermediate formula:

$$ V_r^{n+1} = V_r - c_1 V_r^n + c_2 V_r^{n-1} $$

In the case of linear Iterationsinterpolation, the following Hilfsausgangsgröße applies:

$$ W_{n+1} = V_r - \sum_k c_k V_r^{n-k} $$

5. Organization des Koppelwerkes (Organization of the Coupling Unit)

An analog-digital coupling unit that has two or more Analogrechner (analog computers) and one or more Digitalrechner (digital computers) connected with each other will, as a rule, have a greater Bit-Intercalation. After this Bit-Intercalation, the data are transmitted from one machine to another. The entire Bit-Intercalation structure has at most two Abtastsignals; one Abtastsignal for the connection between Analogrechner and Digitalrechner, and another for the return path from the Digitalrechner to the Analogrechner.

Fig. 3 shows the internal structure of a coupling unit between two Analogrechners and one Digitalrechner. The entire Koppelwerk (coupling unit) comprises the following components:

a) One Analogrechner Rechenfeld (computing field) with Potentiometern (potentiometers) and Verstärkern (amplifiers) as well as the associated Programmierkonsole (programming console).

b) An electronic “Memory” with the associated Steuerlogik (control logic), which also handles the analog-digital conversion (Übertragungssteuerung — transfer control).

c) An eigentliche “direct” Steuereinrichtung (control device) that also handles the complete Übertragungsprogramm (transfer program), for example the program for one-time comparison of an Analogrechner result with a Digitalrechner value.

Up to 54 Analogrechner input quantities and 8 output quantities from the Digitalrechner can be transmitted at once in one Übertragungszyklus (transmission cycle). The maximum number of transmitted quantities is however dependent on the available memory capacity. The Bit-Intercalation allows up to 84 transmission words of 13-bit width (including sign). The achievable Rechenbeschleunigung in this arrangement is at most 84:1.

7.1 Eignung analoger Daten im Digitalrechner (Suitability of analog data in the digital computer)

For the coupling of the Analogrechner output to the Digitalrechner input: The Analogrechner output signal is a continuous voltage, while the Digitalrechner can only process discrete, digitally-coded values. It is the task of the coupling device to convert between these two worlds. The conversion must take place at the correct Abtastzeitpunkt (sampling time). For this purpose:

In practice it has been found that the inputs of the Digitalrechner and Ausgaben (outputs) of the Analogrechner are converted well if the following criteria are met: The Abtastfrequenz is high enough compared to the bandwidth of the analog signals; the Quantisierung (quantization) error is small enough; and the Übertragungszeit (transmission time) is short enough compared to the Abtastintervall (sampling interval).

7.2 Ausgaben digitaler Daten in den Analogrechner (Output of digital data into the analog computer)

The digital data must be converted and held for the Analogrechner. After the D/A conversion, the data are held at a constant level using a sample-and-hold circuit until the next update. This is especially important because the Analogrechner needs a Dauersignal (continuous signal) at its inputs, not just momentary pulses.

7.3 Gesichtspunkte für die Gestaltung eines D/A-Umformers (Design considerations for a D/A converter)

The D/A converter must have a minimum Auflösung (resolution) and linearity commensurate with the overall accuracy of the hybrid computer system. Since the Analogrechner typically operates in the range ±10 V or ±100 V, the D/A converter output range must match. The settling time (Einschwingzeit) of the D/A converter must be short compared to the Abtastintervall.

7.4 Ausgaben digitaler Daten in den Analogrechner (Output of digital data into the analog computer)

In the conversion of digital data from the Digitalrechner to the Analogrechner, one has further possibilities to use. For example, one can program the Digitalrechner in such a way that it outputs not only the final Rechenergebnis (computation result), but also intermediate results, which can then be visualized on the Analogrechner’s display instruments in real time. This “on-line” visualization is a major advantage of the hybrid approach.

3. Organization des Koppelwerkes (Organization of the Coupling Network)

Bild 3 (Fig. 3) shows a block diagram of a coupling unit between several Analogrechnern. The following three functions must be distinguished:

a) the Analogrechner Rechenfeld, as the actual computing unit for the analog simulation.

b) an electronic “Speicher” (memory) which is associated with the Steuerlogik (control logic) and also handles the ADU (analog-to-digital converter) and DAU (digital-to-analog converter) functions.

c) an eigentliche “direct” Steuereinrichtung that also handles the complete Übertragungsprogramm.

Up to 54 Analogrechner input quantities and 8 Digitalrechner output quantities can be transmitted in one Übertragungszyklus. The Bit-Intercalation enables up to 84 transmission words. The achievable Rechenbeschleunigung is at most 84:1.

7.5 Gesichtspunkte für den Analogrechner-Betrieb im Hybridbetrieb (Operating considerations for the analog computer in hybrid mode)

The Analogrechner is always the component in the hybrid system where the actual dynamic simulation takes place. The Digitalrechner takes over the role of parameter generator and Steuerrechner (control computer). The Analogrechner sets up the equations of motion in “real time” (or in accelerated or decelerated time), while the Digitalrechner provides updated coefficients and reads back the state variables.

For the coupling procedure, it is important that the two machines share a common time base. The Abtasttakt (sampling clock) of the coupling unit synchronizes both machines. When the Digitalrechner is running at a Rechenbeschleunigung factor of n relative to real time, the Abtastfrequenz must be correspondingly higher.

The author’s address:

Dipl.-Ing. Fritz, wertvolles Vorarbeiten; Herren Dipl.-Ing. Fritz und Dipl.-Ing. Lang, wertvolle Diskussionen und die Durchführung von Rechnungen.

References:

[1] Franz Eder, A. Otto, W. Otto and E. Hochbein: Stand und Entwicklung der Technik der analogen und hybriden Rechenanlagen. Telefunken-Zeitung 38 (1965), pp. 91–101.

[2] M. Otto and A. Lueder: Analogrechner. Springer-Verlag, Berlin-Göttingen-Heidelberg, 1966.

[3] O.H. Schuck and H.L. Harrison: Digital computers in system simulation. Proceedings AFIPS Fall Joint Computer Conference 1961, p. 119.

[4] W. Giloi and R. Lauber: Digitale und hybride Rechenmaschinen. Teubner-Verlag, Stuttgart, 1963.

[5] W.B. Bledsoe and A.W. Brown: A method for improved hybrid computer simulation. Proc. FJCC 1963, S. 387–393.

[6] W.J. Karplus: Error analysis of hybrid computer systems, including the effect of the digital-to-analog converters. Proceedings of the IFAC Symposium, Prague, 1965, Bd. I, S. 37.

[7] W. Giloi: Digitale Rechner als Echtzeitmaschinen. GAMM Tagung, Hannover, 1963.

[8] K. Ogata: State space analysis of control systems. Englewood Cliffs, N.J., Prentice Hall, 1967.

[9] W. Giloi: A method for optimal sampling in hybrid computer systems. Proc. FJCC, 1963, pp. 394–402.

[10] K.L. Hitz: A digital computer for fast real-time hybrid computation. IEEE Transactions on Electronic Computers, EC-13, (1964), p. 566.

[11] EDUCATION 6-100. Telefunken Zeitung 38 (1965), pp. 1 ff.

Programming of Hybrid Computers in ALGOL

Von H. Marschall

The Möglichkeit (possibility) of programming a hybrid computer in a familiar notation has long been a goal in the computer field. With the rise and spread of the Digitalrechner (digital computer), it became necessary to learn the Digitalrechner programming language ALGOL, which was adopted and used as a common Programmiersprache (programming language). On this basis it was then also possible, for hybrid computers (Hybridrechnern), to adopt the ALGOL formulation for the description and programming of the Analogrechner parts.

The proposal presented here has proven itself in practical work over a period of several years. It meets the requirement of a “common language” for the Analog- and Digitalrechner, and in doing so it completely dispenses with the need for a separate program description. It also enables, for the first time, a genuine automatic optimization of the Analogrechner programming through the Digitalrechner.

The Möglichkeiten (possibilities) for the use of this Proposal go considerably further, however. In many cases it is advantageous to program the Hybrid-Maschine (hybrid machine) in the form of a Digitalrechner program, and to have this program provide control over the Analogrechner. The approach described here is particularly well suited to this usage.

The fact that this approach has been widely used shows that the choice of ALGOL as the programming language for the hybrid computer was correct. Numerous applications have been solved using this Methode. And it may well prove useful not only at Telefunken but also at other locations, to the extent that the programs are transferable.

Möglichkeiten und Grenzen

The Hybridrechner finds itself in a peculiar position: the Analogrechner component has always operated as a continuous machine (kontinuierliche Maschine), executing integration and algebraic function generation simultaneously and in parallel; the Digitalrechner component is, by contrast, strictly sequential. Programming the Analogrechner, therefore, is in principle quite different from programming the Digitalrechner.

The key question is therefore: Is it possible — and if so, to what extent — to use the Digitalrechner to program the Analogrechner, i.e., to use a Digitalrechner programming language such as ALGOL to describe the behavior of the Analogrechner?

The answer is: Yes, but with certain important restrictions. The “language” for the Analogrechner is, in principle, the system of differential equations (or difference equations) that the machine is set up to solve. The ALGOL description thus describes this system of equations, not a sequential program in the conventional sense.

For the Analogrechner, the following features of a useful programming language can be identified:

It must be possible to specify all Potentiometer (coefficient) values.
It must be possible to specify all Integrator (integrator) initial conditions.
It must be possible to specify all interconnections between the computing elements.
It must be possible to specify the Betriebsart (operating mode): initial condition, operate, hold, etc.
It must be possible to read out results (Ausgabe from the Analogrechner).

ALGOL in its standard form handles the first two requirements well, since it has powerful arithmetic. The description of interconnections is more problematic, since ALGOL is by nature sequential. Nevertheless, a special-purpose extension of ALGOL can be used to describe the Analogrechner connections in a way that can be compiled and used as input to a computer-assisted patching system.

Bild 1 (Fig. 1) shows the block diagram of a sample Rechenfeld (computing field).

‘PROCEDURE’ AD (N, X); ‘INTEGER’ N; ‘REAL’ X; ‘CODE’:

In the Vorlaufprogramm (preliminary program) all the names (Bezeichnungen) of the Prozeduren (procedures), Spezifikationen (specifications), and initial values (Anfangswerte) that are needed by the Digitalrechner program are defined. The Digitalrechner can then invoke these Prozeduren as needed in order to set up the analog computing network.

In the Rücklaufprogramm (return program), the Digitalrechner program generates, for each Prozedur invocation, the corresponding patching instruction in a form that can be transferred to the Analogrechner’s patching system.

Thus there are two phases:

The Analogrechner setting is described in ALGOL using a set of procedure calls.
The ALGOL program is executed on the Digitalrechner, generating a list of patch instructions for the Analogrechner.

‘PROCEDURE’ AD (N, X); ‘INTEGER’ N; ‘REAL’ X; ‘CODE’:

In the variable-name declaration, all variables of the problem are declared. It is here that the correspondence between the mathematical quantities and the Analogrechner elements (Integratoren, Verstärker, Potentiometer) is established.

Codeprogramm (code program): The user enters a problem:

1. Name of the Prozedur, Liste (list) of Typen (types), Spezifikation.
1. Description of the Prozedur, i.e., actual Wirkung (effect) of the Prozedur call.

Thus the standard ALGOL words ‘INTEGER’, ‘REAL’, or ‘BOOLEAN’ determine the Typ of the Funktionsparameter (function parameter). For instance:

‘PROCEDURE’ AD (N, X); ‘INTEGER’ N; ‘REAL’ X;

means that N is an integer and X is a real-valued Analogrechner component number and associated value.

In the Vorlaufverarbeitungsphase (preliminary processing phase), all inputs are gathered. Then, at the beginning of the Rücklauf (return run), the ALGOL program is used:

‘BEGIN’ ‘PROCEDURE’ AD (N, X); ‘INTEGER’ N; ‘REAL’ X; ‘CODE’

In this Vorlaufprogramm, all the names of the procedures and parameters needed in the main body of the program are declared and initialized. The Digitalrechner program can then use these to generate the Analogrechner patching table.

Codeprogramm wir wollen nun das Codeprogramm in einander betrachten, indem die Nummer des Einganges für die Funktion N und der Wert X (the argument for the function) are processed:

One concrete example: Suppose 100 elements of the Analogrechner are to be addressed. It is first established which A/D Converters (ADU-Kanäle) are available, and then a Anfangswert (initial value) is established for each component.

We will take a simple Example where the following is programmed in a suitable format:

‘PROCEDURE’ AD (N, X); ‘REAL’ ‘PROCEDURE’ MAC (N, X); ‘CODE’:

If one wishes to program in this way with ALGOL, so that the Typ of the parameter of the Prozedur call is either ‘REAL’ or ‘PROCEDURE’, then the Digitalrechner can do this with the same amount of Programm cost as any normal Digitalrechner calculation. One also can program:

T := M · AD (D, G + H);

where the following is established:

T := M × AD (D, G + H)

with two Hilfsspeicher (auxiliary registers) one obtains:

T := 5 + 7;

Codeprogramm Example:

We will take one Example now where the Hybrid routine solves the system:

z = a(t) + b(t), T = X + Y

At each of the two lines 1 to 13 is an intermediate multiplizierten (multiplied) value and the Ausgabe (output) is connected to the Eingabe (input) of the Integrators. It follows:

‘PROCEDURE’ AD (N, X); ‘INTEGER’ N; ‘REAL’ X;

Whereby in each Schritt (step) the Prozedur AD receives from the Digitalrechner the number N of the Analogrechner element and the value X to be set there.

For the Ausgabe of the Analogrechner results, a complementary Prozedur is used:

T := AD (N, X); ‘INTEGER’ N; ‘REAL’ X;

The Analogrechner also offers the Möglichkeit (possibility) of converting an Eingangsgröße (input variable) to the Digitalrechner. The next step is the Steuerung (control) of the Analogrechner by the Digitalrechner. In ALGOL, this would take the form:

‘REAL’ ‘PROCEDURE’ DA (N); ‘CODE’:

The Digitalrechner has then from the Analogrechner the following data:

Steuerung	Digitalrechner Prozedur	Analogrechner
Abtastung (sampling)	N	Potentiometer-prüfer
Berechnung	P	Parametersatz
Rechnen (computing)	P	Parametersatz-anschluß

Es ist also möglich, eine solche Steuerlogik in den Analogrechner einzubauen, so daß von außen mit dem Prozeduraufruf POTSET die Wirkung des Aufrufes des Prozedur AD möglich ist.

For example, the Leitung (line) N Wert Y is made, and the Rücklauf (return loop) carries out the following actions through the Prozedur POTSET as shown below:

‘PROCEDURE’ POTSET (N, P); ‘INTEGER’ N; ‘REAL’ P; ‘CODE’:

Darauf (thereupon) it is noted that every invocation of PROCEDURE CONTROL (P) contains the state P of the Analogrechner, which can be one of the following: IC (initial condition), OP (operate), HO (hold), or POTSET (potentiometer setting).

Danach (thereafter), when the Rücklauf (return) of the program is reached, the Digitalrechner outputs the Steuerkommando (control command) to the Analogrechner:

‘PROCEDURE’ CONTROL (A); ‘STRING’ A; ‘CODE’

Die Leitung N (Line N) of the Analogrechner has the Möglichkeit to evaluate problems. After them, the conditions are as follows:

‘PROCEDURE’ CONTROL (A); ‘STRING’ A; ‘CODE’:

This is calculated and finally, after the step with N of the Multiplexer (N is an integer), the following is evaluated:

FOR I := 1 ‘STEP’ 1 ‘UNTIL’ M ‘DO’ ‘BEGIN’ SELECT (I^*, S); FOR E := 1 ‘STEP’ 1 ‘UNTIL’ M ‘DO’ ‘BEGIN’ T(M) := A(I) + G; G(M) := A(I); ‘END’ ‘END’; CONTROL (‘OP’);

Now when the Analogrechner is finished, the Digitalrechner produces:

‘PROCEDURE’ CONTROL (A); ‘STRING’ A; ‘CODE’:

Nach (after) this, the CONTROL Prozedur is called with the argument ‘OP’ (for “Operate”), meaning: the Analogrechner is instructed to switch to its compute mode. The Steuerung (control) runs as follows:

FOR I := 1 ‘STEP’ 1 ‘UNTIL’ 4 ‘HTF’ S ‘UNTIL’ M ‘DO’ ‘BEGIN’ SELECT (I*, S); TIME (S); WRITE (LGHT, (ADM) + A (I)); TYPE (AM) (ADM + A (I)); ‘END’ CONTROL (‘HO’);

Die Leitung S (Line S) bearing the following Rücklaufbedingungen (return conditions) is given: The Digitalrechner proceeds as follows.

‘PROCEDURE’ CONTROL (AL, X); ‘STRING’ AL; ‘INTEGER’ X; ‘CODE’:

After it is revealed, the following Leitung of the Prozeduren (procedures) result:

FOR I := 1 ‘STEP’ 1 ‘UNTIL’ 18 ‘DO’ ‘BEGIN’ SELECT (I^, S); READ (Y (I)); CONTROL (‘HO’); READ (Y (I)); ‘END’:

It is then noted that after each Schritt S of the Multiplexer, the Digitalrechner obtains the Analogrechner Ausgabe (output) in digitized form. The following Prozedur SELECT is used for this:

‘PROCEDURE’ SELECT (V, S); ‘CODE’:

For the Ausgabe of the Rechnungsresultat (computation result):

SELECT (V, S)

Since Leitung 5 bears the Gegenwert (counter value) of the A/D converter which represents at each step the Multiplexer (multiplexer), one can also establish, during the Rücklauf, the following:

‘INTEGER’ ‘PROCEDURE’ INTEGRATE (A); ‘INTEGER’ A; ‘CODE’:

The analog state is then sampled by the Abtasttakt at regular intervals. The Digitalrechner reads these sampled values and uses them for further computation.

Additionally, it is possible to incorporate into the ALGOL program a Schleifentest (loop test), so that the program can determine whether a steady-state or other termination condition has been reached.

Größere Analogrechner allow the Möglichkeit (possibility) of checking the Potentiometern (potentiometers) at certain Laufpositionen. The Potentiometerprüfer (potentiometer checker) can also be driven through the Digitalrechner interface. The Prozedur POTSET behaves as follows: it receives the number N of the Potentiometer and the value P to be set on it, and outputs, after execution, a confirmation. The relevant ALGOL code is:

‘PROCEDURE’ POTSET (N, P); ‘INTEGER’ N; ‘REAL’ P;

Number N denotes the position of the Potentiometer in the multiplexed system, and the Wert P is the relative Parameter (value) to be set there. Wenn (When) CONTROL is called with the argument ‘POTSET’, the Analogrechner sets all Potentiometer values specified in the preceding POTSET calls.

In the initial part, a part of the Multiplexer addresses N to the setting of Pfade (paths) is shown; an example ALGOL program monitors this through the Digitalrechner.

From the point of view of the Hybridrechner, the two important examples are:

a) the connection of the Potentiometer N to the Ausgabegröße (output variable) through the POTSET procedure.

b) the description of all the Verbindungen (connections) in the Analogrechner patch field through the AD and DA procedures.

After the Leitung N is checked, one can also confirm the use of a Multiplex-Wähler (MUX selector) in a straightforward case. An example ALGOL program monitors this as follows:

‘PROCEDURE’ CONTROL (A); ‘REAL’ N; ‘REAL’ AL; ‘CODE’:

Number N describes the number of Schritte (steps) required in the Überprüfung (verification):

PROCEDURE CONTROL (AL, N); ‘REAL’ N; ‘REAL’ AL; CONTROL (‘OP’, S);

In one inner Schleife (loop), it can be seen that an A/D converter is given as one example — for example, solved with 30 iterations N of the Multiplexer per complete resolution, which is approximately at the boundary of the Digitalrechner’s Echtzeit (real-time) capability.

On line 8, the last Leitung N is given with a ‘THEN’ comparison result, and the computation is confirmed by:

T := A(I) + G(S);

one obtains from the Hybridrechner the Koordinaten A[I] (coordinates A[I]) upon which the GP S (gradient point S) is determined. The result is:

G(I) := − (G(I) − A(I) · G(I));

is decreased, since both results at the Koordinaten A[I] are evaluated and the Wert GP S (value GP S) becomes the actual component of the Differentialquotienten (differential quotient). The following conclusion is reached:

$\sum_{i=1}^{N} G(i) \leq 3$ (70)

shows that the Gradient at any given time will be computed unless the Betriebsbedingung (operating condition) reaches:

G(I := Q − T · G (SPS));

The full system then goes further according to:

$f\left(\begin{array}{c}Q - G \ G - A\end{array}\right)= \text{MIN}$

The author previously stated Dipl.-Ing.; the co-author also confirms the Wert as follows:

A(I) := − G(I) · G(I) − A(I)·{G(I)};

This result is obtained in the normal operating mode (NB), and the Digitalrechner reads:

‘BEGIN’ ‘REAL’ ‘Q’, ‘G’, ‘S’, ‘KPS’, ‘SU’; ‘INTEGER’ ‘I’, ‘H’; ‘REAL’ ‘ARRAY’ A(1..N), G(1..G Q(I)); ‘REAL’ ‘PROCEDURE’ INTEGRATE(A); ‘INTEGER’ A; ‘CODE’: H := 0; AD (I, G(I)); CONTROL (‘OP’); TIME (S); READ (A(I)); CONTROL (‘HO’); G(I) := − A(I); AD (I, G(I)); ‘END’

Bild 2 (Fig. 2) shows the block diagram of the numerical solution process.

Since the Leitung 8 bears the Ausgangsgröße (output variable) from the Digitalrechner, the A/D converter is evaluated at each step. The Multiplexer reads the analog values and the Digitalrechner uses them for its minimization algorithm. Afterwards the Digitalrechner directs the Analogrechner through the usual ALGOL procedure mechanism.

The system is therefore completely described in ALGOL. One can see from this description that the approach is both concise and general. This is a significant advantage compared with separate descriptions for the Analog- and Digitalrechner parts.

Example: The ALGOL program for the automatic optimization of a system is given by the following structure:

‘BEGIN’ REAL ‘Q’, ‘G’, ‘S’, ‘KPS’, ‘SU’; INTEGER ‘I’, ‘H’; REAL ARRAY A(1..N), G(Q(1)..G(1)); INTEGRATE (A); INTEGER A; CONTROL (‘IC’); AD (I, A(I)); CONTROL (‘OP’); TIME (S); READ (A(I)); CONTROL (‘HO’); G(I) := −A(I); AD (I, G(I)); ‘END’

Before this Example is presented, the analog-computed system coordinates A[I] are computed, the gradient GP S is established, and the value of the Differentialgleichungs-Operator (differential equation operator) is determined. If the Betriebsbedingung is met, the Digitalrechner adjusts the parameters and the process repeats. The Example shows that the ALGOL program serves simultaneously as:

a specification of the problem,
a control program for the Digitalrechner, and
an implicit patching description for the Analogrechner.

This demonstrates the power of the hybrid ALGOL approach: a single programming language describes the entire hybrid computation, both the analog and digital parts, in a unified and readable manner.

Ref: TELEFUNKEN-ZEITUNG 39 (1966) Heft 1

108

[Page 109]

(continuation of program listing)

2: CONTROL ('SB');
   A 0 [I] := A 0 [I] + EPS;
   POTSET (I, A 0 [I]);
   CONTROL ('SB');
   CONTROL ('C');
   WAIT ('H');
   Q [I] := AD (I);
   CONTROL ('SB');
   DQ [I] := (Q 0 − Q [I]) / EPS;
   'FOR' I := 2 'STEP' 1 'UNTIL' N 'DO'
      'BEGIN'
         A 0 [I − 1] := A 0 [I − 1] − EPS;
         A 0 [I] := A 0 [I] + EPS;
         POTSET (I, A 0 [I]);
         CONTROL ('SB');
         CONTROL ('C');
         WAIT ('H');
         Q [I] := AD (I);
         DQ [I] := (Q 0 − Q [I]) / EPS;
         CONTROL ('SB');
      'END';
   A 0 [N] := A 0 [N] − EPS;
   SU := 0;
   'FOR' I := 1 'STEP' 1 'UNTIL' N 'DO' SU := SU + ABS (DQ [I]);
   'IF' SU 'LESS' S 'THEN' 'GO TO' Min;
1: 'FOR' I := 1 'STEP' 1 'UNTIL' N 'DO'
   'BEGIN'
      A 1 [I] := A 0 [I] − K × DQ [I];
      POTSET (I, A 1 [I])
   'END';
   CONTROL ('SB');
   CONTROL ('C');
   WAIT ('H');
   Q 1 := AD (I);
   'FOR' I := 1 'STEP' 1 'UNTIL' N 'DO' A 0 [I] := A 1 [I];
   'IF' Q 1 'LESS' Q 0 'THEN'
      'BEGIN'
         Q 0 := Q 1;
         'GO TO' 1
      'END'
   'ELSE'
      'BEGIN'
         Q 0 := Q 1;
         'GOTO' 2
      'END';
   Min: PRINT (Q 0);
   'FOR' I := 1 'STEP' 1 'UNTIL' N 'DO' PRINT (A 0 [I]);
   SET (20, 'TRUE');
3: 'IF' 'NOT' SENSE (20) 'THEN' 'GOTO' 2 'ELSE' 'GOTO' 3
'END'

References: [1] W. Giloi: Hybrid Computer Systems. Telefunken-Zeitung 39 (1966) No. 1, pp. 82–100.

The Telefunken Analog-Computer Family

by W. Giloi, W. Holz and R. Schwarz

The extraordinary breadth of Telefunken’s product range for computing technology encompasses Analog-, Digital-, and Hybrid-Computer systems. Telefunken has therefore set itself the task — making full use of its possibilities as a comprehensive electronics concern — of offering the computing specialist a complete, optimally matched family of computers covering the widest range of applications. Two main groups emerge within this family: one devoted to simulation and optimization of technical systems, and a second devoted to data processing. The first group thus encompasses Analog Computers for simulation and optimization purposes (in the classical sense). The second group addresses Digital Computers in the narrower sense, which are not discussed further here. Bridging both groups is the Hybrid Computer, which by combining both partial systems makes a specially powerful tool available to the user.

A special working group within Telefunken has taken on the task of developing solutions for all technical and scientific calculation problems that can be posed, and of systematically advising users. In this way the full benefit of the computing equipment — including the associated programming effort — can be realised in the most economical way possible, while numerous initial errors can be avoided.

The Telefunken range already includes a full-featured family of analog computers. The four models — RA 742, RA 741 TAI, RA 741 and RA 800 HYBRID — cover all relevant precision and operational requirements. A further member of this series, the RA 770, is specifically intended for on-line process control. The table presented on page 111 gives a general overview of the performance characteristics of the individual Analog-Computer types.

For the largest group of computation tasks the analogue computers RA 741, RA 741 TAI and RA 742 are available. While the RA 742 covers the small and medium frequency range, the RA 741 TAI covers the medium to large frequency range. The table characterises the main features and shows the Bedienungseinheit (operator unit), Integrationseinheit (integration unit) and Koeffizientenpotentiometereinheit (coefficient-potentiometer unit) as individual modular assemblies.

[Page 111]

(continued from p. 110)

The freely programmable basic structure and the matched optional units make these analogue computers universally applicable within their respective frequency ranges. The RA 800 HYBRID rounds off the Telefunken analog-computer family at the upper end of the performance scale.

The essential characteristics of the Telefunken Analog Computers are:

High number of computing elements achievable through a modular system
Freely programmable with flexible programming panel
Large bandwidth and high output current (fast slew capability)
Multi-Loop parameter optimisation (automatic function)
Good temperature stabilisation of the reference voltage
Digital or analogue multiplication

Table 1: Characteristics of various precision analog computers of the RA series

Feature	RA 742	RA 741 TAI	RA 741	RA 800 HYBRID
Amplifiers, integrators	15	50	50	158
Summers	—	—	—	35
Coefficient potentiometers	20	80	80	200
Quad multipliers (servo or electronic)	—	up to 10	up to 10	20
Parallel-Multiplier	—	—	—	20
Function generators (servo)	2	up to 3	up to 3	—
electronic function generators	—	—	—	24 (including 4 dividers)
Comparators	1	2	2	35
Track-and-hold amplifier (Parallel-Multiplier)	—	—	—	20
Digital resolver	—	—	—	2
Reference voltage	±10 V	±10 V	±10 V	±100 V
Amplifier bandwidth (−3 dB)	40 kHz	40 kHz / 400 kHz	400 kHz	400 kHz
Amplifier output current	40 mA	40 mA / 120 mA	120 mA	120 mA
Analog-Digital-Converter	—	—	—	1
Digital-Analog-Converter	1	1	1	14
Typ. programming time (Potentiometer)	1 ms	1 ms	1 ms	10 µs
Number of selectable programs	—	—	—	250

All Telefunken Analog Computers are distinguished by an exceptionally compact desktop construction. This compactness represents a characteristic common to the entire Telefunken analog-computer family.

The Precision Analog Computer RA 800 HYBRID

by W. Giloi, G. Haußmann and R. Schwarz

The precision analog computer RA 800 HYBRID was developed at Telefunken both to meet the demands of computationally intensive simulation tasks and to satisfy the requirements of hybrid computation. Telefunken’s decades of experience in the development and construction of analog computers has enabled the creation of a precision instrument with the most extensive computing capability. In doing so, all technical possibilities were fully exploited and a rational, easily extendable structure was established. In addition, all technical and organisational prerequisites were created for systematic and efficient, computer-aided programming: documentation, checklists, test routines, automatic programming sequences, etc.

The precision analog computer RA 800 can be connected to a Digital Computer. It enables both connection to typewriter-class input/output units, and connection to a large Digital Computer (connection to the TR 440 is in preparation).

Characteristics of the RA 800 HYBRID:

Freely programmable flexible programming panel
Power supply ±10 V (reference voltage ±100 V)
Multi-loop parameter optimisation (automatic function)
Software and hardware parameter optimisation

The connection to Digital Computers opens up possibilities for carrying out particularly effective hybrid computations; for instance, iterative problem solutions combining the speed of analog computation with the convergence of digital algorithms.

A special feature of the RA 800 HYBRID is the high-speed digital program memory with 250 selectable programs. This makes the computer particularly well-suited for multi-parametric investigations as well as for on-line real-time coupling. At the same time, the digital program memory forms the basis for the high-speed automatic programming capability.

[page 112: figure only — photograph of the RA 800 HYBRID precision analog computer system]

[Page 113]

(continued from p. 112)

The following computing elements are provided for the RA 800 HYBRID:

Freely programmable Hitachi–Planus–Patchboard
Amplifiers with ±10 V supply and virtually unlimited gain adjustment
Summing amplifiers
Direct integration units
Reference supply ±10 V, ±100 V
Potentiometers settable in four decimal digits with automatic adjustment

A special feature of the RA 800 HYBRID is its high computing capacity combined with extensive digital control capability. The digital memory stores up to 250 programs and provides the following functions: automatic step sequences, automatic parameter optimisation over multiple loops, hybrid computation via digital program control.

The RA 800 HYBRID is supplemented in its computing capability by a Digital-Multiplier on a dedicated card. This high-speed multiplier enables the formation of products at computing speeds of up to 10⁶ multiplications per second — substantially faster than any servo multiplier. Together with the digital program memory, this makes the RA 800 HYBRID an instrument of the highest performance that satisfies virtually all requirements of large-scale simulation and optimisation.

For direct comparison of computing programs the connection to the Telefunken Digital Computers TR 86 und RAT 700 is planned.

The maximum number of computing elements available for the RA 800 HYBRID is obtained by combining several RA 800 cabinets. Interconnection of several RA 800 units is possible through dedicated interface panels.

[Page 114]

(continued from p. 113)

The number of main amplifiers is 158 along with the associated computing and storage elements. The number of Koeffizientenpotentiometers (coefficient potentiometers) is 200.

The table gives the following data for the Telefunken Precision Analog Computers RA 741 and RAT 700 as primary reference:

An additional Einheit (unit) consists of the Digitalrechner (digital computer) elements. A comparison of the RA 740-series with the RA 800 shows that the RA 800 is significantly larger and also more powerful. The elements of the RA 800 allow operation at higher operating frequencies and, in addition, an attachment of an external Digital Computer (for Hybrid computation) is possible.

Table 2: Characteristics of the complete precision analog computer RA 800 HYBRID

Feature	Quantity
Rechenamplifikatoren (computing amplifiers), integrators	158
Summers	35
Integrators (from the 158 amplifiers)	up to 100
Comparators	35
Coefficient potentiometers	200
Quad multipliers (electronic)	20
Parallel multipliers	20
Electronic function generators	up to 20 computing elements usable; additionally 4 dividers
Sine-cosine resolvers (digital)	2
Track-and-hold amplifier (for parallel multiplier)	20
Relay outputs	10 each per parallel-multiplier unit
Analog-Digital Converter	1
Digital-Analog Converters	14
Reference voltage	±100 V
Amplifier bandwidth (−3 dB)	400 kHz
Amplifier output current	120 mA
Potentiometer programming time	10 µs
Number of selectable programs	250
Switches	35

[Page 115]

(continued from p. 114)

Feature	Quantity
Function switches	16
Track-and-hold amplifiers	16
Gate diodes	14
Logic gates	4
Condition sensors	20
Amplifier for digital computation (Digital-Multiplier)	1
Analog-Digital Converter for digital computation	1
For connection to an external digital computer	—

For connection to an external digital computer, additional interface elements are required.

Digital Multiplier (for Digital-Computer): 250 × 14 bit (capable of connection to the TR 744)

A brief overview of the individual Telefunken computing elements is given in the tables. Tables 1 and 2 characterise the most important computing elements of the Telefunken Analog Computers.

The Control System of the RA 800 HYBRID

by W. Giloi, G. Haußmann, J. Katschner, T. Müller and R. Schwarz

The digital control system of the RA 800 HYBRID controls the entire sequencing of the analog computer’s programmed functions in a given time frame. This digital control (DG 7) serves simultaneously as the controller for the analog computer and as a digital processing unit. Following the conclusion of the selected Rechenprogramm (computing program) the analogue computer is again placed in the initial condition, and the DG 7 is then automatically ready for the next program selection.

The digital controller (DG 7) permits operation under either external control (such as by a digital computer) or alternatively under internal autonomous control by manual key operation. In either operating mode all Rechenbefehle (computing commands) and analogue-computer-controlled sequences can be called up in definite time steps. The time step can be varied in ten steps from 100 µs up to 1 ms; in addition, a freely adjustable external clock is available.

The digital controller also allows the setting of all Rechenschalter (computing switches) and the reading back of all Rechenparameter (computing parameters) in digital form, and further permits the automatic programming of the Koeffizientenpotentiometer (coefficient potentiometers). In this way the digital controller forms a fully complete Steuergerät (control unit) for the linked analog computer, to which both the internal control commands and the external digital command inputs are connected.

[page 115: photograph of the digital controller DG 7 (Digitales Bediengerät) for the RA 800 HYBRID]

[Page 116]

[figure only — photograph of the digital controller module panel and of the analog program board (Magnetkern-Digital-Programmspeicher)]

In summary, the digital controller enables the following:

Full control of the analog computer functions
Storage of up to 250 independent Analog Programs (Rechenprogramme)
Digital addressing of all potentiometers and setting of coefficient values
Readout of all computing parameters in digital form
Automatic parameter optimisation (iterative)

1. Anwurf (Initialisation)

The analog controller of the RA 800 HYBRID reads the setpoint value of each Rechnerpotentiometer (computing potentiometer) as a hexadecimal number and stores it. For the initialisation (Anwurf) the digital controller reads out this number from the stored program and converts it to an analog signal, which is applied to the corresponding Potentiometer. The initialisation sets all potentiometers in the analog section to the specified coefficient values. Potentiometers are set purely digitally: one Potentiometerantrieb (potentiometer drive) functions through digital-to-analog conversion and a Vergleichsschaltung (comparison circuit), setting the Schleiferabgriff (wiper position) to the value prescribed by the program. This process can be accomplished with a resolution of one part in ten thousand. A complete setting of all 200 potentiometers requires approximately 5 % of the available time.

The analog initialisation also includes the setting of all Schalter (switches) and of the Rechenprogramm (computing program), which are set via the digital controller and actuated by relays in the analog computer.

The digital controller generates very precise reference signals for the analog computer; these are produced by digitally generated Zeitimpulsfolgen (time-pulse sequences) and have a stability of 5 × 10⁻⁵ per degree Celsius.

[Page 117]

After the generation of the ground signal GT 1, connection to the Rechnerbaustein (computing module) is briefly interrupted (zero-setting), and then the Drehzahlwächter (speed monitor) is connected. The connection from the Anwurf-Schaltung (initialisation circuit) to the Programmspeicher (program memory) is then re-established via the coupling diodes.

The analog controller provides the following:

Addressing function through two decimal digits and one frequency/value
D/A conversion with a resolution better than 1 : 10,000
Comparison signal: 100 µs; 100 mA up to 1 V attainable on the Potentiometerantrieb

The Programmspeicher (program memory) saves up to 250 Rechenprogramme (computing programs) using a Magnetkernspeicher (magnetic-core memory). Each of the 250 programs can be selected by a two-decimal-digit address. During read-out of the program the computing potentiometer are set to their programmed values in sequence.

[figure — block diagram showing the timing/control interface between the digital controller (DG 7) and the analog computer]

The diagram, Bild 3, shows the Timing and the Operation of the Interface between the analog computer and the digital controller. The Analogrechner (analog computer) oscillates between the operating states “Run” (Compute) and “Halt” (Initial Condition). The digital controller synchronises with this by generating its own clock and receiving the status lines from the analog side.

The analog controller’s “Programme” block supervises a sequence of steps:

Through the Tastenfeld (keyboard), a selected “Program No.” is specified to the Programmspeicher.
The “Start” command is issued; the digital controller begins reading out the Magnetkernspeicher in sequence.
For each potentiometer entry the corresponding coefficient address and value are passed to the D/A converter.
The analog computer’s potentiometer drive receives the analog signal and positions the wiper accordingly.
After all potentiometers have been set the “Ready” signal is issued.
The analog computer is then released to the “Compute” mode.

This sequence makes it possible to change the complete Rechenprogramm between successive compute runs in the very short time of approximately 10 ms, enabling rapid multi-program surveys and iterated parameter studies.

[Page 118]

Sometimes even or complementary integrators are used. If one Zielgröße (target variable) is to be Abgebrochen (truncated) during integration the following boundary conditions apply: an initial value defined in the Grundzustand is set, as a function of time t₁, t₂ or on further “Halt” pulses. These initial values define the Zeitschritte (time steps) and the Anfangsbedingungen (initial conditions).

Let multiple boundary conditions be specified, then the control program begins at t = t₁ and the integrators run in the specified sequence through Zustände (states) from Zustand 1 → Zustand 2 → … → Zustand n. This is expressed mathematically:

t₁ ≤ t ≤ t₂, Q₁ = GT₁, Q₂ = GT₂, … that is, at each Zustand the corresponding Anfangsbedingungen (initial conditions) are activated.

The procedure ensures that the step-wise progression does not depart from the prescribed problem trajectory. At Zustand N the solution is “switched off” (Abbruch), and in the “Halt” state the Digital Computer or operator can read back the current state of all Analogvariablen (analog variables) before the next run cycle commences.

The digital controller can also verify whether a certain condition has been reached (a Grenzwert or Komparator-Ausgabe) and branch accordingly in the program sequence. This logical branching capability brings the control system close to a fully programmable Ablaufsteuerung (sequence controller).

2. Steuerung von Analogprogrammen (Control of Analog Programs)

The operator sets the desired program by means of the Tastenfeld (keyboard): for each Potentiometer the hexadecimal address and the coefficient value (also hexadecimal, 4 digits) are entered. The system uses a fixed-point representation with one sign digit, two integer digits, and one fractional digit. A complete program can therefore describe up to 250 potentiometers in a single address block.

From the keyboard, an entry of “Direct” (Direkt) enables real-time manual operation of a single Potentiometer for adjustment purposes; an entry of “Store” (Speichern) saves the current configuration into the designated program location in the Magnetkernspeicher.

[Page 119]

With the “Drucktaste” (pushbutton) a Einrastblock is triggered. At the Erstellung of the Servopotentiometer-Tabellen there is a Statusanzeige which shows the currently set potentiometer address (100 µs up to 1 ms). Each print-out of the coefficient tables includes: the program number, the potentiometer address, the adjusted coefficient value.

3.1 Linearprogramm — Zeitschrittrechner (Linear Program — Time-Step Computer)

The Analog Computer can additionally be used as a time-stepping analog machine. The procedure is as follows:

The analog controller (DG 7) keeps track of the currently active “Zustand” (state or phase).
A sequence of Zustände (states) is defined, each corresponding to a different set of initial conditions and a prescribed time interval.
At the end of each time interval the controller proceeds to the next Zustand and resets the integrators to the new initial conditions.

This makes the machine function as a Zeitschrittrechner (time-step computer): the Grundzustand (ground state) is state 0, and on each step the state is incremented. The total number of available states is determined by the memory capacity of the controller.

3.2 Automatischer Zeitschrittrechner (Automatic Time-Step Computer)

The integrators can also be operated with automatic time-step control. In this mode the digital controller monitors the rate of change of the analog variables and adjusts the time step accordingly to prevent error accumulation.

The digital controller currently supports two Grundschaltungen (basic circuits):

Through “Drucktaste” (pushbutton): a Einrastblock is created and the digital program steps through all Zeitschritte automatically.
After each time step the controller re-initialises the analog computer with the new values from the Programmspeicher, eliminating the need for repeated manual intervention.

4. Ausgaben des Digitalrechners (Outputs of the Digital Computer)

From the digital controller it is possible to output results onto various Peripheriegeräte (peripheral devices). Currently provided are:

Printer (Drucker): the final result and all intermediate values can be printed in decimal form.

The digital output mechanism is closely tied to the Programmspeicher: at the conclusion of a computation the controller reads back the current value of every analog variable from the A/D converter (where fitted) and stores the result or issues it directly.

[page 119: photograph of the rack-mounted digital computation unit with plug-in boards — Digitalbaustein mit eingesteckten Schaltungsplatten — caption reads: “Bild 2: Digitalbaustein mit eingesteckten Schaltungsplatten. The digital computation unit has dimensions of 100 ms, 100 Hz to 1 kHz, and can be connected to a 1 kΩ load; it operates over a 40 mW dynamic range and is programmable in the RA 800.”]

[Page 120]

The Ansteuerung of the Steuer-Schalter (control switches) of the integrators [2] and with the Ansteuerung of the Zeitgebern (timers) through the Digitalrechner allows the full integration time to be controlled digitally, so that at the end of each Zustand the Analogrechner can be started and stopped in a definite temporal Raster (time grid).

In digital-analogy the Digitalrechner starts with the specific Lösungsschritte (solution steps). There the Abbruch of an Ablauf is made possible: at each Zeitschrittende (end of time step) the “Schlußwert” and “Anfangswert” and others are stored.

3 Hierarchical Rechner-Struktur (Hierarchical Computer Structure)

The digital controller controls all previously described computing functions; nevertheless it is at the same time programmable itself. The “Programme” function initiates the entire sequence of operations that leads to the conclusion of one or more Rechenläufe (computation runs). In this context “Pause” and “Resume” are also commands that the operator can issue; these pause and resume the sequencing between states.

By means of the Programmspeicher it is also possible to organise multi-dimensional sweeps over parameter space. This makes it possible to generate response surfaces in a fully automated manner, without the operator needing to intervene between individual runs.

4. Anwendung des Digitalrechners auf optimierte Programme (Application of the Digital Computer to Optimised Programs)

The digital controller executes the computation cycles in the following manner. While the digital program is running, the analog computer carries out its computation runs. It is possible to interrupt the sequence at any point.

For the running of multiple complementary programs two further Bits [2] are used. The Programmspeicher ensures that the right Anfangsbedingungen are applied in each run.

Examples of the use of digitally controlled hybrid programs are given in earlier papers [3, 4, 5]. The Digitalrechner forms the bridge between the pure Analogrechner and the full Hybridrechner: it permits systematic exploitation of the analog computer’s speed while providing the programmability and convergence of digital sequential control.

Servo-Einstellung der Koeffizientenpotentiometer (Servo Setting of the Coefficient Potentiometers)

by W. Giloi and G. Behner

With the Servopotentiometer unit (Bild 1) coefficients can be set automatically and quickly, down to the last decimal place, in an autonomous manner. The potentiometers are set digitally, and the precision value is displayed in a digital register. When a potentiometer has been set the corresponding value is lit in the digital display. The RA 800 HYBRID stores up to 200 potentiometer values in its Programmspeicher; these are automatically reproduced without manual intervention. A Direkt-Einstellung (direct setting) is also possible, i.e. the desired value can be entered directly from the keyboard.

[page 121: photograph of the Servopotentiometer-Steuereinheit (servo-potentiometer control unit)] [figure — diagram of the digital-to-analog potentiometer drive circuit, Bild 2, Bild 3]

The control circuitry consists of: a Schieberegister (shift register) for the address; a Digital-to-Analog converter with 10 µs setting time; a high-speed Vergleichsschaltung (comparator circuit); a Potentiometerantrieb (potentiometer drive motor) and Feedback Encoder. The complete setting of one potentiometer requires approximately 10 µs, so all 200 potentiometers can be set in approximately 2 ms (inclusive of settling).

The individual steps of the setting procedure are:

The Digitalspeicher issues the address and value over the Adress-Bus.
The D/A-converter converts the digital coefficient value to a reference voltage.
A high-precision comparator compares the converter output with the actual wiper position (read via a second DAC in the feedback path).
If a discrepancy exists, the Antriebsmotor (drive motor) is energised until the difference is zero.
A “Ready” signal is generated; the controller advances to the next address.

The achievable coefficient accuracy is ±0.01 % of full scale (one digit in the 4th decimal position).

[Page 122]

Once it is in operation, the resolution becomes better than 1:5,000 in a table of Motor und Potentiometer. In this table the Motoren are set digitally, and the resolution after each positioning is verified.

For the Koeffizientenpotentiometer setting program the range 1 : 10 (10-fold) is available, and this range is adjustable in steps. The Widerstandsänderung (resistance change) is approximately 13 % when the Koeffizientenpotentiometereinheit is used in its normal configuration.

For the Koeffizientenpotentiometer-Eingabe (coefficient potentiometer input) a precision of 10⁻⁵ is achieved. This Fehler (error) is and remains in a Toleranzbereich (tolerance range) of ±1 : 3,000 and can be set in automatic mode.

Zustandstabelle mit nichtlinearen Elementen (Truth-Table Computation with Nonlinear Elements)

by W. Giloi and A. Greger

The simulation of complex problems on the Analog Computer very often requires a large number of pre-generated functions. The Telefunken RA 800 HYBRID Analogrechner with its Elektronischer Funktionsgeber FG 801 and the Parallel-Multiplier-Einheit PM 801 in its equipment range offers an especially versatile set of tools for this purpose.

Elektronischer Funktionsgeber FG 801 (Telefunken Designation: FG 801)

The Funktionsgeber (function generator) is a self-contained unit that produces an arbitrary piece-wise linear function of one variable. A typical application is the shaping of the characteristic curve of a nonlinear element (e.g., a diode, transistor, or mechanical stop). The structure is based on a breakpoint circuit: a sequence of summing amplifiers and diodes is configured so that the slope of the output-versus-input characteristic changes at each breakpoint.

[page 122: photograph of the Telefunken FG 801 Elektronischer Funktionsgeber (electronic function generator)]

[Page 123]

1.1 Lineare Kurve (Linear Segment)

With the aid of the Diode-Resistor network it is possible to approximate an arbitrary continuous function by a piecewise linear curve. The number of breakpoints is 12 per Funktionsgeber. At each breakpoint the slope and the offset can be adjusted independently.

1.2 Vorzeichenwechsel — Variable V.E. (Sign Reversal — Sign-Change Variable)

In some Funktionsgeber applications the function to be generated changes sign at a certain input value. The Vorzeichenwechsel-Variable (sign-change variable V.E.) is therefore provided so that the function output remains valid across the full input range. Each of the available Funktionsgeber covers an input range from −V.E. to +V.E. where V.E. is a settable reference value.

1.3 Funktionsspeicherung (Function Memory)

In the RA 800 HYBRID the Funktionen of the analog Funktionsgeber can be stored. This means that the coefficient values (i.e. the slopes and offsets at each breakpoint) are stored in the digital program memory. On retrieval of a program these values are reloaded automatically, which permits rapid switching between different functions without manual re-patching.

[figure — circuit diagram of the FG 801 breakpoint nonlinearity generator, showing connection to the RA 800 HYBRID Summierverstärker (summing amplifier)]

The individual breakpoints Y1 and Y2 of the Funktionsgeber are applied to the RA 800 HYBRID; the Ausgangsgröße (output value) can be positive or negative depending on whether the input is in the upper or lower half-plane. For the RA 800 HYBRID the Analogrechner — “Advance” 37, 28–77 are available as Eingangsgrößen.

3 Funktionseinhaltung (Functional Conformance)

At the Rechnerpotentiometer, potentiometers Y1 and Y2 are available. In the RA 800 HYBRID the functions correspond to the inputs: input V1 is connected with input V2, and the Output corresponds to the Rechnerpotentiometer. If the output does not agree with the stored function, the Differenzgröße (error signal) drives the correction loop until conformance is reached.

[Page 124]

This topic is not further treated here. At its broadest, the RA 800 HYBRID has its own network (Netzwerk). The Galvanometer and the Integrators are also used; they deliver the most accurate Einstellungen (settings). Since this table is closely related to the servo-drive, the position of the Servo-Einheit and the Einstellelemente (setting elements) is important.

2.1 Umwandlung kartesischer Koordinaten – Polarkoorinaten (Conversion from Cartesian to Polar Coordinates)

For the conversion of Cartesian coordinates into polar coordinates the inputs are x₁, x₂ and z₁, z₂. For the RA 800 HYBRID these come from the address 37, 28–77. The Eingangsgröße (input quantity) at input V1 and the Eingangsgröße at input V2 can independently undergo conversion. The digital inputs of coordinates V1 and V2 at the RA 800 HYBRID are available through Advance 37, 28–77.

[figure — diagram of Bild 3: schematic of the “Non-linear Rechner” (nonlinear computer) element] [figure — photograph of the Telefunken Nonlinear Computing Elements module rack]

2.2 Umwandlung Polarkoordinaten – Kartesische Koordinaten (Conversion from Polar to Cartesian Coordinates)

For the conversion of Polar Coordinates into Cartesian Coordinates the inputs x₁ = r₁, x₂ = φ₁ and x₃ = φ₂ are connected and the outputs y₁, y₂ are obtained. This connection is shown in the circuit diagram Bild 3.

[figure — schematic diagram of the polar-to-Cartesian conversion circuit]

[Page 125]

3 Phase-Multiplier Network

For the Koordinatentransformation (coordinate transformation) additional Multiplier-Networks can be used. With a Multiplizierer-Netzwerk (multiplier network) it is possible to simultaneously compute several Übertragungsfunktionen (transfer functions).

At the RA 800 HYBRID the following elements are available for the function-table computation:

VAR I.A: positive signal for trigger/sampling programming
VAR I.B: negative signals for trigger/sampling programming
VAR I.C: positive signal for trigger/sampling programming and logical AND
VAR I.D: negative signal for trigger/sampling programming and logical OR

For the following Digitalrechner digital signals there are corresponding Ablauffolgen (program sequences):

VAR I.A: positive signal for sequential programming
VAR I.B: negative signal for sequential programming
VAR I.C: positive signal for sequential programming AND
VAR I.D: negative signal for sequential programming OR

3.1 Phase-Multiplier

For the Koordinatentransformation several Multiplier-Networks are required. At the RA 800 HYBRID the Rechnerpotentiometer are configured in such a way that the “Jump” function (Sprung) is followed without an additional Differential. The Eingangsgröße — x₁, x₂, x₃ — follow in sequence, and the output always represents the instantaneous value of the function.

3.2 Zeitschrittrechner with nonlinear elements

The Digitalrechner Ablauf (digital computer sequence) also has at its disposal a facility for performing multi-step time computation with nonlinear elements. This makes it possible to simulate at the RA 800 HYBRID physical processes in which the system dynamics change qualitatively at certain threshold conditions. The time-step computer thus provides for the RA 800 HYBRID the following function types:

3.1 Phase-Multiplier function
3.2 Zeitschrittfunktion (time-step function)
3.3 Elektronischer Rechner function

At each of these levels there is a further Programmspeicher which acts as an “Analog” of the normal (linear) Programmspeicher.

For the connection to the Digital Computer two main states are used. All Rechenaufgaben which need only be carried out by means of an Ablauffolge (program sequence) are thus suitable for connection to the RA 800 HYBRID via the Digitalrechner.

[Page 126]

The various individual Digitalbausteine (digital modules) can be linked together via many interconnects to constitute an arbitrarily complex digital computing network. This is not the objective of the current description however; the important point is that the analogue functions can be carried out without additional (Einzel-) Function approximation and thereby with less error than would otherwise be possible.

1.1 RA 800 HYBRID

At the RA 800 HYBRID the following peripheral devices are employed for the drive circuits and the Galvanometer; the output function is set automatically. Between the Analogrechner and the Digitalrechner the coupling involves:

Positive signal; input R, S, T, U
Negative signal; input R, S, T, U

1.2 RA 742 HYBRID

For the RA 742 HYBRID the same block-diagram connections apply as for the RA 800 HYBRID (Bild 5). However the number of Rechnerpotentiometer is smaller. The input signal connections correspond to the Advances 37, 28–77 for the RA 742.

2 Einsatzmöglichkeiten (Fields of Application)

For the use of the Digitalrechner on the RA 742 HYBRID the following statements apply: since the RA 742 HYBRID uses the same Digitalrechner DG 7 as the RA 800, the programming and operation are essentially identical; only the number of available Rechnerpotentiometer and Koeffizientenpotentiometer is smaller.

[figure — photographs: Bild 7 (left) showing Elektronisch Netzwerks-Varianz RA 800 HYBRID; Bild 8 (right) showing the Telefunken RA 742 HYBRID front panel]

3.3 RA 800 HYBRID and RA 742

These two machines can be operated together as a twin-machine hybrid complex. The RA 742 HYBRID takes the Übergangsgrößen (transition quantities) from the RA 800 HYBRID, carries out its own computation steps, and returns the Rückkopplungsgrößen (feedback quantities) to the RA 800. This co-operative configuration is especially well-suited for large-scale optimisation tasks with many parameters.

References:

[1] K. Elbs, R. Greger, W. Holz und R. Schwarz: Precise Analog Computer Systems with Electronic Multiplication. Telefunken-Zeitung 38 (1965) No. 2, pp. 23–36.
[2] A. Giloi: Computer-aided programming of analog computers. Telefunken-Zeitung 39 (1966) No. 1, pp. 29–48.
[3] K. Elbs, G. Giloi: Hybrid Computer Systems. Telefunken-Zeitung 39 (1966) No. 1, pp. 82–100.
[4] A. Giloi: Hybrid Computer Systems. Telefunken-Zeitung 39 (1966) No. 1.

The Desk-Top Analog Computers RA 741 and RAT 700

by V. Schwarz

In the course of developing the desk-top computers, the requirements of the increasingly sophisticated user had to be taken into account. Through the Analog Computer Division, these requirements could be met with very favorable solutions from an economic standpoint. Thus, in 1965, two new analog computers were introduced: the RA 741 with 18 computing elements (integrators, summers, inverters, two constant generators, and one time-base unit), two variable (freely configurable) potentiometers, two fixed (non-configurable) summing junctions, and one multiplier; and the Desk-Top Analog Computer RAT 700.

The quality of these desk-top computers, as well as the additional computing elements available for all desk-top computers, are described in the following.

The Desk-Top Analog Computer RAT 700, with its 25 to 30 computing elements (integrators, summers, inverters, coefficient generators, and one limiter), two variable potentiometers, and one multiplier (a total of 20 to 30 patching positions on the computing amplifiers), was designed to meet the requirements of a medium-range system. In 18 basic building blocks (approximately 500 transistors), controlled, amplified, and time-base functions are combined to permit the computation of medium-complexity problems.

In both desk-top computers, analog computing is extended by several digital elements. The RA 741 is equipped with a comparator, four address flip-flops, one AND gate, and one Schmitt trigger. The RAT 700 is equipped with a comparator, two variable potentiometers, one programmable timer, and one display.

Hybrid Precision Computer RA 770

by V. Schwarz

The hybrid precision computing concept of the Telefunken Analog Computer Division was developed at the same time as the RA 741 and RAT 700. This is a machine designed for the medium-to-large problem complexity range. The main development objectives were high accuracy and wide applicability, as well as hybrid computing capability (i.e., close cooperation between the analog and digital systems).

Among the Telefunken desk-top computers, the RA 770 is positioned between the 20 to 30 computing elements of the RAT 700 and the approximately 80 to 100 elements of the RA 480 HYBRID. The number of computing elements was chosen so that relatively complex problems can be handled and the computer remains manageable.

The unit comprises 20 to 30 high-precision computing amplifiers each equipped with coefficient generators, and a total of approximately 40 computing elements.

For interconnection of the computing elements, a patch-panel system is used. The digital elements available on the RA 770 include 28 flip-flops, a series of logic gates (AND, OR, NOT), and several function generators. These digital elements can be used for program control, for comparator logic, and for digital function generation.

Digital function generation is also available via lookup tables. The hybrid computing capability is extended by the fact that the RA 770 is equipped as standard with a digital output interface, and that it can be connected via that interface to an external digital computer (e.g., the Telefunken TR 86) to form a hybrid system. Under the control of the digital computer, the coefficients on the analog computer can be set digitally, and the status of the computing elements can be interrogated.

The precision of the RA 770 is comparable to that of the RA 480 HYBRID. The basic computing element error (total error of the computing amplifier, exclusive of coefficient setting) is less than 0.01%. The coefficient generators allow setting with an accuracy of 0.02%.

The RA 770 has already been equipped and used as a system together with the TR 86 digital computer.

Further Literature on Analog Computer Technology

from Telefunken AG

A. Karras: Overview of the technical performance of analog computers. Telefunken-Zeitung 37 (1964), 5–24.

B. Schneider: The electronic analog computer in industrial applications. Telefunken-Zeitung 41 (1965), 182–195.

M. Gödde and G. Meyr-Brühl: Possibilities and limitations of hybrid computing. Telefunken-Zeitung 41 (1965), S.168–179.

A. Wendt: The Telefunken analog computer RA 480 HYBRID. Telefunken-Zeitung 41 (1965), 141–167.

G. Pauschmann: Analog computers in industrial data processing. Telefunken-Zeitung 41 (1965), 196–201.

W. Graf: Use of analog computers for the solution of differential equations. Telefunken-Zeitung 41 (1965), 202–221.

[Page 130: Photograph (Hybrid Precision Computer RA 770) and literature references page footer]

Further Literature on Analog Computers from the House of TELEFUNKEN AG

(as of 1 September 1965)

A. Karras: Overview of the technical performance of analog computers. Telefunken-Zeitung 37 (1964) 1, 5–24.

B. Schneider: The electronic analog computer in industrial applications. Telefunken-Zeitung 41 (1965) 3, 182–195.

G. Gödde and G. Meyr-Brühl: Possibilities and limitations of hybrid computing. Telefunken-Zeitung 41 (1965) 3, 168–179.

A. Wendt: The Telefunken analog computer RA 480 HYBRID. Telefunken-Zeitung 41 (1965) 3, 141–167.

G. Pauschmann: Analog computers in industrial data processing. Telefunken-Zeitung 41 (1965) 3, 196–201.

W. Graf: Use of analog computers for solving differential equations. Telefunken-Zeitung 41 (1965) 3, 202–221.

H. Hartl: The electronic analog computer — characteristics, application possibilities, and operating instructions. Regelungstechnik 5 (1957) 5, 8.

W. Hild: The application of analog electronic computers. Regelungstechnik 6 (1958), 161–167.

V. Schwarz: Analog computers. AEG-Mitteilungen 51 (1961) 7/8, 385–388.

O. Kayser: The significance of analog computers and their future. Automatik 6 (1961) 6, 206–210.

V. Schwarz: The Telefunken analog computer RA 470 and RA 471. Telefunken-Zeitung 35 (1962) 3, 184–196.

H. Krimm: The Desk-Top Analog Computer RA 741. Telefunken-Zeitung 38 (1965) 1, 38–41.

M. Gödde and G. Meyr-Brühl: The analog portion of the Telefunken Analog Computer RA 480 HYBRID. Telefunken-Zeitung 40 (1967), 55–70.

K. Frick: Accuracy considerations for iterative problem solving on analog computers. Telefunken-Zeitung 40 (1967), 85–90.

G. Pauschmann and M. Gödde: Scaling of differential equations for use on analog computers. Telefunken-Zeitung 40 (1967), 71–84.

[Page 131: Literature reference page (continued), footer]

[Page 132 — Abstracts/Abridgements page]

Abstracts

The Development Status and Trends in Analog and Hybrid Computer Design

by G. Meyr-Brühl, A. Friz, W. Gilles and G. Pauschmann p. 1

The present spectrum of electronic computing equipment (Fig. 1) contains primarily two main categories: analog computers and digital computers. The close cooperation between analog and digital computers (hybrid computing) is examined in detail. The paper describes hardware trends in the development of analog computers (Fig. 2, Fig. 3), the application domains best suited to each approach, and the economic factors governing the choice. It is shown that, particularly for problems with many repeated runs at high iteration rates, the analog or hybrid computer can far surpass the digital computer in speed. The accuracy of an analog computer (which is on the order of 0.01% for the individual computing element) compares favorably with the requirements of many engineering problems, and in certain domains (e.g., real-time simulation) the analog computer is indispensable.

A Wideband Operational Amplifier incorporating Silicon Transistors

by G. Meyr-Brühl p. 19

The properties of the operational amplifier determine and set the static and dynamic accuracy of the basic computing elements (Fig. 1). The frequency response of the open-loop gain is a dominant factor. The frequency response of the input voltage V_E of an integrating amplifier (Fig. 2) is reduced compared to the auxiliary amplifier by the factor of 1 + A (where A is the open-loop gain); the frequency response of the offset voltage (= drift voltage) V_D is reduced by the factor A. The residuals at the input terminal of the amplifier of V_E/1+A and V_D/A, which may be viewed as a fictitious voltage source in series with the inverting input terminal, must be as small as possible for high accuracy.

The theory and extensive measurements indicate that the transistor amplifier in its own right as a differential amplifier for offset voltages, which in principle have a 1/f characteristic, can achieve only moderate results. The offset voltage of the transistor amplifier depends, because of this 1/f characteristic, very strongly on the selection and pairing of the transistors. For the amplifier described here (Fig. 3), a modulation method is used, which shifts the low-frequency components to a frequency range where neither 1/f noise nor thermal drift play a role. This permits very low residual offset voltage and very high open-loop gain at low frequencies (which is decisive for the accuracy of static computing operations).

The amplitude and phase response of the total amplifier (modulated amplifier) is shown in Fig. 4. The transient response (Fig. 5) and the switching behavior of the amplifier under square-wave drive are also shown.

Electronic Switches for Integrator Control

by R. Friz, J. Glaser, B. Heyler and T. Woß p. 31

In modern analogue computers, passive electronic switches must be capable of very rapidly switching integrators (and other computing elements) between the COMPUTE and HOLD modes, while also being precisely switchable to initial conditions. The influence of switch errors on the integrating computations, primarily on the static error and the dynamic behavior in HOLD mode, is analyzed. The use of solid-state switches (Fig. 1) instead of relays greatly reduces the switching errors. Diode circuits have residual currents which limit their achievable accuracy; the use of transistors (especially field-effect transistors, which exhibit an extremely high OFF-state impedance) as switches leads to far better results. The switching errors for the switches described here for the RA 480 HYBRID are: for switching off (COMPUTE → HOLD), the residual current is −40 nA per switch at the amplifier input (corresponding to 40 µV at the amplifier output, or 0.004% of full scale); for switching to initial condition, the error is ±0.01%.

On Estimating Errors in Diode Function Generators

by R. Glaser, A. Friz and G. Grässer p. 43

This paper deals with a function generation method based on break-point approximation of the desired curve by means of a diode function generator. In section 1, the relationship between the error of the function generator and the data of the break-point approximation (slope increments and number of segments) is derived. In section 2, an example is worked out for a specific function. The accuracy requirements are set out for the functional elements (Fig. 2), i.e., for load-current generators. In section 3, the measurement results for the RA 480 HYBRID function generator are presented (Fig. 3 and Fig. 4). The measurement agrees well with the theory. The functions 1/x, sin x, and e^x were measured as examples. The function generator of the RA 480 HYBRID uses 16 adjustable break points; its accuracy (for the examples cited) lies between 0.01% and 0.03%.

Function Generation and Multiplication using Semiconductor Diodes

by R. Friz and G. Grässer p. 53

The one unit comprising switches can be constructed of field-effect diodes whose characteristics are especially well-suited to analog computer applications. A variety of function generator circuits based on diode networks is described (Fig. 1 through Fig. 4). Nonlinear elements with two inputs are multipliers; the characteristics required of the diodes used in quarter-square multipliers are derived (Fig. 5). The nonlinearities can be generated by means of a diode-based squaring network used in the quarter-square multiplier technique. Data for the achieved accuracy of the multipliers described here are given.

[Page 134 — Abstracts continued]

As a Role Controller are Transformed to AC Analog Computers

by R. Friz, J. Glaser and G. Grässer p. 66

In a role as a controller are transformed to AC analog computers. The converter circuit is constructed as a small-signal transformer in the feedback loop of an operational amplifier (Fig. 1). In section 1, a short overview is given of the current transformation of variables, as well as a description of the role of the converter in the computing element. In section 2, both the static and dynamic properties of the converter are discussed. In section 3, some example circuits are shown in which the converter is used (Fig. 3 and Fig. 4). The accuracy of the converter is analyzed. The converter is used in the RA 480 HYBRID.

On the Design and Application of the Hybrid Analogue Computer

by W. Gilles, M. Gödde and R. Grässer p. 78

A hybrid computing system combines several separate components: a digital computer, several analog computers, and a coupling element. The requirements on each of the individual components are derived from the application demands. The new programming arrangement in the hybrid system is discussed (Fig. 1 through Fig. 3): the digital computer takes over the repetition programming and also provides the stimulus for the individual computation runs. The coupling element (interface) undertakes the transfer of data to and from the analog computer. Measurement results for the coupling element of the RA 480 HYBRID are given, and some remarks concerning the programming of typical hybrid computation problems are presented.

Servo Setting of the Coefficient Potentiometers

by W. Gilles, G. Pauschmann, J. Krautkraher, B. Heyler and V. Schwarz p. 101

Using the servo potentiometer panel (Fig. 1), the computing coefficients may be rapidly and accurately set in the RA 480 HYBRID. The servo potentiometer panel is integrated directly in the framework of the analog computer. In section 1, the requirements on the accuracy and speed of the servo drive are derived from the analog computing application. A servo loop for coefficient setting including the monitoring of the final position is shown in Fig. 2. In section 2, the mechanical and electrical realization of the servo drive (Fig. 3) is described. In section 3, the programming of the coefficient-setting procedure — which is initiated by the digital computer — is described. The procedure for setting the servo potentiometers via a digital computer program requires approximately 1.4 s per potentiometer.

Additional Elements containing Non-Linear Elements

by W. Gilles and A. Grange p. 118

The processing of complex problems on an analog computer requires a sufficiently large number of so-called non-linear elements: comparators, function generators, coordinate converters, whose performance varies with the problem. An overview of the additional elements for the analog computer is given (Table 1). The design of a coordinate converter (function of two variables) is described in detail (Fig. 1 through Fig. 3). In section 2, the temperature compensation is discussed (Fig. 4). In section 3, a four-quadrant multiplier (Fig. 5) is described, which can be used for both multiplication and function generation.

Control of the RA 480 HYBRID

by W. Gilles, G. Pauschmann, J. Krautkraher, B. Heyler and V. Schwarz p. 121

The computing process in the RA 480 HYBRID is controlled by the central control panel operating in conjunction with other control components. In section 1, an overview is given of the problem of mode control and mode sequencing in an analog-computer-based computing process. In section 2, the functions of the individual control modes — RESET, OPERATE, HOLD, POTSET — are described. In section 3, the digital control logic is discussed which implements the requested modes. In section 4, the iterative mode of the RA 480 HYBRID is described, in which a problem is run repeatedly at rates between 100 Hz and 1 kHz. Finally, in section 5, the digital program for the controlled mode sequencing is discussed: the digital computer reads the status registers and issues the corresponding control signals.

The Telefunken Analogue Computer Family

by W. Gilles, M. Gödde and V. Schwarz p. 142

A Telefunken analogue computer family is designed to serve the broadest variety of users and areas of application, ranging from small and medium-sized commercial and industrial businesses to large research laboratories and industry. The family comprises machines ranging from desk-top units to large floor-standing systems. Each member of the family has a complete collection of computing elements, many of which are common across the family. Accurate simulation of differential equations with the highest possible accuracy is ensured.

The machines of the Telefunken analogue computer family include, in ascending order of installed capability, the following:

Desk-Top Analog Computer RA 741: 18 computing elements
Desk-Top Analog Computer RAT 700: 25–30 computing elements
Hybrid Precision Computer RA 770: 40 computing elements
Mid-Range Analog Computer RA 480 HYBRID: 80–100 computing elements

The Precision Analogue Computer RA 480 HYBRID

by W. Gilles, G. Pauschmann, J. Krautkraher, B. Heyler and V. Schwarz p. 143

The characteristics and capabilities of the Telefunken Precision Analogue Computer RA 480 Hybrid are described, with particular attention being paid to the following properties:

The precision computing performance of the RA 480 has been retained in the RA 480 Hybrid (attained with plug-in boards selectable for accuracy), supplemented by digital elements. The digital elements provided consist of 700 MHz logic gates and 16 Kbyte random access memory, which together provide sufficient computing capability for control, monitoring, and parameter variation. The figure shows a front view of the RA 480 Hybrid. In the table, the hardware components of a full RA 480 Hybrid system are listed.

[Page 137: Abstracts page — Control of the RA 480 HYBRID and additional summary entries]

On Programming the Digital Computer in ALGOL

by R. Haertl p. 159

In a hybrid computing system, digital and analogue computations take place simultaneously, so the solution of a problem depends on the part faced by the programmer of the digital computer. The sequence flow is a coupling of data flowing through the coupling element. For the programmer, the coupling element appears as a set of addressable registers. The data can be deposited in the registers and retrieved from them. The digital part of a hybrid system consists of subroutines (ALGOL) for control of the analog computer (Table 1), which must incorporate the information exchange via the coupling element. The results of the analog computation are returned to the digital computer through the coupling element in digital form. The procedure for program flow in the hybrid computing system using ALGOL subroutines is described (Fig. 1). In addition, useful programming methods for particular iterative computation procedures are presented.

The Telefunken Analogue Computer Family

by W. Gilles, M. Gödde and V. Schwarz p. 142

A Telefunken analogue computer family is designed to serve the broadest variety of users and areas of application from small and medium commercial enterprises to large research facilities and industry. The family encompasses machines from desk-top units to large floor-standing systems, with a complete set of computing elements, many shared across the family. The machines listed in ascending computing power are:

Desk-Top Analog Computer RA 741
Desk-Top Analog Computer RAT 700
Hybrid Precision Computer RA 770
Mid-Range Analog Computer RA 480 HYBRID

The Precision Analogue Computer RA 480 HYBRID

by W. Gilles, G. Pauschmann, J. Krautkraher, B. Heyler and V. Schwarz p. 143

The characteristics and capabilities of the Telefunken Precision Analogue Computer RA 480 Hybrid are described, with particular attention given to:

A wideband operational amplifier with large bandwidth providing very precise self-controlled operations
servo potentiometer having fine resolution and rapid setting
extensive digital elements enabling full hybrid use with a digital computer (700 logic gates and 16 Kbyte RAM)
programs for iterative repetition at 100 Hz–1 kHz

The figure shows a front view of the RA 480 Hybrid; in the table, the hardware components of a fully equipped system are summarized.

[Page 138: Hybrid Precision Analogue Computer RA 770 — abstract continuation]

Hybrid Precision Analogue Computer RA 770

by M. Gilles p. 139

In the present paper, the organization and typical operating modes of the hybrid computing system are dealt with in detail. In terms of hardware, the hybrid computer is treated in the larger sense as a system of interconnected analog and digital computers whose coupling provides the essential functions. The essential element is the coupling element, which accomplishes data transfer. A control program for the hybrid operation is described (Fig. 1), together with typical examples showing the simultaneous operation of the two computers (Table 1). Regarding the programming of the digital portion of the hybrid computer: the digital computer must be programmed in ALGOL (see separate paper), and a large number of specialized subroutines are used to handle the interaction with the analog portion. In addition, a digital function generator is also described. Finally, some remarks are made concerning the programming of specific hybrid computation problems.

On Programming the Digital Computer in ALGOL for Use with Analog Hybrid Systems

by R. Haertl p. 159

This article addresses the fact that in a hybrid computing system, the digital and analogue calculations are carried out simultaneously. The problems that arise in this context for the programmer of the digital computer are treated. The digital computer’s program must perform all the control functions via the coupling element, which appears to the programmer as a set of addressable registers. Data may be written into these registers or read back from them; the analog computer is thus controllable from the digital program, and its results become available to the digital computer through the coupling element.

A procedure for program flow in the hybrid computing system using ALGOL subroutines is described (Fig. 1). The ALGOL subroutines handle the following tasks (Table 1):

mode switching: setting operating modes COMPUTE / HOLD / RESET
coefficient setting via the servo panel
reading outputs via A/D converters
reading comparator and logic states
generation of step functions

Beyond these standard subroutines, various special programming techniques are described for typical iterative-computation problems.

[Page 139: French abstract section]

Abstracts (French)

State and Development of the Technology of Analogue and Hybrid Calculators

by G. Meyr-Brühl, A. Friz, W. Gilles and G. Pauschmann p. 1

The current state of installations and utilization of calculators electronic in one country are examined. In the principal areas, a choice must be made between analog and digital calculation: the performance of each category depends on the nature of the problem and on the desired type of result. The authors describe the performance criteria of electronic calculators (Fig. 1) and put forward the idea that, for high-speed calculations requiring a large number of repeated operations, the analogue or hybrid calculator is far superior in speed to the digital calculator. The precision of the analogue calculator, which corresponds to about 0.01% for the individual computing element (Fig. 2, Fig. 3), remains suitable for the majority of engineering problems; in certain fields (real-time simulation in particular), the analogue calculator is indispensable.

A Wideband Operational Amplifier incorporating Silicon Transistors

by G. Meyr-Brühl p. 19

The characteristics of the operational amplifier determine and fix the static and dynamic accuracy of the basic computing elements (Fig. 1). The frequency response of the open-loop gain is a dominant factor. The frequency response of the input signal V_E of an integrating amplifier (Fig. 2) is reduced in comparison to the auxiliary amplifier by the factor 1 + A (where A is the open-loop gain); the frequency response of the offset voltage V_D is reduced by factor A. The residuals at the input terminal of the amplifier V_E/(1+A) and V_D/A, representing equivalent voltage sources in series with the inverting input terminal, must be minimized for high accuracy.

Theory and extensive measurements show that the transistor amplifier, used as a differential amplifier for offset voltages which in principle have a 1/f characteristic, gives only moderate results. The offset voltage of the transistor amplifier depends strongly — as a consequence of this 1/f characteristic — on the selection and matching of the transistors. For the amplifier described (Fig. 3), a modulation method is used which displaces the low-frequency components to a range where neither 1/f noise nor thermal drift play a role. This leads to a very low residual offset voltage and a very high open-loop gain at low frequencies (decisive for precision of static computing operations).

The amplitude and phase response of the complete (modulated) amplifier is shown in Fig. 4. The transient response (Fig. 5) as well as the switching behavior under square-wave drive are also described.

[Page 140 — French abstracts continued]

In the second section of the article, the characteristics of frequency f_k, determined by the feedback network of the integrator, are analyzed. The frequency f_k (Fig. 1) and the integration time constant are connected through a relationship that depends on the type of potentiometer switch used and on whether an internal or external reference is used. The characteristics of the integrator in HOLD mode (Fig. 2) are also presented. The dynamic error of integration — namely, the lag in following a changing input — is expressed quantitatively. As a result, an expression is obtained for the maximum permissible rate of change of the input variable.

The errors that occur during the HOLD mode are analyzed (Fig. 3, Fig. 4). The HOLD error arises primarily from the leakage current of the switch transistors and from the dielectric absorption in the capacitors. For a long HOLD duration, the droop caused by dielectric absorption is the principal source of error; for a short HOLD duration, the leakage current of the switch transistors is the dominant error. Numerical data and measurements are given.

Coordinate Transformations for Hybrid Computers

by W. Gilles and A. Grange p. 140

It is a well-established fact that one can save computing elements by means of coordinate transformations in AC analogue computers. At the same time, the bandwidths of such transformations must be matched — an important constraint when applied in hybrid computation. The requirement of continuous (servo-free) coordinate conversion is discussed for two cases:

In case 1, the relationship is derived, under the assumption of equal double-load resistors, between the maximum basis-angle error and the maximum attainable accuracy of computation. In case 2, the relationship between the accuracy of computation and the current supplied by the function generator is derived.

The results are summarized in Table 2, which shows the considerable reduction of errors that can be achieved by the novel circuit (Fig. 4). In addition, examples of the use of coordinate transformation in combination with other analog computing elements are given, including polar-to-Cartesian conversion (Fig. 5 and Fig. 6).

Construction and Application of the Hybrid Calculator Hybrid

by W. Gilles, G. Pauschmann, J. Krautkraher, B. Heyler and V. Schwarz p. 78

In a hybrid computing system, the combination of analog and digital calculation computers is arranged to obtain, for each type of problem, the best performance from each type of calculator (Fig. 1). The fundamental elements of the hybrid system are described: the digital calculator, the analogue calculator, and the coupling element (interface). The functions of the coupling element are described in detail (Fig. 2 and Fig. 3). The key performances of the coupling element — accuracy, speed of transfer, and the size of the data word — are presented, along with measurement results.

The programming of hybrid calculation is addressed. The digital calculator’s programming must take into account the presence of the analog computation elements, and all of the interactions between the two calculators must be handled through the coupling element. The procedures and techniques for programming iterative computations in a hybrid system are described. Finally, some examples of hybrid computation programs are given.

[Page 141 — French abstracts continued]

On the Programming of the Digital Calculator in ALGOL

by R. Haertl p. 159

In this article, the author examines the technique applied in a digital-analog hybrid system to the selection of a suitable subroutine method for programming the digital calculator in ALGOL. The information necessary for the digital calculator program is divided into those items that must be available statically (before the computation run) and those that must be updated dynamically (during the computation). The ALGOL subroutines manage the following tasks (Table 1):

Mode control of the analog calculator
Setting of coefficient potentiometers via the servo panel
Reading of analog output voltages via A/D converter
Reading of comparator and logic states
Function generation

General methods for programming iterative computation procedures are also described.

On the Technology of Analog Calculation Used in Hybrid Systems

by W. Gilles, M. Gödde and V. Schwarz p. 142

The Telefunken analogue computer family offers solutions from desk-top computers to large precision machines. The range spans machines with 18 computing elements (RA 741) up to machines with 80–100 computing elements (RA 480 HYBRID). All machines share a common technology base, and many components and modules are common across the family.

The Telefunken Analogue Computer Range

by W. Gilles, M. Gödde and V. Schwarz p. 142

The Telefunken analogue computer family is designed to serve the largest possible variety of users and fields of application, from small desk-top systems up to large floor-standing precision machines. It combines:

a complete range of computing amplifiers with coefficient generators
a complete set of additional (nonlinear) computing elements
a servo-panel system (digitally driveable from an external digital computer)
digital elements for hybrid operation
a complete system of control (operating modes: RESET / IC / OPERATE / HOLD / POTSET)
a system for iterative automatic problem solving (repetitive computation)

The family’s programming is described in terms of the general analog computer patch-panel methodology as well as the digital computer ALGOL-based hybrid programming.

[Page 142 — Telefunken Analogue Computer Range — French abstract]

The Telefunken Analogue Computer Range

by W. Gilles, M. Gödde and V. Schwarz p. 142

The Telefunken analogue computer series covers a wide range of user needs and areas of application. It is designed for use by industrial enterprises as well as research institutions. For that reason, the series encompasses desk-top computers (Fig. 1) as well as large floor-standing precision systems (Fig. 2).

The series is based on a largely standardized digital output range of 100 MHz logic (700 gate elements, 10–70 MHz) designed for command and control of the analogue portion. The digital command interface is extended by an 8-bit digital-to-analogue converter for potentiometer setting and an 8-bit analogue-to-digital converter for reading back the potentiometer position (as a cross-check).

The servo-potentiometer setting and the reading-back of the potentiometer values and the comparator states permit extensive iterative program control. The digital computer controls the analogue computation; the analogue computation controls the digital computer.

The Precision Analogue Computer RA 480 HYBRID

by W. Gilles, G. Pauschmann, J. Krautkraher, B. Heyler and V. Schwarz p. 143

[Page 142: figure only — photograph of the Telefunken Analogue Computer Series]

Potentiometer Servo Setting

by W. Gilles and G. Haertl p. 101

The process of potentiometer servo setting is described (Fig. 1). A procedure is outlined for rapidly (within a few seconds) and accurately setting 88 potentiometers across a differential range of several different values. A block diagram illustrating the principal circuit components (Fig. 2) of one potentiometer servo loop is shown. The complete loop consists of:

a servo motor driving the wiper of the coefficient potentiometer
a motor control amplifier
a position-sensing circuit comparing the actual wiper position against the desired (commanded) value
a digital command interface receiving the target value from the digital computer

Final setting accuracy: ±0.02% of full scale.

Additional Optional Elements

by W. Gilles and A. Grange p. 118

The additional optional elements for the RA 480 HYBRID computing system include the following categories (Table 1):

Comparators for detecting zero-crossings and threshold crossings (with hysteresis adjustment)
Limiters (for clamping a variable to a programmable upper and lower limit)
Rectifiers / absolute-value circuits
Track-and-hold circuits
Diode function generators (16 break points, adjustable both in x and y; accuracy 0.01–0.03% for typical functions)
Four-quadrant multipliers (quarter-square method; accuracy ±0.02%)
Coordinate converters: conversion from Cartesian to polar and polar to Cartesian (resolution ±0.01% of full scale)
Noise generators

Details of the circuit design and the accuracy obtainable for the coordinate converter (Fig. 1–Fig. 3) and the four-quadrant multiplier (Fig. 5) are provided.

[Page 143 — French abstracts continued]

The Telefunken Analogue Computer Family

by W. Gilles, M. Gödde and V. Schwarz p. 142

Within the Telefunken Analogue Computer Family (Fig. 1), the RA 741 is the smallest desk-top analog computer, and the RA 480 HYBRID is the largest precision instrument.

The Desk-Top Analog Computers RA 741 and RAT 700

by V. Schwarz p. 138

The analog computing characteristics of the precision computer RA 741 are listed in the table. Whereas the RA 741 is equipped with 18 computing elements, the RAT 700 is equipped with 25 to 30 computing elements — together with a number of digital elements. In addition, both computers are designed to be used as the analog portion of a hybrid system.

Summaries

State and Development of the Technology of Analogue and Hybrid Calculators

by G. Meyr-Brühl, A. Friz, W. Gilles and G. Pauschmann p. 1

The present spectrum of electronic computing equipment includes analogue computers and digital computers. The close cooperation between both types in hybrid computing systems is examined. Hardware development trends in the design of analog computers are described (Fig. 2, Fig. 3), and the application areas most suitable for each approach, as well as the economic factors governing the choice, are set out. It is shown that, for high-speed repetitive computations, the analog or hybrid computer can decisively outperform a digital computer in speed. The precision of an analog computer — approximately 0.01% for the individual computing element — is adequate for a large number of engineering problems, and in certain application domains (such as real-time simulation) the analog computer is indispensable.

A Wideband Operational Amplifier incorporating Silicon Transistors

by G. Meyr-Brühl p. 19

The characteristics of the operational amplifier determine and set the static and dynamic accuracy of the basic computing elements (Fig. 1). The open-loop frequency response is the primary factor. The frequency response of the input voltage V_E at the integrating amplifier input terminal (Fig. 2) is reduced relative to that of the auxiliary amplifier by the factor 1 + A (where A is the open-loop gain); the frequency response of the offset (drift) voltage V_D is reduced by factor A. The residuals at the amplifier’s input terminal — V_E/(1+A) and V_D/A — must be as small as possible for high computation accuracy.

Theory and extensive measurements show that the transistor amplifier used as a differential amplifier for offset voltages — which in principle exhibit a 1/f noise characteristic — yields only moderate results. For the amplifier described (Fig. 3), a modulation scheme is used which shifts the low-frequency components into a frequency band where neither 1/f noise nor thermal drift are significant. This yields a very small residual offset voltage and a very high open-loop gain at low frequencies (which governs the accuracy of static computing operations).

The amplitude and phase response of the complete modulated amplifier is shown in Fig. 4. The transient response (Fig. 5) and switching behavior under square-wave excitation are also described.

[Page 144: Summaries continued]

Summaries (continued)

A Wideband Operational Amplifier incorporating Silicon Transistors (continued)

by G. Meyr-Brühl p. 19

The figure shows the output signal relative amplitude and the noise behavior of the complete operational amplifier. In Fig. 2, the frequency response of the auxiliary amplifier is given; in Fig. 3, the circuit diagram of the modulated amplifier is shown. The performance of the amplifier is confirmed in Fig. 4 (amplitude and phase response) and Fig. 5 (step response). Detailed noise measurements show the following conclusions, which in the first place confirm the half-full-value frequency:

The frequency-dependent noise contribution falls off clearly above approximately 100 Hz (Fig. 4). In the figure of the operational amplifier using silicon transistors, the second amplifier stage, situated in the branch with the highest gain, is of decisive importance for the residual noise level. At an input voltage of ±100 mV, the step response shows no visible overshoot (Fig. 5). The figure of the operational amplifier shows that the amplifier can be used in all applications where a wide frequency range with low noise and high gain is required.

Electronic Calculators for Analog Computers

By R. Kley and K. Martin

[page 145]

The frequency response of the amplifier circuit in Figure 28 shows oscillatory behavior with different damping and natural frequencies. Figure 29 shows that a good approximation to the true curve can be achieved. Figure 30 illustrates the computation of the temperature- and pressure-dependent properties of the process quantity (Fig. 4 shows the block diagram corresponding to this step). Figure 31 shows the determination of the control variable from the properties of the process quantity (see also the block diagram, Fig. 4).

The computational and graphical methods described for the design of integral regulators can be transferred to process control analogously, and the analog computer serves in this case as a powerful design tool. This applies particularly to the case where more complex plant transfer functions must be approximated, nonlinear elements must be taken into account, or the entire system is to be simulated with the inclusion of noise signals in order to derive statistical quality criteria.

Electronic Calculators for Analog Computers

By R. Kley and K. Martin

[page 146]

The transformation of coordinate systems from Cartesian to polar, and the inverse, can be readily realized on the analog computer. Figure 1 (p. 148) shows the transformation from Cartesian to polar coordinates. Figures 2a and 2b (p. 148) show the transformation from polar to Cartesian coordinates, using either the cosine/sine pair or the tangent/cotangent pair. From Fig. 2a and Fig. 2b, the point A can be determined from its polar coordinates (r, φ) via the equations:

x = r · cos φ
y = r · sin φ

or alternatively via:

x = r / tan φ (if tan φ is used instead of cos/sin)

These figures show the structure of the corresponding analog circuits. The use of electronic multipliers instead of resolvers is advantageous when the coordinate transformation must be carried out at higher frequencies, since resolvers have mechanical limitations at higher rotational speeds.

The Coordinate Transformer in Electronic Calculators

By R. Kley and K. Martin

[page 47 / continuation]

The transformation of coordinate systems represents an important sub-problem in the design of analog computing installations. From the figures (Figs. 2a and 2b, p. 148), the transformation from polar to Cartesian coordinates is obtained via the relationships:

x = r · cos φ
y = r · sin φ

The series of entries in Table 3 (p. 148) shows what speed the coordinate transformation can achieve using the electronic multiplier. As a comparison, the resolver-based computation of the same transformation is also listed. The comparison shows that the electronic multiplier is far superior to the resolver, especially at higher frequencies, both in accuracy and in operational speed.

Electronic Calculators — Systems for Analog Computation

By R. Kley and K. Martin

[page 148]

The systems of analog computation are used today in many branches of applied science and engineering. To the classical fields — aeronautics, ship engineering, ballistics — there have been added in recent times the areas of nuclear technology, chemical engineering, process engineering, and biomedical technology. In view of this expansion in the fields of application, it is necessary to develop the computing elements further and to adapt the analog computing system to the new requirements.

The article treats, in a first part, the function generators for analog computers:

Diode function generators
Multipliers (electronic and servo-driven)
Resolvers
Implicit function generators

The second part deals with the coordinate transformers in digital and analog computation. The third part reviews the complete analog computing system of the RA 800 family.

Programming of Software Analog Computers at AAOL

By H. Nissel and A. Schwabbauer

[page 148 / p. 147]

In modern hybrid and analog computing systems, the programming of the analog computer plays an increasingly important role. The article describes the work procedures used for the programming of a large analog computing system at the Astronomical and Astrophysical Observatory of Leiden (AAOL). The work consists of the following phases: problem analysis, time scaling, amplitude scaling, checking, and the final production of a solution. For each of these phases, the necessary programming steps are set out in detail. Special emphasis is placed on the scaling procedures, since incorrect scaling leads to avoidable computational errors. In particular, the selection of the appropriate time scale factor must be adapted to the problem class under consideration: slow processes (meteorology, biology, economics) require time compression, whereas fast processes (ballistics, aerodynamics) require time expansion on the analog computer.

The programming structure of a computing program for a large analog computer (such as the EAI 680 or comparable installations with more than 100 amplifiers) is compared with the corresponding structure of a digital computer program. The analogies and the differences are worked out: the analog program is determined essentially by the wiring diagram (patch panel), whereas the digital program consists of a series of numerical commands. The parallel execution of all computing operations is the decisive advantage of the analog installation for certain problem classes — especially for problems where real-time coupling to physical processes is required.

Programming of Software Analog Computers at AAOL

By H. Nissel and A. Schwabbauer

[page 147 / continuation]

The family of Telefunken analog computers is described with particular reference to the RA 570/RA 741 and RA 770 series.

The Analog Computer of the Type RA 741

By D. Litwak

[page 149]

The analog computer of type RA 741 and RA 770 (produced by Telefunken) represents the medium class within the RA family. It is described in terms of its structure, operating concept, and technical specifications.

The RA 741 comprises:

100 precision operational amplifiers
80 coefficient potentiometers
Digital logic for mode control (RESET / COMPUTE / HOLD)
High-precision coefficient multipliers
Analog output display

The computing accuracy of the RA 741 is in the range of 0.01 % of full scale; the amplifier bandwidth is approximately 1 MHz. The machine is designed for desk-top installation and requires no special air conditioning.

The Analog Computer Hybrid Precision RA 770

By D. Litwak

[page 149 / continuation]

The analog computer of type RA 770 is the largest machine in the RA family manufactured by Telefunken. It provides:

160 or more precision operational amplifiers
120 coefficient potentiometers
Complete digital control logic
Interfaces for hybrid operation (digital-to-analog and analog-to-digital converters)
High-speed repetitive operation capability

The computing accuracy achieves 0.005 % of full scale in the precision version. The RA 770 is intended for large-scale simulation tasks in aeronautics, nuclear engineering, and process control.

Announcement

From the Board of the German Physical Society (DPG) it became known on 12 November 1965, at the Annual Meeting of the Gesellschaft Deutscher Naturforscher und Ärzte (Society of German Natural Scientists and Physicians), that Dr. Wolfgang Hilberg received the Max Planck Medal for 1965. The medal is awarded each year by the DPG for outstanding contributions to theoretical physics.

Dr. Wolfgang Hilberg was born on 11 February 1920. From 1942 to 1947 he was a research associate at the Kaiser Wilhelm Institute for Physics in Berlin. Subsequently he moved into the field of electrical engineering, especially high-frequency technology, and joined the research staff of Telefunken. For many years he was head of the Central Research Department at Telefunken and made important contributions in the areas of antenna theory, wave propagation, and communications technology.

His work in mathematics and theoretical physics — particularly his contributions to the theory of integral equations and the theory of special functions — provided the basis for the award of the Max Planck Medal.

Dr. Hilberg’s colleagues and friends at Telefunken congratulate him warmly on this distinction.

F. Bösinger

Goswin Schaffrinn †

[page 150]

On 31 October 1965, Dr.-Ing. Goswin Schaffrinn entered into eternal rest in his 51st year. From 1942 to 1947 he worked in the field of developmental engineering at the Telefunken plant in Ulm. He was thereafter responsible for the design of broadcast transmitters, linear amplifiers, and high-power stages.

In his years at Telefunken he directed, among other projects, a line of high-frequency power transmitters. His name is connected with a series of important contributions in the development of the high-frequency technology of broadcast transmitters, linear power stages, and antenna installations.

The loss is felt deeply by his colleagues and by the broader community of high-frequency engineers for whom his work served as a touchstone. His family and friends mourn a man of rare intellectual gifts and warmth of character.

Further Publications from Research and Development at TELEFUNKEN AG

[page 151]

K. Agner
Semiconductor temperature behavior for microwave circuits (Zg. 29, 1962 / S. 247; 440)

H. Altevogt and H. Kröncke
Threshold values for the evaluation (by audio means) of color television signals. Nachrichtentechnik Zeitschrift (NTZ) 18 (1965) H. 9, S. 489–495.

A. Altvater and H. Grimm
Reactance-type frequency multipliers. Nachrichtentechnik Zeitschrift (NTZ) 18 (1965) H. 11, S. 617–620.

A. Bauch
Phase modulation as a method for electron spin resonance measurements. Telefunken Zeitung 38 (1965) H. 1, S. 76–88.

W. Bauch
On the noise behavior of transistor regulators in a DC voltage supply. Telefunken Zeitung 38 (1965) H. 3, S. 281–291.

R. Bachert
Measurement of the carrier frequency of the voice-frequency carrier telegraphy. Telefunken Zeitung 38 (1965) H. 1, S. 11–30.

J. Barthold
Determination of energy spectra. Elektronik 14 (1965) H. 7, S. 219.

J. Barthold
Over-voltage-dependent Avalanche Breakdown. Elektronik 14 (1965) H. 8, S. 267, and H. 9, S. 307–309.

F. Baur
On the theory of distributed-parameter RC networks. Telefunken Zeitung 38 (1965) H. 4, S. 319–327.

R. Baumert and H. Görlicher
Methods for improving the carrier-to-noise ratio in the demodulation of angle-modulated signals. Telefunken Zeitung 38 (1965) H. 4, S. 363–378.

R. Baumert and H. Görlicher
Contribution to the improvement of the signal-to-noise ratio in FM demodulation. Nachrichtentechnik Elektronik (NTE) 15 (1965) H. 3, S. 101.

[page 152]

W. Blauth
Investigations into voltage-dependent variations of quartz resonators. Zg. 29 (1962) S. 113, 440, and 441. Zg. 30 (1963) S. 89, 90, 205, 206.

G. Berry, E. Crecraft, and H. M. Liebscher
A graphical circuit-theory procedure for analyzing periodically pulsed systems. (In English.) IRE Proceedings 1962.

W. M. Brauer
Current measurement in restricted spaces with a current transformer. Elektronik (1965) H. 9.

B. Breitschuh
Investigation of a new intermediate-frequency filter. Nachrichtentechnik Zeitschrift (NTZ) 18 (1965) H. 10, S. 533–540.

S. Brenig and D. Müller
Electronics-based production test of television circuits. Telefunken Zeitung 38 (1965) H. 2, S. 105–113.

J. Büttner and R. Uhmer
Electronic frequency measurement of ultrasonic equipment in medical diagnostics. Elektronik 14 (1965) H. 11.

A. Patten and O. Illner
Investigations into diode function generators for analog computers. Telefunken Zeitung 38 (1965) H. 4, S. 344–362.

K. Hilberg
The bandwidth extension for transistor amplifiers. Nachrichtentechnik Elektronik (NTE) 15 (1965) H. 5, S. 186.

R. Hoffmann
Noise investigation of a multistage high-frequency amplifier. Telefunken Zeitung 38 (1965) H. 2, S. 163–173.

H. Hofmann and W. Lautenschlager
Contribution to the broadening of the measurement range of capacitive displacement transducers. Telefunken Zeitung 38 (1965) H. 2, S. 196–208.

D. Langenberg
Modulation systems. Elektronik 14 (1965) H. 4, S. 107–109.

[page 153]

K. Kley and G. Meyer-Brötz
For the exact determination of the transfer function from frequency response measurement data, with consideration of the computing errors. Regelungstechnik 13 (1965) H. 11, S. 497–503.

K. Kley, J. Falkner, G. Meyer-Brötz, and A. Fries
Electronic and Astrophysical Computing Systems. Telefunken Zeitung 38 (1965) H. 3, S. 217–261.

K. Kley, J. Falkner, G. Meyer-Brötz, and A. Fries
Electronic and Astrophysical Computing Systems. Part 2. Telefunken Zeitung 38 (1965) H. 4, S. 295–343.

H. Kopfmüller
On the detection of the Zeeman effect of ferromagnetically ordered substances in the microwave range. Telefunken Zeitung 38 (1965) H. 1, S. 68–75.

K. Korn
On the possibilities of frequency-division multiplexing of carrier-frequency telephony systems. Nachrichtentechnik (Nachrichtentechn.) 15 (1965) H. 4, S. 150–160.

P. Korn
Over the coding in PCM (pulse-code modulation) systems. Nachrichtentechnik Zeitschrift (NTZ) 18 (1965) H. 5.

F. Kuhn
Noise characteristics for UHF transistors. Nachrichtentechnik Zeitschrift (NTZ) 18 (1965) H. 3, S. 185–192.

P. Lauber and F. Leibold
Suppression of overload effects in transmission systems. Telefunken Zeitung 38 (1965) H. 3, S. 291.

K. Lohmann
Notes on the theory of ultra-broadband transformers. Telefunken Zeitung 38 (1965) H. 3, S. 292–295.

W. Langenberg
Modulation systems. Elektronik 14 (1965) H. 4, S. 107.

W. Lautenschlager
Measuring instruments for the technical engineer. Elektronik 2 (1965) H. 7, S. 215–217, 222.

W. Meister
Transistors in television transmitters. Nachrichtentechnik Zeitschrift (NTZ) 17 (1964) H. 12, S. 681–687.

[page 154]

A. Schmuck
Semiconductor elements for RF interference suppression (Zg. 37 (1964) H. 1, S. 27–30; 1965)

A. Schmuck
Specifications for the protection of bipolar transistors (pulse loading). Elektronik 14 (1965) H. 8, S. 263–266.

R. Scharrer
Use of direct-bonded semiconductor components for broadband amplifiers. Telefunken Zeitung 38 (1965) H. 4, S. 379.

H. Schlottbohm
Nonlinear control of electron spin resonance spectrometers. Telefunken Zeitung 38 (1965) H. 4, S. 379.

R. H. Schumann
Selection criteria for transistors and their measurement. Telefunken Zeitung 38 (1965) H. 4, S. 380.

P. G. Schulz
Measurement and evaluation of frequency responses with aid of the analog computer (Zg. 38 (1965) H. 4, S. 344).

K. O. Tess and J. Brüning
Speed and Position Control by DC Actuators. (In Engl.) IERE (Institution of Electronic and Radio Engineers), S. 213–220.

F. Slosser
Negative Resistance Diodes. Elektronik 1965.

J. Junkel
Modern electronic switching systems. Elektronik 2 (1965) H. 6, 189–194.

H. Vetterlein
Relay matrices in telephone switching. Nachrichtentechnik Zeitung (NTZ) 18 (1965) H. 11, S. 601–606.

M. Steinhardt
Impedance-transforming RC filters. Nachrichtentechnik Zeitung (NTZ) 18 (1965) H. 11, S. 607–612.

K. J. Vogl and W. Haase
Microwave Amplifiers for Satellite Communications. (In English.) Proceedings IEE 112 (1965) H. 12.

H. Winkler and H. Hoffmann
Synthesis of wide-band HF-amplifiers. Telefunken Zeitung 38 (1965) H. 3, S. 293.

G. Schleicher
A concept for “Integrated IHF” for direct conversion receivers. Elektronik 14 (1965) H. 9, S. 291–294.

G. Schleicher
Electronic tuners for UHF television receivers. Elektronik 14 (1965) H. 11, S. 340.

W. Worms
On the Bode diagram application for Nyquist-criterion. Elektronik 14 (1965) H. 8, S. 252–255.

Published by TELEFUNKEN AG, Ulm/Danube. Director in charge: Dr. von and Amb. H. Kiermeier. TELEFUNKEN AG, Berlin 33, Ernst-Reuter-Platz 7. Editor: Buch- und Verlagsdruckerei H. Haentzschel KG, 7 Berlin 31, Grünewaldstr. 6/7.