Ein elektronischer Koordinatenwandler ohne Diodennetzwerke und seine Anwendung bei der Messwertverarbeitung mechanischer Groessen

Complete English translation of the original German-language document (94 pages).

DISSERTATION

“An Electronic Coordinate Converter without Diode Networks and Its Application in the Computer-Aided Processing of Mechanical Quantities”

submitted for the purpose of obtaining the academic degree of Doctor of Technical Sciences

presented at the Technische Universität Wien

Dipl.-Ing. Fritz Vogel 2460 Bruck/L., Hörleinsstr. 966

Vienna, September 1977

Preface

A new procedure is described for the electronic conversion of Cartesian coordinates into polar coordinates in such a way as to achieve good measurement accuracy. The computation procedure for determining the polar radius r and the forward-going computation of the Cartesian coordinates x, y from the polar angle φ are based on the forward-going arctan function f(φ), which is generated by a circuit containing the exponential function. This circuit can be extended by a simple auxiliary function. The representation of the vector-length and polar-angle with the aid of function generators is described. The approximation of the arctan function by a single exponential function is described. Digital procedures for converting Cartesian coordinates into polar coordinates are compared with the present analog computing method. For the application of new analog computing methods, suitable standard components can be specified as functional generators. The principal computation procedure is compared with existing analog and digital procedures. The existing and newly developed types are described comparatively. A separate chapter is devoted to the error field. The methods are illustrated by two application examples in the area of the computer-aided processing of mechanical quantities. These are described at the conclusion.

Acknowledgement

I thank Herr o.Prof.Dipl.Ing.Dr.techn. Alexander Veltmann for supervising this work.

I thank Herr o.Prof.Dr.phil. Rupert Patetz for his suggestions and for the interest he showed in this work.

I also owe thanks to Herr em.Prof.Dipl.Ing.Dr.techn. Adolf Kiettenbach, who made it possible for me to carry out this dissertation at the Experimental and Research Institute of the TU Vienna, as well as to Herr Dipl.Ing.Dr.techn. Wilhelm Treffkirchen and Herr Ing. Gerhard Semslitzer for their valuable hints and fruitful discussions.

Section	Title	Page
1.	Problem statement	1
2.	Known analog procedures for the conversion of Cartesian coordinates into polar coordinates	4
2.1	Representation of vector-length and polar angle with the aid of function generators	4
2.2	Approximation of the arctan function by a single exponential function	6
2.3	Digital procedures for the conversion of Cartesian coordinates into polar coordinates	11
3.1	Parallel-operating digital computer with function memory as function generator	11
3.2	Digital operating coordinate converter with microprocessor	18
4.	Realization of a new coordinate converter	21
4.1	Formation of the vector-length	21
4.2	Representation of the polar angle	22
4.2.1	Generation of an auxiliary function f(φ)	22
4.2.2	Linearization of f(φ)	26

Table of Contents (continued)

Section	Title	Page
4.2.2.1	The varistor	26
4.2.2.2	Correction circuits with varistors	28
4.2.3	Transition to four-quadrant operation	33
4.2.4	Practical circuit implementation	34
5.	Computation accuracy	39
5.1	Overview of expected errors and measures for increasing computation accuracy	39
5.2	Measurement of the static and dynamic errors of the coordinate converter	45
5.2.1	Static errors	45
5.2.2	Dynamic errors	46
5.2.3	Noise	47
6.	Comparison of the individual described coordinate converter types	52
7.	Application examples for the new coordinate converter	55
7.1	Acceleration measurement on a moving body with three degrees of freedom (planar motion)	55
7.2	Analysis of the biaxial stress state of a mechanically loaded body	63
8.	Summary	68
9.	Bibliography	69

List of Figures

Figure	Title	Page
Fig. A4.1	Amplifier circuit, Type 1: Series connection of ohmic resistance and varistor in the input branch of the operational amplifier	74
Fig. A4.2	Amplifier circuit, Type 2: Parallel connection of ohmic resistance and varistor in the input branch of the operational amplifier	75
Fig. A4.3	Amplifier circuit, Type 3: Series connection of ohmic resistance and varistor in the feedback branch of the operational amplifier	76
Fig. A4.4	Amplifier circuit, Type 4: Parallel connection of ohmic resistance and varistor in the feedback branch of the operational amplifier	77
Fig. A4.5	Practical implementation of the coordinate converter	78
Fig. A4.6	Schematic diagram: vector-length	79
Fig. A4.7	Schematic diagram: absolute value, divider	80
Fig. A4.8	Schematic diagram: linearization amplifier, quadrant switch	81

List of Figures (continued)

Figure	Title	Page
Fig. A4.9	Schematic diagram: test signal generator	82
Fig. A4.10	Schematic diagram: monitoring circuit	83
Fig. A4.11	Schematic diagram: power supply	84
Fig. A4.12	Wiring diagram	85
Fig. A7.1	Phantom head and drop machine for the investigation of automotive windshields	86
Fig. A7.2	Phantom head, internal structure	87

1. Problem Statement

Electronic measurement of mechanical quantities is applied in almost all branches of natural science and technology. A wide variety of devices are developed specifically for this purpose, and the number of such instruments is steadily increasing. One important group consists of those devices that exhibit a self-contained, mathematically determined character — those quantities whose definition is already in terms of polar coordinates. The most important representatives of this group include: forces, velocities, accelerations, directions of motion, and angles. These quantities can today almost exclusively be measured by electronic procedures. For this reason, it is therefore necessary that measured values be produced during the measurement procedure in a suitable manner, corresponding to the electronic further processing to be performed, so that the measured values during the measurement procedure comply with the electronic downstream processing requirements. The measured value is evaluated not merely by direct comparison of the computation results with the actual physical quantity measured, but rather a specific desired result is a specific target value, and the computation result should be a specific target value, not merely the measured value itself; rather it compares the result with a target value.

In many cases it is even necessary to perform an electronic evaluation, for example to control different equipment, in which the output results are to be compared with specified target values; the output of the evaluation then shows the deviation of the result from a pre-specified value.

At these requirements, the problem arises frequently that signals from one measurement system have to be converted in a different form. In particular, this is very common in analog-electronic measurement systems, and this is the motivation for the development of an electronic coordinate converter for the conversion of Cartesian coordinates into polar coordinates, taking into account the following requirements:

The converter must be capable of processing mechanical measurement quantities. The highest mechanical frequency components to be processed are 2 kHz.
The coordinate converter must operate in real time, that is, it must process in incoming measurement values within a sufficiently short time interval.
As input signals, the output values of the measurement amplifiers or measurement converters used are available in the range of ±10 V.
For the recording on an oscilloscope or for the storage on a magnetic tape recorder, the output of the coordinate converter should also be in the range of ±10 V analog voltages.
For simultaneous registration of the measurement signals and the computation results, the output of the coordinate converter must be continuous and simultaneous.

The computation accuracy of the coordinate converter should be more favorable in comparison to the conversion accuracy of analog-electronic recorders and registration instruments used in similar applications. The maximum error should not exceed 1% of the full scale value.
The operation of the device must be as simple as possible and without individual adjustment it must be possible to carry out operation.
Through appropriate auxiliary equipment, on the one hand a simple monitoring control of the computer must be possible and on the other hand the adaptation to various computation methods must be possible.

For the realization of the above-listed points, a coordinate converter in analog technology was developed, in which the representation of the polar angle was accomplished by a new, previously unknown procedure. The working principle of this coordinate converter will be described in Chapter 4.

2. Known Analog Procedures for the Conversion of Cartesian Coordinates into Polar Coordinates

2.1 Representation of Vector-Length and Polar Angle with the Aid of Function Generators

The conversion of Cartesian coordinates into polar coordinates is an analogue computing problem that arises frequently in analogue computing technology and measurement value processing. One finds accordingly a whole series of analogue computing circuits that are designed specifically for solving this problem.

In /1/ a computing circuit is described that, starting from the vector-length r from two partial components x and y, computes the polar angle. Figure 2.1.1 shows that the vector-length r can be assembled from two partial components:

[Figure 2.1.1 — diagram showing vector components x, y, and resultant r with angle φ]

From Figure 2.1.1 it follows:

r = x·cosφ + y·sinφ           (2.1.1)

Furthermore, for the line segment XN in Figure 2.1.1:

XN = x·sinφ - y·cosφ    or    0 = x·sinφ - y·cosφ         (2.1.2)

With the aid of this relation the polar angle φ can be computed.

[Figure 2.1.2 — Computing circuit for the transformation of Cartesian coordinates into polar coordinates]

The circuit uses sine/cosine function generators M1 and M4 and multipliers M2 and M3 driven by a sinusoidal voltage. The function generator generates the auxiliary function F(φ). This function generator controls the output voltage U_φ, which then corresponds to the polar angle φ.

With this computing circuit, extremely high computation accuracy of the coordinate converter can be achieved. The computation errors can be less than 0.1%.

However, the accuracy of this computing procedure comes at the cost of very high circuit complexity. Because of the very large number of computing elements required (many multipliers, function generators, operational amplifiers), achieving this accuracy becomes economically questionable, especially when the device is intended for use, for example as part of computer-aided measurement value processing systems.

Furthermore, it must be ensured that the total computing error is only for a single angle, not for all values of the angle. The computation accuracy of equation (2.1.2) depends not merely on a single error but also on all the other variables of the equation.

The equation (2.1.2) is similarly valid not just for a single angle φ = K, K = 1, 2, 3, …

It can be seen from this that those values of φ are the ones for which the equation (2.1.2) is satisfied, that is, for which the condition

[∂F(φ)/∂φ]_K > 0             (2.1.3)

is fulfilled.

The computer thus automatically finds a null crossing as soon as the discriminant of equation (2.1.2) becomes negative.

2.2 Approximation of the arctan Function by a Single Exponential Function

For an exact computation of the polar angle φ using the arctan function, an exact computation of the polar angle φ with the aid of the arctan function is required.

There exists the notably large dynamic range in which, for a polar angle in the range 0 < φ < 90°, a very accurate representation of the arctan is achievable through a simple procedure.

The function

z = π/2 · (y/x)^a / (1 + (y/x)^a),    a = 1.8125          (2.3.1)

approximates, in the range 0 ≤ φ ≤ π/2, with good accuracy the arctan function.

The error curve of the approximation, plotted against the polar angle φ, is shown in Figure 2.2.1:

[Figure 2.2.1 — Error curve of the approximation function] (y-axis: F in percent, ranging from approximately −0.5 to +0.5; x-axis: polar angle φ in degrees, 0 to 90)

As both the numerator and the denominator of equation (2.3.1) contain the expression (y/x)^a, the representation of the function z is accomplished in a computing circuit with feedback branch.^(1)

Figure 2.2.2 shows the structure of such a computing arrangement.

[Figure 2.2.2 — Implicit computing circuit for generating an approximation function for the arctan] (Circuit diagram: inputs y and x to a ratio-forming block (y/x), output (y/x)^a, fed into multiplier X and summer Vi; the summer produces z = arctan(y/x); feedback signal u = π/2 − z)

The circuit operates according to the following principle:

At the output of the multiplier there appears a signal

z = u · (y/x)^a              (2.2.2)

This signal z is subtracted from a constant quantity:

u = π/2 − z                  (2.2.3)

^(1) These circuits are frequently referred to in the literature also as “implicit computing circuits.”

Substituting u in equation (2.2.2) yields:

z = (π/2 − z) · (y/x)^a

respectively:

1 + (y/x)^a · z = π/2 · (y/x)^a

and from this the desired relation follows:

z = π/2 · (y/x)^a / (1 + (y/x)^a)

The great advantage of this computing circuit lies in its particularly simple structure, which makes it especially attractive for use as a computing block in measurement value processing.

Today there are several commercial modules offered by manufacturers of the computing elements that enable the generation of (y/x)^a through a single multiplier-divider element and the exponential function. With a practically tested circuit of this type, accuracy for the range 0 ≤ φ ≤ 90° can be achieved with errors less than 1%.

Unfortunately, these computing circuits have a number of disadvantages:

Only positive input signals can be processed; i.e., it is only possible to process angles in one quadrant.

The frequency bandwidth is very strongly dependent on the magnitude of the input voltages and decreases very rapidly as input signals become smaller /8/.
Like all computing arrangements with feedback branches, the above-described circuit tends toward self-sustaining oscillation. These oscillations must be suppressed by suitable corrections to the frequency response, e.g. by inserting a low-pass filter into the feedback branch. In the practically tested circuit, an RC filter with a time constant τ = 2·10^−5 sec had to be inserted ahead of the input of summer Vi (Figure 2.2.2). However, this RC element reduces the frequency bandwidth of the computing circuit even further (−0.5 dB cut-off frequency: 470 Hz).

3. Digital Procedures for the Conversion of Cartesian Coordinates into Polar Coordinates

3.1 Parallel-Operating Digital Computer with Function Memory as Function Generator

In comparison with the various analog and digital coordinate converters, the analogy between the digital computer approach and the coordinate converter approach deserves some attention. The great advantage of the digital approach is mainly the fact that digital computation sections can be produced very inexpensively, so that the cost of digital computing sections with their great computing capabilities over the analog computing sections with limited computing accuracy etc. can no longer be taken into consideration.

Due to the technological progress in the production of faster memory elements with greater capacity, the design of a parallel-operating digital computer has gained in significance in the following discussion.

Figure 3.1 shows a block schematic of how it might be used for the processing of measurement quantities. In an analog system it is processed in parallel through an “x” and “y” analog-to-digital converter, which are then converted into digital signals that can be processed by the following digital computer.

[page 19: figure only]

Fig. 2.1: Block diagram of a coordinate converter with parallel-operating digital arithmetic and function-value storage.

Page 20

eine Änderung des Eingangspegels während dieser Konversionsart is unzumutbar. Die vorgeschalteten Gatter müssen daher die Analogdigitalwandler während eines bestimmten Zeitraums für das Einlesen des Ergebnisses sperren und halten während der Zeit, in der das Ergebnis berechnet wird, das Eingangssignal konstant. Die Aufgabe der Abtast-Halte-Einrichtung ist es daher, das Eingangssignal über einen Zeitraum von ca. 10 µs zu konstanthalten.

Any change in the input level during this conversion mode is unacceptable. The upstream gates must therefore block the analog-to-digital converter during a specific time interval for reading in the result, and hold the input signal constant during the time in which the result is being computed. The task of the sample-and-hold device is therefore to keep the input signal constant over a period of approximately 10 µs.

Following the digitization of the input data, further processing takes place in digital form. For the generation of the discretized function values (quantizer), various arithmetic units are used, which can serve as “electronic look-up tables.” The function values are stored in read-only memories from which the associated values can be read out after the input coordinates are applied. The memory content gives the function value for a selected discretization. For the generation of the individual function values, the stored values are re-read back through parallel-to-serial converters into the second stage.

Division computation can also be carried out with the help of a parallel-multiplier: the division is executed by multiplying the dividend by the reciprocal of the divisor. The reciprocal values of the divisor are stored as a look-up table in a read-only memory. The stored value is retrieved by the divisor address and then multiplied by the dividend in the multiplier.

The two input coordinates x and y are converted via two digital-to-analog converters into corresponding analog quantities f(x₁) and f(x₂), in order to make them available as reference voltages for subsequent interpolation processing.

Page 21

The greatest advantage of this computing method is of course its high computational accuracy. The conversion accuracy of analog-digital converters is very high and far exceeds the accuracy of analog-type systems. Furthermore, the access time of the memory (approximately 50 ns for TTL memory types) is comparatively short, which means that the memory access time enables the arithmetic computation steps to be carried out even more quickly.

A further advantage is that the total time for the conversion is fully determined by the converter conversion time. The computation process itself, in the region of some hundreds of nanoseconds, is very much shorter. When the computation is complete, the result is immediately available.

The computation approach itself works without requiring intermediate storage of values between the calculation steps; the storage requirement is therefore also comparatively low.

The disadvantages of a parallel digital computing approach lie in the high circuit expenditure required — in the lookup-table approach — and in the large memory requirements. The required number of memory storage cells scales as 2^n where n is the number of address bits. For a desired computing accuracy of ca. 1 %, approximately 7-bit resolution of the input coordinates is required, giving rise to 10^4 memory locations. At higher resolution requirements, the memory requirements increase rapidly.

The required number of memory bits can indeed be substantially reduced. A minimum number of interpolation points is sufficient, if between these support points the functional behavior is approximated via the interpolation formula described in the next chapter. This, however, is only justified where the computational speed requirement can be relaxed.

The required memory space can be reduced significantly. The non-linearity of a function-value encoder is therefore essentially worse than that of a digital-to-analog converter, because of the increased number of required function-table look-up values and their scaling factors applied at the analog-to-digital conversion stages.

Page 22

Table 3.1: Approximation errors of the ADC-based and function-value-based approaches as a function of the number of support points, related to the full-scale range.

Number of support points	Address width a = √n	Minimum approximation error (Quantizer)	Minimum approximation error (Interpolator)	Computing accuracy of a function encoder
8	3	6.25 %	4.75 %	1.40×10⁻²
16	4	3.13 %	4.39 %	1.20×10⁻³
32	5	1.56 %	0.27 %	1.50×10⁻⁴
64	6	0.78 %	0.0066 %	1.60×10⁻⁵
128	7	0.39 %	0.002 %	1.00×10⁻⁵
256	8	0.20 %	0.0002 %	—

The errors given for the ADC and function-value approaches refer to the full-scale range.

Page 23

In Table 3.1, the theoretical values in the approximation of the actual values are shown in 10-bit resolution. As a further result, Table 3.1 shows the required memory capacity. For a required coordinate sampling precision of ca. 10^5 memory locations, 10^5 memory capacity elements are required with a mere one-operation-per-second memory. The required memory is, however, realizable with a memory having a suitably high access speed. With a directly addressed memory capacity one can, however, only reach computing speeds in exceptional cases; maximum computing speed can be achieved only at greatly reduced accuracy.

The required memory capacity can itself be largely reduced. It is no longer necessary to store an equal number of interpolation points: by using only a few support points (Fig. 3.2), it is possible to reduce the required memory capacity. Yet this requires an increase in computational expenditure (multiplications, additions, etc.), which is however substantially lower overall. Both methods are comparable in total computing costs.

The approximation error that arises:

Δf = f(x) − f̄(x) (3.5)

can be reduced by the chosen number of support points and the spacing between them. This approach requires comparatively lower memory requirements than the original approach; it is however substantially higher for look-up operations (multiplications, subtractions, etc.), which are however substantially less significant overall. Both methods are comparable in overall computing cost.

Page 24

with

tan α = [f(x₁) − f(x₀)] / (x₁ − x₀) (3.4)

Fig. 3.3 shows the block diagram of a function encoder operating on this principle.

f(x) [graph showing f(x₁), f(x_i), f(x) with x₀, x₁ as support points and Δf = f(x) − f̄(x) labeled]

Fig. 3.2: Linear interpolation

The approximation error that arises:

Δf = f(x) − f̄(x) (3.5)

can be reduced by the chosen number of support points and the spacing between them. This approach requires comparatively lower memory capacity than the first method; it is however substantially higher in computational operations (multiplications, subtractions, etc.), which are however substantially less significant overall. Both methods are comparable in total computing cost.

Page 25

Fig. 3.3: Block diagram of the function encoder.

[Block diagram showing: ADDRESSING / SUPPORT-POINT SELECTION → FIXED-POINT MEMORY I (tan α) and FIXED-POINT MEMORY II [f(x₀)] → PARALLEL MULTIPLIER (x − x₀) · tan α → PARALLEL ADDER → −f(x)]

3.2 Digital arithmetic coordinate converter with microprocessor

Microprocessor

The use of a microprocessor as computing element makes it possible to realize a digital arithmetic processing approach of high flexibility. Under the term “microprocessor” one understands a system that is able to execute one or more arithmetic operations — characterized by a program instruction set. At its core, such a system contains mainly a central processing unit (CPU), registers, and an arithmetic logic unit (ALU). To obtain a functional system, the CPU must be augmented with program memory and data storage.

It is also well known that a single microprocessor carries out program instructions sequentially. This means that the execution of complex computational tasks requires comparatively more time than —

Page 26

— which themselves become apparent through simple logical decisions in computational problems. Regardless, the microprocessor can be put to use as an alternative to the analog approach, and in parallel computing operations can achieve significant advantages.

In order to estimate the required computational speed of a microprocessor, the following factors must be taken into account:

a) the maximum input frequency (the Nyquist rate of the system)

b) the throughput capability of the instruction set of the microprocessor

c) the number of operand address-capability registers

d) the throughput capacity of the input-output register bank

e) the available programming capacity, which is determined by the applicable software

As the basis for estimating the required minimum computing speed of a microprocessor, the values in Table 3.1 are taken as the maximum input frequency of approximately 1 kHz.

For the coordinate conversion, approximately three multiplication operations and approximately the same number of addition operations must be performed per input sample. Per cycle, therefore, approximately 100 arithmetic operations at the required precision of ca. 1 % must be executed. For the coordinate transformation as a whole, a period of the input signal of 1 ms must be processed. This means that the total computing time available per sampling period is approximately 1 ms. To stay within this time budget, the microprocessor must complete approximately 100 operations in less than 1 ms — i.e., at least 100,000 operations per second.

Page 27

hundred function values must be computed. This results in an estimated minimum computational speed of approximately 5 µs per step.

For comparison, current ECL-technology implementations of parallel microprocessors offer instruction cycle times down to 1000 ps / 10 MHz. Using such devices, the three required coordinate transformation operations — which must together be computed from input values — can be completed within a time of approximately 5 µs. For the total coordinate transformation, all three coordinate-computation steps that must be stored out must run within approximately 5 µs.

Alongside these differences, it is worth noting that the greatest difficulty, which the coordinate conversion represents, is in no way addressed using microprocessors in isolation.

For the implementation of coordinate conversion computational sequences, the current state of microprocessors therefore offers little capacity. However, in this very domain, the use of new bit-parallel processors (“array processors”) offers significant advantages in terms of computational speed.

Page 28

4. Realization of a new coordinate converter

4.1 Forming the vector magnitude r

The computational circuit for the computation of the vector magnitude from the Cartesian input coordinates x and y is the analogue realization of the equation:

r = √(x² + y²) (4.1.1)

Its circuit-engineering special features are illustrated in Fig. 4.1.1, which shows the block diagram of the circuit.

[Block diagram: x → [×] (squarer) → [+] (adder) → [√] (square root circuit) → r = √(x²+y²); y → [×] (squarer) → [+] (adder)]

Fig. 4.1.1

The input quantities x and y are first each squared in a multiplier stage, and the two squared values are summed in an adder. The next stage is a half-wave-switched divider, which corresponds to the equation (4.1.1). The output is then the square root of the sum of squares.

In the scaling of this circuit, attention must be paid to ensuring that the factor contribution for the determination of the polar angle —

Page 29

— does not introduce any additional errors in the overall computation of r, because for this reason the same squarer circuit is also used for the divisor and the polar-coordinate calculation.

4.2. Determination of the polar angle φ

In the following section, a new method for the determination of the polar angle will be described that can be realized with low circuit overhead and high computational accuracy.

The method is based on the following considerations. The relations

φ = arctan (y/x) or φ = arcsin (y/r)

are well known; however, an auxiliary function f(φ) is defined as:

f(φ) = (cos φ) / (1 + sin φ) (4.2.1)

This auxiliary function f(φ) is linearized by means of a two-stage auxiliary function g(φ):

f(φ), g(φ) ← K · e (4.2.2)

K … scaling factor

Page 30

This method brings with it a series of advantages:

1.) The function f(φ) can be realized very simply and without the use of expensive trigonometric function generators.

From Fig. 2.1.1 it follows that:

cos φ = x/r

sin φ = y/r

Therefore from equation (4.2.1):

f(φ) = x / (r + y) (4.2.3)

The determination of f(φ) can therefore be reduced to a simple division.

2.) The function f(φ) has only very slight curvature and therefore changes its —

[Graph showing f(φ) vs φ for the first quadrant, 0 to 90°, with values from 0 to 1 on the y-axis. The curve shows f(φ) declining nearly linearly from 1 at φ = 0° to 0 at φ = 90°.]

Fig. 4.2.1: Behavior of f(φ) in the first angular quadrant

Page 31

— value nearly proportional to the polar angle φ. The (i.e., the absolute) deviation of the straight line from the curve is at most approximately 8 %. No demands are placed on the correction circuit for the linearization of f(φ); consequently, the correction circuit can be realized with a single operational-amplifier stage.

3.) When using equation (4.2.1) to compute f(φ), the result is independent of the absolute value of the vector (that is, of r), independent of the magnitude of the components of the vector. The correction circuit is therefore optimally suited from a circuit-engineering standpoint to be implemented with a simple circuit structure.

4.) The circuit for the determination of φ has a structure comprising individual stages connected in cascade, as can be seen, for example, from the feedback loops described in the next chapter. No frequency-reducing filter stages are switched in from the outset. Therefore, in no case does this cause any reduction in the frequency response of the receiving correction-amplifier filter stages.

Page 32

Fig. 4.2.2 shows the complete block diagram of the circuit for the first angular quadrant (x > 0, y > 0). In the upper half, the behavior of the division output for the function f(φ) is shown. The output voltage u₂ is then linearized in the subsequent stages. The voltage u₂ is then further modified and finally converted to the desired voltage behavior corresponding to the uniformly scaled output curve φ.

Diagram a) shows the divider circuit that produces the function f(φ) = x/(r+y). Diagram b) shows the linearization of u₂ by a varistor. It corresponds to Fig. 4.2.1, Curve b). There follows from this the desired voltage-value trace illustrated as Curve c).

[Block diagram: x → [÷] (divider, denominator r+y) → u₂ = f(φ) → [VARISTOR] → u₃ · K·φ → output]

[Graphs a), b), c) showing: a) output of divider, b) linearized function, c) final output proportional to φ]

Fig. 4.2.2: Block diagram of the circuit for the determination of the polar angle φ.

Page 33

4.2.1 Linearization of f(φ)

As noted in the next chapter, a variety of methods are available in analog computing technology for realizing any number of non-linear characteristics (varistors). These can be realized with voltage-divider arrangements comprising function-shaping resistors and diodes, with multipliers, with junction characteristics, or through the use of appropriate software.

All of these circuit configurations previously required several hundred volts supply voltages; they were realized with vacuum tubes, e.g., as triodes. Through the continuing miniaturization in digital technology and through the use of transistors, the analog computing range has come to be predominantly in the supply voltage range typical of analog electronics, i.e., in the range of ±10 V to ±15 V.

Before the circuit engineering approaches for varistors are discussed, the general operating range and characteristics must first be considered —

Page 34

Varistors are resistances with a non-linear voltage–current characteristic. The non-linear characteristic of a varistor can be well described by the following equation:

U = K · J^m (4.2.4)

Here U is the voltage applied across the varistor, J is the current flowing through the varistor, K is an empirically determined characteristic factor, and the exponent m characterizes the non-linearity of the characteristic.

In Fig. 4.2.3, Curve J shows the typical behavior of a varistor characteristic.

For the dimensioning of analog computing circuits, it is however more convenient to compute with Equation (4.2.4), and to look at the voltage-dependent resistance of the varistor instead. The voltage-dependent resistance R_U follows from Equation (4.2.4), and from U = K · J^m it follows that:

J = √(U/K), so that:

R_U = U/J = √(K · U^(m-1)) (4.2.5)

Page 35

A typical example of the voltage-dependent resistance behavior R_U of a varistor is shown as Curve R_U in Fig. 4.2.3.

[Graph showing current J (mA) on the right y-axis and resistance R_U (kΩ) on the left y-axis vs voltage U (V) on the x-axis, ranging from 0 to approximately 0.5 V. Two curves are shown: J rising with increasing voltage, and R_U decreasing with increasing voltage, labeled R_U and J respectively.]

Fig. 4.2.3: Current and voltage-resistance characteristic of a varistor

4.2.2. Correction circuits with varistors

It is a well-known idea to use a varistor in the input or feedback path of an operational amplifier in order to realize a variety of functions. As demonstrated through practical experiments, it is possible to realize a plurality of function shapes using only the four basic operational-amplifier circuit configurations, which become still more versatile when several circuit types are combined.

Page 36

Figures 4.1 to 4.4 in the appendix show the four characteristically distinct correction circuits examined.

Considered as a special case, the linearization U₁ of the input voltage for the sought correction circuit is to be written as:

U₁ = K₁ · f(φ) = K₁ · (cos φ) / (1 + sin φ) (4.2.6)

For the output voltage U₂ of the correction circuit, the following is required (cf. Fig. 4.2.2 b):

−U₂ = K₂ · (1 − φ/π/2) (4.2.7)

From the last two equations, the desired correction function g(φ) can be defined:

g(φ) = −U₂/U₁ = K₂ · (1 − φ/(π/2)) / (K₁ · (cos φ / (1 + sin φ))) (4.2.8)

The function g(φ) assumes for φ → 0 the indeterminate form 0/0; the solution of the equation chooses the value of the ansatz:

g(φ) = K · (φ)/(f(φ)) (4.2.9)

[Page 37 — p. 30 of dissertation]

According to L’Hospital’s rule /6/ the following holds:

$$\lim_{\varphi \to \frac{\pi}{2}} g\left(\varphi\right) = \lim_{\varphi \to \frac{\pi}{2}} \frac{h^2\left(\varphi\right)}{\bar{g}^2\left(\varphi\right)}$$ (4.2.10)

This converts Equation (4.2.8) to:

$$\lim_{\varphi \to \frac{\pi}{2}} g\left(\varphi\right) = \frac{\varphi_2}{\bar{g}} \cdot \frac{n}{\bar{g}}$$ (4.2.11)

For the practical realization of the correction function g(φ) it is more convenient if the input voltage U₁ is expressed not as a function of φ, but rather as a function of the supply voltage U₂. This connection can be derived from Equation (4.2.6) in (4.2.8).

The curve of U₂ as a function of U₁ is shown in Figure 4.2.A.

Figure 4.2.A: Dependence of the voltage U₂ on the input voltage U₁

Comparing Figure 4.2.A with Figures A4.1 through A4.9 in the appendix, one can recognize that for a

[Page 38 — p. 31 of dissertation]

correction circuit the amplifier circuit Type 4 is best suited. It is briefly sketched here again.

Figure 4.2.5: Correction circuit

The circuit shows an operational amplifier with resistors R₁, R₂, and Rᵥ, where:

$$R_P = \frac{R_V \cdot R_2}{R_V + R_2}$$

The transfer function of this amplifier circuit is given by:

$$g\left(\varphi\right) = \frac{-U_2}{U_1} = \frac{R_P}{R_1}$$ (4.2.12)

$$R_P = \frac{R_V \cdot R_2}{R_V + R_2}$$ (4.2.13)

Combined with Equation (4.2.8) one obtains from this for the ratio Rₚ/R₁:

$$\frac{R_P}{R_1} = \frac{\left(1 + \frac{\varphi}{\bar{g}_2}\right)\left(1 + \sin\varphi\right)}{\cos\varphi}$$ (4.2.14)

(The factor K₂ was chosen equal to unity, i.e.: an input voltage U₁ = 10 V also corresponds to an output voltage −U₂ = 10 V.)

The resistance Rₚ is not constant, but dependent on the voltage U₂ and indirectly also on the polar angle φ.

[Page 39 — p. 32 of dissertation]

For φ = 0 (⇒ U₂ = 10 V) the following results from (4.2.14):

$$\frac{R_P^0}{R_1} = R_1$$ (4.2.15)

For φ = π/2 the following results from (4.2.11) and (4.2.14):

$$\frac{R_P^{\frac{\pi}{2}}}{R_1} = \frac{n}{\bar{g}} \cdot R_1$$ (4.2.16)

From Equation (4.2.5) it can be seen from Figure 4.2.4 that the resistance Rₚ becomes zero when the applied voltage approaches zero. This also follows from Equations (4.2.15) and (4.2.16), making R₂ identical with Rₚ. Thus, according to Equation (4.2.16):

$$R_2 = \frac{n}{\bar{g}} \cdot R_1$$ (4.2.17)

For determining the amplifier values m and Kᵥ for which the function g(φ) is best approximated, one substitutes for φ an additional value in Eq. (4.2.6) in (4.2.8).

For example, for φ = π/4, one obtains:

$$\frac{R_P^{\frac{\pi}{4}}}{R_1} = 4{,}628 \cdot R_1$$ (4.2.18)

With this, the values of R₁, R₂, m, and K can be determined from Equations (4.2.5), (4.2.15), (4.2.17) and (4.2.18), where K remains freely selectable.

[Page 40 — p. 33 of dissertation]

4.2.5 Operation in Four-Quadrant Mode

From the block diagram Figure 4.2.6 it can be recognized that the coordinate converter for operation in higher-numbered quadrants is better suited; the divider and the linearization circuit operate on the quantity r·|y| rather than on a function of φ, and they process its absolute value |y|.

Deviating from the basic principle, here for the formation of the result function the quantity y, i.e., the sign of |y|, is used — not the magnitude of y — in order to express the dependency on |y|. The result |φ| is generated by this circuit, and to obtain the actual value including the sign, a subtractor is included whose output yields r·|y|.

In the case of four-quadrant operation, the divider output must undergo a sign reversal, since in this connection the polar angle is also counted in the two-quadrant sense — when Equation (4.2.6) is inserted.

In the four-quadrant divider, the numerator input signal is also considered with its sign, and thus also the sign of the input voltage is taken into account.

[Page 41 — p. 34 of dissertation]

Figure 4.2.6: Block diagram of the coordinate converter for four-quadrant operation

For a better understanding of the operation of the coordinate converter, Figure 4.2.7 shows the signal waveforms at the outputs of the individual computing stages. The signals are plotted for sinusoidal input signals of 90° phase offset (x = U₀ sin(ωt), y = U₀ cos(ωt)).

4.2.6 Practical Circuit Implementation

In Figures 4.2 through 4.2.12 the overall circuit of the coordinate converter is shown. It consists essentially of two main groups:

Computing circuit
Auxiliary circuits for improving computing accuracy and operating convenience

[Page 42 — p. 35 of dissertation]

Figure 4.2.7: Signals at the outputs of the individual computing stages

The figure shows the following signal waveforms plotted against ωt over the range 0 to 2π:

x (top): sinusoidal, amplitude U₀
y: sinusoidal, 90° phase shifted from x, amplitude U₀
r: constant at U₀ (the vector magnitude)
sign(y): square wave switching between +1 and −1 at π and 2π
|y|: full-wave rectified sinusoid of y, amplitude U₀
r·|y|: waveform of the product, amplitude 2U₀ (upper envelope) and U₀ (lower envelope)
f(φ) = x/(r·|y|): quotient, triangular-like waveform between 0 and 1
f(φ)·g(φ): further-processed waveform, amplitude 1
1 − f(φ)·g(φ): complement waveform, amplitude 2 decreasing to 0
φ: polar angle, linearly increasing from 0 to π

[Page 43 — p. 36 of dissertation]

The computing circuit corresponds to the block diagram (Figure 4.2.6) and the block diagram (Figure 4.2.7).

4.2.6a Temperature Stabilization of the Supply Voltage

For avoiding the influence of temperature changes on the coordinate converter, the quadrant detectors (Figure 4.2.8) and the supply voltage for the Halfwave Rectifier at a constant operating level of ca. 45 °C must be maintained.

For this purpose each of the two components — the transistors and the supply regulation — are enclosed by a thermostat. The transistors serve on one hand as a heating element for the junction temperature and on the other hand also as a temperature-controlled regulator. This arrangement achieves linearly regulated current limiting. The enclosure is the circuit board of the computing unit, the transistor, and the thermostat block; the temperature of the junction point is held constant to ca. ±0.5 °C.

A significantly high sensitivity is achieved by measuring the temperature over the device and the supply voltage at the individual computing stages. In each supply unit there is its own supply voltage provided, which also at a constant temperature is maintained.

[Page 44 — p. 37 of dissertation]

The generation of the reference voltage for the quadrant detectors (Figure 4.2.8) is effected through a special reference circuit with a temperature coefficient of 5×10⁻⁶ /°C.

For the supply of the linearization amplifier and thermostat a separate, specially stabilized supply source with separated transistors was used.

For use in hardware checks of the coordinate converter and for calibrating the device, the functional test (Figure 4.2.9) uses a 90° phase-displaced sinusoidal signal pair as the input quantities X and Y.

For the functional test, a display (Figure 4.2.10) serves to show both input signals together at the outputs of the individual computing stages. The vector quantity r is presented as the output signal of the Vector-Betrag (vector magnitude), and also the output voltage with the amplitude of 10 V (which is the amplitude of the input signals). As the output signal for the polar angle, the UV-brightness is visible once per period of the input signal from −180° to +180° being traversed. Through the UV-detector it is possible to control the function of the computer.

For adjustment of the computer, the ready indicator signal indicates the working state of the thermostat circuit.

[Page 45 — p. 38 of dissertation]

For calibrating the computer and an associated recording device, the following two variables are adjustable:

Two variable, precisely stabilized voltage sources in conjunction with a digital voltmeter, which delivers the precisely defined input values X and Y.

As a further aid, the computer has a limit indicator (Figure 4.2.10) that monitors both input signals at the output of the linearization amplifier and corrects beyond the maximum permissible values; this overcomes the working range limitation. In the case of an overrange of ca. ±10.5 V, the computer generates a lamp signal that blinks once per second. This makes it possible to detect a mis-adjustment of the computer from the optical display. The ready signal shows the working state of the thermostat circuit.

The mechanical implementation of the computer is shown in Figure 4.2.5. The various construction groups of the computer are assembled together, and the coordinate converter block contains the compact construction that allows the coordinate converter and the auxiliary switching circuits to be accommodated in a single housing. This results in a very compact construction that can be accommodated in a standard 19-inch rack.

[Page 46 — p. 39 of dissertation]

5. Computing Accuracy

5.1 Overview of the Expected Errors and Measures for Improving Computing Accuracy

In electronic computing circuits one must reckon with two groups of errors:

Static errors (time-independent, quasi-steady-state errors)
Dynamic errors

Among the most important static errors are:

Offset voltages and currents
Nonlinearities of the transfer function
Scaling errors
Temperature effects
Influences through changes of the supply voltage

Among the most important dynamic errors are:

Frequency bandwidth
Slew rate (slewing rate)
Noise

These error influences (insofar as they are dynamic) can already be largely reduced in the design phase through appropriate selection of components, where in most cases a compromise between minimum errors and cost must be accepted.

[Page 47 — p. 40 of dissertation]

The static errors can be reduced by appropriate circuitry (offset, linearity factor), by use of stabilized supply voltages, by use of thermostats for temperature stabilization, and by inserting thermistors for construction of the correction circuit.

In the computation of the polar angle, the following errors arise in addition to the already-mentioned general error sources, through the correction circuit:

a) Nonlinearity of the varistor characteristic k
b) Temperature dependence of the varistor proportionality factor k
c) Approximation errors of the linearization function g(φ)
d) Influence of the supply voltage on the varistor characteristic
e) Aging effects
f) Dynamic behavior of the correction circuit

These error sources and their possible remedies are examined in the following.

zu a) Nonlinearity of the Varistor Characteristic

The varistor characteristic is described by the fact that the proportionality factor k and the exponent m in Equation (4.2.4) assume different values for positive and negative input voltages. Appropriate selection of the varistor brings this error influence to the point where

[Page 48 — p. 41 of dissertation]

the amplification of the linearization circuit for positive and negative input voltages is made symmetrical. This is achieved by additionally inserting an appropriate diode in the reverse bias direction in the feedback path. (The practical implementation of this circuit is shown in Figure A4.9.)

zu b) Temperature Dependence of the Proportionality Factor k

During the experiment according to Equation (4.2.4) the proportionality factor k is strongly dependent on the varistor temperature. As already mentioned in Section 4.2.4, this forces a change in the k factor, which is avoided by maintaining the varistor junction temperature at a constant value of ca. 45°C.

Figure 5.1 shows the temperature influence on the k factor for two different varistors.

The change in the k factor that arises through the change in operating conditions, as mentioned in Section 4.2.4, is thereby avoided, since the varistor is maintained at a constant temperature of ca. 45°C.

[Page 49 — p. 42 of dissertation]

zu c) Approximation Error of the Linearization Function g(φ)

As described in Section 4.2, the theoretical curve of the linearization function g(φ) is approximated according to Figure 4.2.5. Through appropriate selection of R₁ and R₂ in Figure 4.2.5, the curve of the ratio Rₚ/R₁ is adjusted. The dashed line in Figure 4.2.5 shows an approximation curve deviating from the theoretical curve. This deviation represents an approximation error that can be largely suppressed from the outset, and the accuracy of this approximation can be further improved by additional trimming in Figure 4.2.5. Through the knowledge of this error, one can verify in advance the magnitude of the approximation error.

zu d) Influence of Air Humidity on the Varistor

The core of a varistor consists of silicon carbide, mixed with binders exhibiting hygroscopic properties. Therefore, the varistor can in principle be influenced by air humidity.

From a practical standpoint, the influence of air humidity on the computing accuracy of the coordinate converter could be eliminated by encapsulating the varistor in small aluminum blocks (which simultaneously serve as “heat bodies” for the thermostat).

[Page 50 — p. 43 of dissertation]

zu e) Aging Effects

To investigate aging effects, 30 varistors of various types were subjected to long-term aging tests. To this end, the varistors were first measured at 20 µA (at a voltage of 5 V) to determine the vector magnitude, and were then aged for six months at room temperature.

Thereafter, 25 of the varistors were subjected to a selection process, and the coordinate converter was built using the remaining ones. With a Bereitschaftszeiger (readiness indicator) it is possible to monitor the varistors for aging effects. The aging process was subsequently continued for a further six months, and the components were then re-measured.

From the measurement, it is clear that for input voltages greater than 0.5 V, the change of the middle value lies between ±0.5 V, and that the standard deviation on the components is at ±0.5 %.

Figure 5.2: Histogram of the varistors shows the count of varistors plotted against U_a (V) in the range 0.5 to 5.5 V, comparing:

Upper plot: before pre-selection (unprocessed varistors)
Lower plot: after pre-selection (selected varistors)

The visible improvement in the distribution of varistor values after the selection process is apparent. The characteristic change also becomes more visible, as the number of components within the main range increases noticeably through the selection process.

[Page 51 — p. 44 of dissertation]

(In order to improve the readability, the interval between 0 and 1 was enlarged, and 1 mark was placed at the ordinate.)

During the period the non-pre-selected varistors showed a change in average value between −5.5 and +5.5 %, while the pre-selected varistors showed an average change of ±0.5 %.

zu f) Dynamic Behavior of the Varistors

When a varistor is applied with an AC voltage, it can exhibit hysteresis as shown in Figure 5.3, where the dashed line strongly exaggerates the effect. The cause of this effect appears, according to the literature, to be at least partly attributable to thermal lag effects at local hot spots between the individual grains of silicon carbide, or to the formation of space-charge capacitances at the grain contact areas of the silicon carbide crystal structure.

To investigate the influence of the hysteresis effect on the computing accuracy of the coordinate converter, the voltage-current characteristics of the varistors were recorded with an oscilloscope.

[Page 52 — p. 45 of dissertation]

Varistor types tested as a function of frequency showed the following results:

At equal signal frequency, the hysteresis is less pronounced for low-impedance (higher-conductance) varistor types. The hysteresis is therefore smaller for the varistors used in the coordinate converter at frequencies up to 2.5 kHz. The broadening of the hysteresis curve begins at a frequency of about 50 Hz. The varistor range then remains approximately constant at this width. As the signal frequency increases further, the varistor takes on an increasingly ohmic character.
For the varistors used in the coordinate converter, at frequencies from 2.5 to 5000 Hz (2502–5000 Hz) the hysteresis is always negligible. At a frequency of around 50 Hz (50 Hz range), the hysteresis can be seen quite clearly — when the linearization circuit according to Figure 4.2.5 is used — and it becomes very strongly pronounced. The varistor thus takes on an increasingly ohmic character as the signal frequency is increased, and for a frequency range of 0 to 2 kHz it can be practically neglected.
In anti-parallel circuit connection (two varistors wired back-to-back in the correction circuit according to Figure 4.2.5, which is the case here), the hysteresis effect is entirely suppressed, and it can be neglected for a frequency range of 0 to 2 kHz.

5.2 Measurement of the Static and Dynamic Errors of the Coordinate Converter

5.2.1 Static Errors

For the determination of the static errors of the coordinate converter, a fine grid of input voltage points x and y was applied and for each of these points

[Page 53 — p. 46 of dissertation]

the vector magnitude r and the polar angle φ were determined and compared with the theoretical setpoint values.

By connecting individual points with the same relative error, an error contour map was obtained, as shown in Figures 5.5 and 5.6.

It can be seen that for input voltages greater than 0.5 V the maximum relative error lies between ±0.5 % and ±0.6 %, and for the polar angle at ±0.7 %.

5.2.2 Dynamic Errors

In Figure 5.7 the frequency response of the vector magnitude output is shown, along with the dynamic errors for various input voltages. The cause of the small output signal for high input voltages is primarily due to the switching behavior of the absolute-value rectifiers and the pulse response time of the various computing stages.

To determine this error, a rectangular signal was applied to the computing input as a right-angle test pulse.

Figure 5.4 shows the rise times of the output voltage U_φ for various input voltage conditions.

The short spikes during the switching of U_φ arise because at the switching instant the divider and linearization amplifier temporarily experience a switching transient.

[Page 54 — p. 47 of dissertation]

Figure 5.4: Rise times of the output voltage U_φ

Three oscilloscope traces are shown, each depicting the output waveform under different input conditions:

Top trace: x = y = rectangular voltage, 20 V_ss, 2 kHz
Rise time ≈ 14 µs; slopes ≈ 0.4 V/µs; plateau level ≈ 9 V; period ≈ 500 µs
Middle trace: x = 0; y = rectangular voltage, 20 V_ss, 2 kHz
Rise time ≈ 1 µs; slopes ≈ 6.7 V/µs; plateau level ≈ 9 V
Bottom trace: x = rectangular voltage, 20 V_ss, 2 kHz; y = 0
Slopes ≈ 0.4 V/µs; plateau level ≈ 9 V (no transition spike visible)

5.2.3 Noise

In the following table the noise components of the voltages U_r and U_φ are listed for various input voltages:

U_x (V)	U_y (V)	U_r (mV_ss)	U_φ (mV_ss)
0	0	20	—
0.5	0.5	8	20
1	1	6	5
10	0	1	1
0	10	1	0.3
10	10	0.2	0.2

[page 55: figure only]

Fig. 5.5: Computing circuit for the vector magnitude r — computational error (per mill) as a function of the input voltages U_x and U_y, referred to the full-scale value (U_y max = 10.00 V).

[page 56: figure only]

Fig. 5.6: Computing circuit for the polar angle φ — computational error (per mill) as a function of the input voltages U_x and U_y, referred to the full-scale value (U_y max ≈ 7.00 V).

[page 57: figure only]

Fig. 5.7: Frequency response of the vector-magnitude measure.

[page 58: figure only]

Fig. 5.8: Frequency response of the vector-angle measure.

6. Comparative Survey of the Individual Computing Methods Described — Evaluation Criteria

In order to assess the advantages and disadvantages of the deployment possibilities, the analog and digital computing methods mentioned by others, as well as the electronic coordinate-conversion methods, equal comparison criteria must be established so that all computing methods may be evaluated by means of a common tabular overview.

To present the characteristic properties of all computing methods in a tabular overview and to carry out a comparison, the following criteria are included in the comparison table along with several additional technical features, since these are relevant for many applications and represent important selection parameters.

With respect to the specification of concrete numerical values for computing speed and computing accuracy, restraint has been exercised. These values are, on the one hand, very application-specific and, on the other, subject to particularly pronounced further development in the field of component technology, so that too precise specifications would rapidly become outdated. Since this further development affects the methods cited in roughly equal measure, it may be assumed that the basic thrust of the overview remains valid.

[page 60: table — comparative survey, columns 1–2]

The table below presents the comparative survey. The column headers and row entries describe the following criteria (read from the rotated/landscape table layout):

Row criteria (left column):

Computational method
Analog method (for example, with resolvers)
Analog, electro-mechanical
Coordinate transformation
Analog-electronic
Speed
Accuracy
Cost

Columns of the table compare the various computing methods against these criteria.

(The full table spans pages 60–61 and is reproduced below in reconstructed form.)

Criterion	Analog Electromechanical (e.g., Resolvers)	Analog Electronic (this work)
Computational speed	Limited by mechanical inertia; relatively slow	Very high; limited only by electronic bandwidth
Computational accuracy	Moderate; dependent on mechanical tolerances and resolver quality	High; error < a few per mill over the operating range
Operating effort	Significant; mechanical components require maintenance	Low; purely electronic, maintenance-free
Adjustability	Limited; fixed by mechanical design	Good; adjustable via potentiometers/component selection
Cost	High for precision resolvers	Moderate; standard electronic components
Suitability for parallel operation	Limited	Good

[page 61: table continued]

(Continuation of the comparative table from page 60.)

Criterion	Digital Methods (general)	Digital, with special hardware	Remarks
Computational speed	Moderate to high, depends on algorithm and clock rate	Very high with dedicated hardware	Continuously improving with component technology
Computational accuracy	Quantization-limited; typically high with sufficient word length	Same as digital general	Word-length dependent
Operating effort	Programming required; conversion circuitry (A/D, D/A) needed	Dedicated hardware; more complex to implement
Adjustability	High; software-defined	Moderate; hardware-fixed
Cost	Moderate to high (converters, processor)	High
Suitability for parallel operation	Limited without additional hardware	Good with parallel hardware

7. Application Examples for the New Coordinate Converter

7.1. Determination of Head Acceleration in an Anthropomorphic Phantom (Free Fall)

The possible areas of deployment for the coordinate converter developed here are to be illustrated by means of the following examples. The first example concerns the investigation of crash-protection devices using an anthropomorphic phantom, i.e., a humanoid dummy. This example serves to highlight the advantage that the new device offers compared to a digital computer when dealing with it.

For laboratory investigations into the assessment of the danger of internal head injuries occurring during a crash, a phantom head is used here as an example. Image 7.1 a shows the practical implementation of such an anthropomorphic phantom as developed at the Technical Testing and Research Institute for the purpose of simulating human head motion during impact. As can be seen in the figure, the head of the phantom is transferred to a freely falling body during the experiment.

The experimental setup requires the following two simplifying assumptions:

The phantom head (= dummy head) is treated as a rigid body. This means that the distance between reference point A and point B remains constant during the fall.
The center of mass of the phantom head (= reference point A) moves in a plane. The trajectories of points A and B thus lie within a plane, i.e., in the plane of a fixed Cartesian coordinate system.

[page 64]

Under these assumptions, the accelerations of points A and B can be written as (Fig. 7.1 a):¹

Fig. 7.1 [diagram showing rigid body with points A and B in a Cartesian x-y coordinate system, with velocity and acceleration vectors labeled]

$$\boldsymbol{b}B = \boldsymbol{b}A + \dot{\omega},\hat{\boldsymbol{r}}{BA} - \omega^2,\boldsymbol{r}{BA} \tag{7.1}$$

Where:

r̂_BA … Transverse vector to r_BA; it is obtained by rotating r_BA by π/2 in the mathematically positive sense
ω … Angular velocity of the rotation of B about A
ω̇ … Angular acceleration

[page 65]

The acceleration magnitudes |b_A| and |b_B| give the magnitudes of the four Cartesian acceleration components; these are required from the four direction cosines of the acceleration vectors. For the assessment of the danger of head injury, the angular velocity ω and the angular acceleration ω̇ are required. From equation (7.1), the following holds analogously for the relative acceleration b_BA of point B with respect to point B [sic; B with respect to A]:

$$\boldsymbol{b}{BA} = \dot{\omega},\hat{\boldsymbol{r}}{BA} - \omega^2,\boldsymbol{r}_{BA} \tag{7.3}$$

This relative acceleration can be decomposed into a normal component and a tangential component (Fig. 7.1 b):

$$\boldsymbol{b}‘{BA} = \dot{\omega},\hat{\boldsymbol{r}}{BA} + \boldsymbol{b}_{BA} \tag{7.4}$$

If the biaxial acceleration transducers in the phantom head have their directions aligned with b_A and b_B, they yield the following, so that for the angular velocity and the angular acceleration:

[page 66: figure only]

Fig. 7.2: Block diagram of the measuring arrangement for the coordinate converter.

The diagram shows the signal flow from:

Charge amplifiers (Ladungsverstärker) for the acceleration signals a_x, a_y, a_x’, a_y’
Through adder/subtractor stages (Rechen-/Additionswerk)
Into coordinate transformation stages (Koordinatenwandler) and squarer/summer stages (Quadrierer, Summierer)
To output stages providing ω̇ = k₁(b_t − b_x) and ω² = k₂(b_n − b_y)
Finally to a registration device (Registriergerät) and a light-beam oscillograph (Lichtblassillograph [sic; Lichtstrahloszillograph])

[page 67]

$$\dot{\omega}’ = \frac{b_{xx}}{|\boldsymbol{r}_{BA}|} \tag{7.5}$$

$$\omega^2 = \frac{b_{yy}}{|\boldsymbol{r}_{BA}|} \tag{7.6}$$

In Fig. 7.2 the block diagram of the measuring arrangement is shown, as it is used for the evaluation of the KFZ [motor-vehicle] crash data. Fig. 7.3 shows a typical excerpt from a recording obtained with this arrangement.

Fig. 7.3: Recording of a drop experiment on a KFZ [motor-vehicle] crash test facility.

[oscillograph trace showing time-history records of the acceleration and angular-rate signals during a crash-drop experiment]

[page 68]

This oscillograph recording allows one to read individual points as an analog online pre-processing of the measured data. This is far more convenient than a later point-by-point digital evaluation.

The most important advantage is, however, the possibility of observing exactly the same process simultaneously with the recording of the raw data, so that the computation results are simultaneously available at the time of the measurement. This permits a substantially easier qualitative assessment of the recorded motion sequences.

In addition to this temporal coordination there exists the possibility of extracting various items of information simultaneously from the curve of the raw signal itself — for example, the appearance of a KFZ [motor vehicle] joint member during the spray-velocity signal’s time history, which characterizes the interior of the joint member by the so-called “false bottom.”

As an additional auxiliary means, the analog computation is available in the form of electrical analog quantities, so that the measured-value processing can be stored on magnetic tape.¹

[page 69]

Magnetic recording, in turn, permits — in addition to data storage — the use of further auxiliary means for measured-value processing, such as time compression, time expansion, transformation of the amplitude scale between recording and playback, and so on.

In conclusion it can therefore be stated that, for analog, time-dependent measured data, it is generally more advantageous to carry out the measured-value processing likewise in analog form.

This finding is to be substantiated by a further application example.

7.2. Analysis of Mechanical Stresses in a Loaded Structure — Coordinate Transformation Using Strain Gauges

Mechanical stresses have the property that they can be expressed as a second-order tensor and thus possess direction-dependent properties.¹

As in the case described in Section 7.1, quantities are involved here that are bound to a particular direction — in other words, they depend on the orientation of the measuring sensor relative to the workpiece.

For the determination of these quantities, semiconductor strain gauges are particularly suitable. These can be mounted in arrangements of two or three gauges inclined at fixed angles to one another. To determine the principal strains and their directions, a rosette arrangement is used, consisting of three strain gauges mutually inclined at 45°, as shown in Fig. 7.4. In this arrangement, the output signals ε_a, ε_b, ε_c are the strains measured along three directions inclined at 45° to one another. From these, the principal strains ε₁ and ε₂ and the principal directions are to be computed.

[Fig. 7.4: diagram of a 45° strain-gauge rosette, showing the three gauge elements labeled a, b, c on the measurement surface]

[page 71]

Relations:

$$\varepsilon_{1,2} = \frac{\varepsilon_a + \varepsilon_b}{2} \pm \frac{1}{\sqrt{2}},\sqrt{(\varepsilon_a - \varepsilon_b)^2 + (\varepsilon_c - \varepsilon_b)^2} \tag{7.2.1}$$

$$\alpha = \frac{1}{2},\arctan\frac{2,\varepsilon_b - \varepsilon_a - \varepsilon_c}{\varepsilon_a - \varepsilon_c} \tag{7.2.2}$$

from which the principal strains ε₁, ε₂ and the principal directions are computed.

From the principal strains ε₁, ε₂ the principal normal stresses σ₁ and σ₂ can be determined using Hooke’s law:

$$\sigma_1 = \frac{E}{1 - \mu^2},(\varepsilon_1 + \mu,\varepsilon_2) \tag{7.2.3}$$

$$\sigma_2 = \frac{E}{1 - \mu^2},(\varepsilon_2 + \mu,\varepsilon_1) \tag{7.2.4}$$

The constants E and μ are material parameters and are designated “modulus of elasticity” and “Poisson’s ratio,” respectively.

The coordinate converter described in this work can be used to compute the square-root expression in equation (7.2.1) when the expressions (ε_a − ε_b) and (ε_c − ε_b) are interpreted as the Cartesian coordinates x₁ and y₁ of a vector:

$$x_1 = (\varepsilon_a - \varepsilon_b) ;;\qquad y_1 = (\varepsilon_c - \varepsilon_b) \tag{7.2.5}$$

[page 72]

Furthermore, the angle α in equation (7.2.2) can be determined when one uses the coordinate converter with the input quantities (2ε_b − ε_a − ε_c) and (ε_a − ε_c):

$$x_2 = (\varepsilon_a - \varepsilon_c) ;;\qquad y_2 = (2,\varepsilon_b - \varepsilon_a - \varepsilon_c) \tag{7.2.6}$$

According to (7.2.5) and (7.2.6) it appears at first not possible to let the computation of the square-root expression in (7.2.1) and of the angle α in (7.2.2) from the coordinate converter run simultaneously. By expanding the brackets in (7.2.1), however, one readily recognizes that the expression

$$\sqrt{(\varepsilon_a - \varepsilon_b)^2 + (\varepsilon_c - \varepsilon_b)^2}$$

is identical with

$$\frac{1}{\sqrt{2}},\sqrt{(\varepsilon_a - \varepsilon_c)^2 + (2,\varepsilon_b - \varepsilon_a - \varepsilon_c)^2}$$

Equations (7.2.1) and (7.2.2) can therefore also be written in a slightly modified form:

$$\varepsilon_{1,2} = \frac{\varepsilon_a + \varepsilon_c}{2} \pm \frac{1}{2},\sqrt{x^2 + y^2} \tag{7.2.7}$$

$$2,\alpha = \arctan\frac{y}{x} \tag{7.2.8}$$

with

$$x = \varepsilon_a - \varepsilon_c ;;\qquad y = 2,\varepsilon_b - \varepsilon_a - \varepsilon_c \tag{7.2.9}$$

Page 73 — Figure 7.3 (Block diagram)

[page 73: figure only]

Fig. 7.3: Block diagram of the measuring arrangement for the experimental analysis of the biaxial stress state of materials.

The block diagram shows the complete measurement setup with the following major functional groups, from left to right:

Inputs (Eingabe der Meßgrößen / Input of the measured quantities): Three strain-gauge bridge outputs delivering the measured strains ε_a, ε_b, ε_c, together with a zero-balancing (Nullabgleich) stage and an oscillator (Oszillator).
Computing stage 1 (Rechenstufe 1): Processes the three bridge signals to form the input quantities required by the coordinate transformer.
Coordinate transformer (Koordinatenwandler): Converts the intermediate quantities into polar form, yielding the magnitude and direction of the principal strains.
Computing stage 2 (Rechenstufe 2): Derives the principal strains ε₁ and ε₂ (and, by extension, the principal normal stresses σ₁ and σ₂) from the transformer outputs according to Eqs. (7.2.7), (7.2.8), (7.2.3), and (7.2.4).
Output (Registriergerät / Recording instrument): Displays or records the final results, including the stress–strain analysis outputs.

Left-hand side annotation columns list the relevant equations:

Hauptdehnungsgleichungen (Principal-strain equations): ε₁ = ½(ε_a + ε_c) + ½√[(ε_a − ε_c)² + (2ε_b − ε_a − ε_c)²] ε₂ = ½(ε_a + ε_c) − ½√[(ε_a − ε_c)² + (2ε_b − ε_a − ε_c)²]
Hauptspannungsgleichungen (Principal-stress equations): σ₁ = E/(1−ν²) · (ε₁ + ν·ε₂) σ₂ = E/(1−ν²) · (ε₂ + ν·ε₁)
Hilfsgrößen (Auxiliary quantities) for the coordinate transformer: x = ε_a − ε_c y = 2ε_b − ε_a − ε_c r = √(x² + y²) [magnitude] tan 2φ = y/x [direction angle]

Page 74

The magnitude and direction of the principal strains ε₁ and ε₂ can therefore be determined by means of the coordinate transformer in a single computation pass.

Block diagram 7.4 shows the complete measurement arrangement for the experimental analysis of the biaxial stress state of materials.

Two further computing stages are also identifiable in the figure. The first stage derives, from the measured quantities ε_a, ε_b, ε_c delivered by the strain-gauge bridges, the input signals required by the coordinate transformer in accordance with Eq. (7.2.9).

The second computing stage then determines, according to Equations (7.2.7), (7.2.8) and (7.2.3), (7.2.4), the principal strains ε₁ and ε₂ and, respectively, the principal normal stresses σ₁ and σ₂.

Page 75

8. Summary

For the numerical processing of physical quantities of a vectorial character — as required, for example, for position measurement and for the transformation of stress states expressed in polar coordinates — it is necessary to transform the Cartesian coordinates of the measured quantities into polar coordinates. The solution is thus reduced to the realization of a simple coordinate transformer.

The examination of this computation with a known Pythagorean function shows that its realization using a simple coordinate transformer is possible. The linearization of a parabolic function by means of a varistor and a subsequent linearization stage enables the use of a variational (Variationsrechnung) approach.

Extended measurements over a time period of two hours with a professionally built computer have shown that the measurement accuracy is significantly better than that of comparable impulse-based computation methods.

The switching transients (Schaltstörungen) occurring in the new computer are suppressed by means of feedback-controlled suppression circuitry.

Finally, typical application examples of the coordinate transformer in voltage processing are presented to demonstrate its advantages in computing.

Page 76

9. Bibliography (Literaturverzeichnis)

/1/ ADLER H.: Elektronische Analogrechner, VEB Deutscher Verlag d. Wissenschaften, Berlin 1968

/2/ AMELING W.: Aufbau und Wirkungsweise elektronischer Analogrechner, Verlag F. Vieweg u. Söhne, Braunschweig 1963

/3/ AMENDL A.: Die dynamischen Fehler polygonal angenäherter quadratischer Detonatoren, AEÜ Ges. 12 (1961), Lüftfahrt, S. 166–170

/4/ APPUN W.: Schaltungen der Analogrechentechnik, Verlag Oldenbourg, München–Wien 1966

/5/ BELSTERLING C.A.: How to Fake a Function Generator, Electronics Design, Dec. 1955

/6/ BRONSTEIN I.N., K. A. SEMENDJAJEW: Taschenbuch der Mathematik, Elektronik-Verlag B.G. Teubner

/7/ BROWN K., P.M. WALESH: The Design of Function Generators Using Silicon Carbide Nonlinear Resistors, Electronic Engineering March 1956, S. 154–157

/8/ Datenblatt des Multifunktions-Bausteines Typ 433, Fa. Analog Devices, Norwood, Mass.02062

/9/ Datenblatt des Multifunktions-Bausteines Typ 4301, Fa. Burr-Brown Research Corporation, Tucson, Arizona 85734

/10/ Datenblätter Voltage Dependent Resistors, Philips Pocketbook 1972, Eindhoven

Page 77

/11/ GILOI W., H. LAUBER: Analogrechnen, Springer Verlag, Berlin–Göttingen–Heidelberg 1963

/12/ KLINGBOD D.: Wie weit mit einem Mikroprozessor?, Elektronik 1974, Nr. 10, S. 379–382

/13/ MARINO VINHAS D.: A High Resolution Sin/Cosine Function Generator without Computation, Electronic Engineering, Feb. 1966, S. 102–106

/14/ REINBOLD D., U. KALICH: Analogrechnen, Bibliographisches Institut, Mannheim–Wien 1966

/15/ KIPPLE K.H., H.P. BRAESS: Rationale Multiplizierer-Speicher und Division mit Festwertspeicher, Elektronik 1973, Nr. 11, S. 375–378

/16/ KAISER B.: Bildung spezieller nichtlinearer Kennlinien für Analogrechner, Elektrotechnische Anlagen 1960, Nr. 3, S. 134–140

/17/ KLEPPAHN J.: Der Polarkoordinaten-Oszillograph, Elektronik 1963, Nr. 3, S. 73–75

/18/ KLEY A., H. REIN: Funktionsgeberund Multiplizierer für den Halbleiter, Telefunken-Zeitung 39 (1966), S. 40–65

/18/ KLEY A., H. REIN: Funktionsgeber und Multiplizierer, Funken-Zeitung 39 (1966), S. 52–59

/20/ KOCHER G.: Elektronische Kurvenberechnungen bei der Darmstimmung, Elektronik 1965, Nr. 11, S. 21–24; Nr. 2, S. 57–58

Page 78

/21/ KOSS G.A., KOSS P.H.: Elektronische Analogrechenmaschinen, Berliner Union, Stuttgart 1960

/22/ KOVACH L.D., W. COMLEY: Transfer Functions with Thyrite, IRE Transactions on electronic computers, Volume EO 7, June 1958, S. 91–98

/23/ FAHRENBACH A.: Der Kfz-Prozessor in der Fahrzeugelektronik, Elektronik 1979, Nr. 2, S. 66–69

/24/ FAHRENBACH A.: Analogrechnen in Maschinen- und Hochschule, BI-Hochschultaschenbücher 194/194a, Bibliographisches Institut, Mannheim–Wien 1969

/25/ MELTING H., G. THIELE: Elektronisches Messen nichtelektrischer Größen, Philipps Technische Bibliothek, Wiesbaden 1966

/26/ PARISH V.K., V.K. SAVELYEV, I.K.TSCHERKESSOW: Nichtlineare Halbleiterbausteine, Akademie-Verlag, Berlin (in press)

/27/ Programm-Guide 5116-Prozessoren, Fa. MOSTEK, S. 194–390

/28/ NORTHEIMER F.: Dehnungsmessungen und ihre Auswertung, Springer Verlag, Berlin 1966

/29/ SCHILLER F.: Digitaler Logarithmierer, Diplomarbeit am Institut für Elektrische Technik der TU Wien

Page 79

/30/ DOHRENDORF H.: Toleranzen und Alterung von Thermistoren und Varistoren, radio und Fernsehen 19 (1962), S. 595–597

/31/ SCHREIER P.: Herstellung nichtlinearer Charakteristiken unter Verwendung von Varistoren, Mitteilung aus dem Institut für Physik an der KfK Ilmenau, 1960

/32/ SCHWARZ H.: Elektronische Analogrechner, Technische Verlagshandlung, Stuttgart 1962

/34/ RHEINGOLD P.: Approximations of sin, cos, arctan, using Non-Integral Registers, Analog Dialogue Vol. 6, Nr. 3, S. A-5, Fa. Analog Devices Inc., Norwood, Massachusetts

/35/ RHEINGOLD P.: Root-Sum-of-Squares-Circuits with the Model 433, Analog Dialogue Vol. 6, Nr. 3, S. 3, Veröffentlichungen der Fa. Analog Devices Inc., Norwood, Massachusetts, U.S.A.

/36/ SIEMER H.: Dual-Bit-Mikroprozessor-Konzept M6800, Elektronik 1974, Nr. 10, S. 387–390

/37/ SLATTENSECK A., W. TAUFKIRCHEN, H. BENEDIKTER: Measurement of Phantom Input in High-Eighteenth Stage, Proc. of Eighteenth Stage on Phantom Test in Safety Testing, Proc. of Eighteenth Stage of Phantom Ref. in Safety Testing, Ann Arbor, Michigan, 1974

Page 80

/38/ STANLEY FIFER: Analogue Computation, Vol. 1–3, Mc. Graw Hill Book Co., New York–Toronto–London 1961

/39/ VARCHMIN J.U.: Funktionsgenerator mit programmierbaren Festwertspeichern, Elektronik 1975, Nr. 2, S. 70–72

/40/ WEINMANN A.: Digitale Drehzahlregler, Elin Zeitschrift 16 (1964), H. 1, S. 1–10

/41/ WINKLER H.: Elektronische Analogieanlagen, Akademie-Verlag, Berlin 1963

Page 81 — Figure 4.4 (Type 1 amplifier configuration)

[page 81: figure only]

Fig. 4.4: Amplifier circuit, Type 1 — Series connection of a fixed resistor and a varistor in the input branch of the operational amplifier.

The figure shows a family of transfer characteristics (output voltage U_a vs. input voltage U_e) for a varistor in series with a fixed resistor R in the feedback input path of an inverting operational amplifier. The curves are parameterized by the fixed-resistor value (R = 100 kΩ, 150 kΩ, 200 kΩ, 220 kΩ and others are readable). The varistor parameters are:

m = 0.39
k = 328

The characteristics are plotted over the range U_e = −10 V to +10 V, with U_a spanning approximately −10 V to +10 V. The nonlinear shaping introduced by the varistor is clearly visible as a compression of the output for large input magnitudes. A small schematic inset (top right) shows the circuit topology: R₁ (series fixed resistor) and a varistor symbol in the input branch, with the operational amplifier in inverting configuration and feedback resistor R₂.

Page 82 — Figure 4.4 (Type 2 amplifier configuration)

[page 82: figure only]

Fig. 4.4: Amplifier circuit, Type 2 — Parallel connection of a fixed resistor and a varistor in the input branch of the operational amplifier.

The figure shows transfer characteristics for the same varistor (m = 0.39, k = 328) but now connected in parallel with the fixed resistor R in the input branch of the inverting operational amplifier. The family of curves is parameterized by fixed-resistor value. The effect of the parallel connection is a different nonlinear characteristic shape compared with Type 1. The inset schematic shows the parallel R–varistor input circuit with the inverting operational amplifier and feedback resistor.

Page 83 — Figure 4.4 (Type 3 amplifier configuration)

[page 83: figure only]

Fig. 4.4: Amplifier circuit, Type 3 — Series connection of a fixed resistor and a varistor in the feedback branch of the operational amplifier.

The figure shows transfer characteristics for the varistor (m = 0.39, k = 328) placed in series with the fixed feedback resistor of the inverting operational amplifier. The family of curves is parameterized by fixed-resistor value. The inset schematic shows R₁ in the input branch and a series R₂–varistor combination in the feedback path.

Page 84 — Figure 4.4 (Type 4 amplifier configuration)

[page 84: figure only]

Fig. 4.4: Amplifier circuit, Type 4 — Parallel connection of a fixed resistor and a varistor in the feedback branch of the operational amplifier.

The figure shows transfer characteristics for the varistor (m = 0.39, k = 328) placed in parallel with the fixed feedback resistor of the inverting operational amplifier. The family of curves is parameterized by fixed-resistor value. The inset schematic shows R₁ in the input branch and a parallel R₂–varistor combination in the feedback path.

Page 85 — Photograph

[page 85: figure only]

Fig. 4.5: Practical realization of the coordinate transformer (photograph).

The photograph shows the physical prototype of the coordinate transformer as constructed. The unit is a compact, bench-top instrument with a metal chassis. Visible on the front panel are several potentiometers, switches, and control knobs as well as signal connectors. The internal construction shows multiple printed-circuit boards mounted within the chassis.

Page 86 — Figure 4.6 (Schematic: complete circuit of the coordinate transformer — sheet 1)

[page 86: figure only]

Fig. 4.6: Complete circuit diagram of the coordinate transformer — partial schematic (Plate A).

The schematic covers the left-hand portion of the full circuit and includes the following functional blocks, annotated on the diagram:

Thetaroder (θ-rotor) / oscillator section (upper left): generates the reference sinusoidal signals.
Spannungsmodul (voltage module) (left-center): power supply and reference-voltage regulation circuits with decoupling capacitors (labeled: ±15 V supply rails).
Quadrierer (squarers) 1 and 2 (center and lower): two squaring circuits (each based on operational amplifiers with varistor nonlinearity), implementing the x² and y² computation steps.
Addierer (adder): sums the squared quantities x² + y².
Varistor–Verstärker (varistor amplifier): performs the square-root extraction by exploiting the varistor characteristic.

Interconnections between stages are shown with labeled signal lines. Component values (resistors in kΩ, capacitors in μF) are annotated throughout. Power-supply connections (±15 V, 0 V) are marked at each active stage. The plate designation is Platte A.

Page 87 — Figure 4.6 (Schematic: complete circuit — sheet 2)

[page 87: figure only]

Fig. 4.6: Complete circuit diagram of the coordinate transformer — partial schematic (Plate B).

This schematic continues the circuit from Plate A and shows:

Spannungsspeicher (sample-and-hold / voltage store): retains the peak value of the transformed signal.
Absolutwertbildner (absolute-value circuit): takes the absolute value of the input signal prior to further processing, implemented with operational amplifiers and diodes.
Absolutwert-Verstärker (absolute-value amplifier): amplifies the rectified signal.
Koordinatenwandler (coordinate transformer core) (right section): the central functional block that produces the polar output r = √(x² + y²), using the chain of squarers, adder, and varistor amplifier from Plate A, together with the arctangent computation for the angle φ.

Labeled signal nodes connect the two plates. Component values are annotated; diode types and transistor types are marked where used. The plate designation is Platte B.

Page 88 — Figure 4.8 (Schematic: linearization subsystem)

[page 88: figure only]

Fig. 4.8: Schematic of the linearization subsystem (Bild 4.8: Schaltplan des Linearisierungssystems).

The schematic shows the linearization circuit used to correct the nonlinear varistor characteristic, comprising:

Platte 1 (Plate 1): contains the varistor-based piecewise-linearization stages.
Quadrantenwandler (quadrant switch/converter): routes the signal to the appropriate linearization segment depending on the sign (quadrant) of the input, implemented with analog switches or diodes.
Addierer (adder): sums the piecewise-linear segment contributions.
Lineare Spannungsteilergenauigkeit (linear voltage-divider accuracy stage): final trimming and scaling amplifier to produce the corrected linear output.

Signal flow is left to right; power connections (±15 V) are marked. All resistor values are given in kΩ; capacitor values in μF or pF where applicable.

Page 89 — Figure 4.9 (Schematic: sinusoidal generator and saw-tooth generator)

[page 89: figure only]

Fig. 4.9: Schematic of the sinusoidal-signal generator and triangular/saw-tooth generator (Bild 4.9: Schaltplan des Sinusgenerators und Sägezahngenerators).

The upper portion of the schematic (labeled SINUSOID-GENERATOR / TESTSINUSGENERATOR) shows the generation of the sinusoidal reference signal, implemented with:

Three operational amplifiers (A001, A002, A003) configured as an active RC oscillator loop.
Frequency-determining RC networks (component values annotated).
Amplitude stabilization elements.

The lower portion (labeled SINUS-COSINUS-GENERATOR) shows the derivation of a quadrature (sin/cos) pair from the main oscillator, and a separately labeled block Platte I for the associated supply and reference circuitry.

Signal annotations include x_test, y_test (test-input signal lines). All operational amplifier types are identified; resistor values in kΩ, capacitor values labeled.

Page 90 — Figure 4.10 (Schematic: thermal compensation circuit)

[page 90: figure only]

Fig. 4.10: Schematic of the thermal compensation circuit (Bild 4.10: Schaltplan des Temperaturkompensationssystems).

The schematic shows the temperature-compensation subsystem for the coordinate transformer, which corrects for thermistor and varistor parameter drift with temperature. The circuit consists of:

Platte A / Platte B (left side): bridge circuits with thermistors (NTC elements) used as temperature sensors, providing error signals proportional to temperature deviation.
MD (multiplier/divider stages): three or four operational-amplifier-based multiplier stages, implementing the compensation correction factors.
HEIZUNGS-SPANNUNG (heating voltage) input (top left): the supply input from which the compensation signal is derived.
Spannungsteiler (voltage dividers): trim potentiometers for factory calibration of the compensation characteristic.
Output correction signals are fed back to the relevant gain stages in the main coordinate transformer circuit.

All component values (resistors, capacitors, thermistor types) are annotated. Power supply rails ±15 V and reference nodes are labeled throughout.

[page 91: figure only]

Figure A4.11: Circuit diagram — Power Supply Unit (Netzteil)

The schematic shows the power supply section (Netzteil) implemented on Board 6 (Platte 6). The circuit provides the following regulated output voltage rails: +22 V, +15 V, +5 V, −15 V, −22 V, and −5 V.

Key components:

IC 601 (type SGL 8501) — voltage regulator IC for the positive supply rails, supported by filter capacitors (10 µF/25 V) and a 1 Ω resistor on the input side.
IC 703 (type SL 9 592) — voltage regulator IC for the +5 V and −5 V rails, with a 10 µF/5 V bypass capacitor (C702) on the output and a 4700 µF/16 V bulk filter capacitor (C701) on the input.
GL 601 (0.63 AT fuse) and GL 701 (14 AT fuse) — bridge rectifier assemblies (each rated 0.63 A and 14 A respectively) supplying rectified DC to the regulator stages.
GL 702 — additional rectifier assembly associated with the ±5 V section.
LED indicator components with current-limiting resistors (labeled LED S), providing power-on indication for the regulated rails.
A 0.63 AT mains fuse on the primary (AC input) side.
AC input connections at 16 V~ (×2) and 19 V~ tapped from the power transformer secondary windings.
Transistors (TIP 42 and TIP 41 types visible) serving as series-pass elements in the regulator circuits.
Electrolytic filter capacitors of 10 µF/25 V at various regulator inputs/outputs.

[page 92: figure only]

Figure A4.12: Circuit diagram — Signal Voltmeter Display Section

The schematic shows the signal voltmeter (Signal-Voltmeter) display board, implemented on Board 7 (Platte 7). This is a dense, multi-IC circuit driving a numeric display from the analog signal voltage.

The circuit incorporates numerous ICs arranged in a parallel array (visible as a grid of identically outlined packages), interconnected by an extensive bus structure with multiple resistors and signal lines. Input connections enter from the left side of the board; display output connections exit at the right (labeled “Signal-Voltmeter”). Multiple feedback and control lines are routed between the IC array and the display driver stages. Decoupling and precision resistor networks are distributed throughout the board layout.

[page 93: figure only]

Figure A7.1: Phantom head and drop machine for the examination of automotive windshields

Photograph showing laboratory apparatus used for windshield impact testing. A drop machine (Fallmaschine) is mounted vertically, and a phantom head (Phantomkopf) — a standardized impactor representing a human head — is positioned for drop-impact testing against automotive windshields (KFZ-Windschutzscheiben). The equipment is installed in a laboratory setting with visible structural support framing and lighting. The phantom head is visible in the foreground suspended from the drop-machine mechanism, which guides its controlled fall onto the test specimen.

[page 94: figure only]

Figure A7.2: Phantom head — rear construction

Photograph showing two views of the phantom head (Phantomkopf): the upper image presents the rear (interior/structural) side of the phantom head, revealing the mounting hardware and the array of sensor leads or connection rods protruding from the rear face; the lower image shows the front (impact) face of the phantom head as a smooth, rounded cap form. The phantom head is designed to simulate the mass, geometry, and impact characteristics of a human head for standardized windshield penetration and fracture testing.

The following equations are derived, for example, in /26/. ↩ ↩² ↩³