Analog Computers

English translation

← Book details Original PDF →

Digital-Experimentiergerät DEX 100 — Beschreibung

Complete English translation of the original German-language document (37 pages).

Digital Experimentation Unit DEX 100 — Description

[page 1: title page — TELEFUNKEN logo; “Digital-Experimentiergerät DEX 100 — Beschreibung”]

[page 2: colophon — Allgemeine Electricitäts-Gesellschaft AEG-TELEFUNKEN, Fachbereich Anlagen Informationstechnik, 775 Konstanz, Bücklestraße 1–5. Document number DE S … ?, 68. Printed in Western Germany.]

TABLE OF CONTENTS

SectionTitlePage
1.Technical Overview1
1.1.Intended Use1
1.2.Scope of Delivery2
1.3.Technical Data5
1.4.Construction8
1.5.Function9
1.6.Mode of Operation11
1.6.1.Flip-Flops11
1.6.2.Logic Elements12
1.6.3.Amplifiers14
1.6.4.Inverters14
1.6.5.Time-Delay Elements14
1.6.6.Relay Amplifiers15
1.6.7.Switches15
1.6.8.Coupling Field16
1.6.9.Clock Generator17
1.6.10.Power Supply18
2.Operation19
2.1.Commissioning19
2.1.1.Mains Connection19
2.1.2.Switching On19
2.2.Connecting External Equipment19
2.2.1.Parallel Connection19
2.2.2.Connecting Desktop Analog Computers20
2.3.Operation20
2.3.1.Normalize / Clear20
2.3.2.Setting the Flip-Flops20
2.3.3.Clocking21
2.3.4.Setting the Time-Delay Elements21
2.4.Programming22
2.4.1.Layout of the Programming Field22
2.4.2.Layout of the Control Field27
2.4.3.Input and Output of Data30
2.4.4.Special Programming Notes30
3.Circuit Diagrams
3.1.Complete Unit DEX 100
3.2.Flip-Flop FS 6 N
3.3.Amplifier-Inverter V I 6 A
3.4.Time-Delay-Inverter Z I 6 A
3.5.Pulse Generator PG 6 A
3.6.Relay Plug-in Unit S-RS 1
3.7.Conjunction Unit S-KS 1
3.8.Interconnecting Cable RA 741 – DEX 100 Z

1. TECHNICAL OVERVIEW

1.1. Intended Use

The Digital Experimentation Unit DEX 100 serves two purposes. It serves, on the one hand, as an experimentation and training unit for digital circuit technology and, on the other hand, it provides special connection options and control elements for use as a digital add-on for desktop analog computers. For the latter application, additional control functions can be gained by retrofitting plug-in units.

Digital Experimentation Unit

For the most varied fields of practical application, the unit serves for the rapid and flexible construction of digital circuits. It permits the provisional laboratory construction of such a circuit to be elegantly replaced by a programming using the logic elements present. Boolean (switching) algebra or experimentally constructed circuits can thus be realized quickly.

In this way, digital counting and computing circuits, switching networks for coding and decoding, as well as complete control and regulation systems can be realized for purposes of problem analysis and demonstration.

It is likewise possible to integrate the DEX 100 as a complex data-processing system in control chains and regulation systems, since the elements of the DEX 100 can be controlled directly with binary signals and an output via the high-capacity flip-flop and amplifier outputs, or via relay contacts, is possible. In addition, time-dependent control by external clocking is possible.

This results in wide application possibilities in the field of digital information processing. The experimentation unit equipped for this purpose (cf. 2.4.1.) is additionally designated by appending the letter E to the type designation DEX 100.

[page 6 — continuation of section 1.1 and beginning of section 1.2]

In the context of this description, only the digital side of information processing is therefore treated. The unit thus makes it possible to take on the digital side of information processing and to use it as the digital element for sensor processing.

Digital Add-on for Desktop Analog Computers

The most important area of application of the digital experimentation unit as a digital add-on is the connection to TELEFUNKEN desktop analog computers (RA 741 NE, RA 741 and RA 742 series). Thereby and additionally, and more targeted and flexible digital circuit programming is possible, and in particular the following functions can be performed:

For the latter application, a programmed digital Schaltwerk (switching circuit) can be integrated, through a freely programmable digital circuit, in control chains and regulation systems, both as an analogy in analog processing and as a digital data input/output.

1.2. Scope of Delivery

Equipment supplied

Component parts table:

Assembly groupDesignationTypeOrder No.Qty (Exp. Unit)Qty (Dig. Add-on)
Digital Experimentation UnitDEX 100 E55.3044.901-00/E1—
Digital Add-onDEX 100 Z55.3044.901-00/Z—1
Housing55.3044.125-0011
Plug-in units:55.3044.101-0011
Flip-FlopsFS 6 A55.5001.840-0066
Amplifier-InverterVI 6 A55.5001.895-0011
Time-Delay-InverterZI 6 A55.5001.896-0011
Pulse GeneratorPG 6 A55.5001.897-0011
Relay Plug-in UnitS-RS 155.7111.065-00—1
Conjunction UnitS-KS 155.7111.070-001—
Accessories:Programming cord set55.4044.901-1411
consisting of:
Programming cords 12.5 cm long, sorted by color120120
Programming cords 25 cm long8080
Programming cords 50 cm long, red–blue4040
Programming cords 100 cm long, yellow–green1010
Cable holder55.3001.601-00**
Mains cord5 Lv 4941.001-1911
Exchangeable Programming Fieldsfor Experimentation UnitDPF 11055.3044.110-00*)—
for Digital Add-onDPF 11155.3044.111-00—*)
Contact pin set55.3001.715-00*)*)
Interconnecting cableCable RA 741/DEX 10055.3040.620-00—*)

*) available on special order only

1.3. Technical Data

1.3.1. General Data

The binary digits 0 and 1 are represented by the following voltages:

Signal levelNominal valueRange
Input “0”≈ 2 V≈ −2 V *)
Input “1”≥ 10 V≤ 20 V
Output “0”≤ 2 V≥ 0 V
Output “1”≥ 10 V≤ 20 V

Unit load, disjunctive: approx. 50 kΩ against −13.5 V Unit load, conjunctive: approx. 1 kΩ against +13.5 V

*) For the conjunction elements, “0” = contact closure to ground; “1” = open contact.

1.3.2. Flip-Flop

  • Type: clocked RS flip-flop with JK characteristic
  • Input load: 1 unit, disjunctive
  • Output load: 10 units
  • Dynamic data:
    • Max. repetition frequency: 100 kHz typ., 25 kHz min.
    • Fall delay: ≤ 3 µs
    • Rise delay: ≤ 1 µs
    • Fall time: ~1 µs
    • Rise time: ~1 µs

1.3.3. Inverter

  • Input load: 1 unit, disjunctive
  • Output load: 10 units
  • Max. repetition frequency: >100 kHz

1.3.4. Amplifier

  • Input load: 2 units, disjunctive
  • Output load: 10 units
  • Max. repetition frequency: >100 kHz

1.3.5. Time-Delay Element

  • Input load: 1 unit, disjunctive
  • Output load: 5 units
  • Rise delay: adjustable between 10 ms and 10 s

[page 9 — continuation of technical data]

  • Fall delay: <1 µs
  • On/off ratio (“0” time / delay time): ~1

1.3.6. Relay Amplifier

  • Input load: 1 unit, disjunctive
  • Output: 2 changeover contacts
  • Load capacity: 100 V, 1 A, 30 W
  • Pull-in delay: ≤ 10 ms
  • Release delay: ≤ 25 ms

1.3.7. Logic Elements

  • Type: passive diode logic
  • Inputs: conjunctively connected
  • Outputs: disjunctively connectable
  • Loading:
Diode logic typeInput load (units)Output load (units)
3-diode logic1/210
4-diode logic120
5-diode logic120
6-diode logic120
7-diode logic120
11-diode logic2>20

1.3.8. Switch

  • Output: 1 changeover contact
  • Load capacity: >20 units, conjunctive; 4 units, disjunctive

1.3.9. Clock Generator

  • Pulse repetition frequency: 1; 2; 5; 50; 100 Hz; 1; 10 kHz and single-pulse triggering
  • Clock inhibit:
    • Control: binary “1”
    • Inputs: 2, disjunctively connected
    • Input load: 2 units
  • Trigger input:
    • Control level: 6 V
    • Control edge: negative
    • Slew rate: ≥ 10 V/µs

[page 10 — continuation of clock generator data and power supply / dimensions]

  • Pulse duration: >1 µs
  • Max. repetition frequency: 80 kHz typ., 20 kHz min.
  • Input impedance: 4.7 kΩ // 1000 pF
  • Single pulse:
    • Control: contact closure to ground
    • Switching voltage: ~−25 V
    • Switching current: ≤ 40 mA
    • Max. repetition frequency: >10 Hz
  • Parallel input:
    • Control: positive pulses
    • Amplitude: >10 V
    • Slew rate: >10 V/µs
    • Pulse duration: >3 µs
    • Max. repetition frequency: >100 kHz
    • Input impedance: ~5.6 kΩ
  • Parallel output:
    • Pulse shape: rectangular
    • Amplitude: >−10.5 V
    • Slew rate: >10 V/µs
    • Duration of pulse gap: ≤ 25 µs
    • Load capacity: >800 Ω ≙ 7 parallel inputs

1.3.10. Power Supply

  • Voltage: 220 V AC
  • Frequency: 50 Hz ± 5%
  • Power consumption: ~80 W

1.3.11. Dimensions

  • Height: 584 mm
  • Width: 550 mm
  • Depth: 410 mm
  • Weight: ~30 kg

1.3.12. Environmental Conditions

  • Temperature: 23°C ± 15°C
  • Relative humidity: 20 … 90%

1.4. Construction

[page 11 — section 1.4]

The Digital Experimentation Unit constitutes a free-standing unit of compact construction. It can be used as an individual unit or as an element of the Telefunken analog computer system, and it has the following components in the programming field: the active elements and the passive elements (logic network), as well as all connections necessary for programming. In addition, the control elements are situated on the programming field directly accessible to the operator.

In the DEX 100, the active elements such as flip-flops, amplifiers, inverters, time-delay elements, relay amplifiers, and switches are accommodated in exchangeable plug-in units. These plug-in units can be removed and replaced individually. The programming field is connected to the switching sockets by means of connection cords in a programmable manner.

From the technical point of view it is most advantageous to lay out programs in the DEX 100 on interchangeable programming fields. These are inserted from the front and can be exchanged at any time. In this way it is possible, for example, to document and to store programming states simply by means of a programming field.

For the internal connection between the outputs and inputs of the active elements, and for the connection to analog and desk-top analog computers, external and internal connection leads are also provided as a part of the coupling field. This results in a modular coupling field structure in which the individual active elements (flip-flops, amplifiers, etc.) as well as all passive elements (logic networks) can be interconnected in a freely programmable manner.

1.5. Function

[page 12 — section 1.5]

The corresponding circuits can produce a controllable sequential circuit of the type of state machine in keeping with the principles of sequential logic. At the same time, the range of possible Turing Maschines covers the requirements for counter technology and encoder/decoder technology.

The Digital Experimentation Unit contains a number of active elements such as flip-flops (for example, 6 flip-flops), passive elements (programming networks), amplifiers (1 amplifier-inverter), inverters (1 time-delay-inverter), relay amplifiers, and switches. The programming field affords the interconnection of these elements to arbitrary digital networks. The flip-flops serve as the memory elements of the digital network. The logic elements serve for the formation of the logic functions (conjunctions and disjunctions).

The unit can also be equipped with additional plug-in units. Among these are the relay plug-in unit and the conjunction unit for the digital add-on.

The flip-flops can be set and cleared individually by means of push-buttons; they can be clocked individually or simultaneously; they can be read out by display lamps. The “1” state appears at the output with a lit lamp. The entire circuit can be reset to the “0” initial state by a common normalize push-button.

The data input occurs via manual switches, by setting the flip-flop or by control with binary signals. For output, indicator lamps serve. However, external devices — such as an analog computer — can also be controlled directly from the outputs of the active elements (flip-flop, inverter, amplifier) as well as via relay amplifier contacts.

When using the DEX 100 Z as a digital add-on to an analog computer, the connection cable at the rear of the unit provides a series of control and signal connections on the programming field and on the coupling field that form a part of the programming field. These include:

  • Outputs of comparator amplifiers of the analog computer
  • Inputs of digital-analog switches of the analog computer
  • Inputs of the set/normalize controls for the flip-flops
  • Inputs of the control signals for analog computer operating states
  • Inputs of the control signals for single-pulse control of the integrators
  • Parallel connections for the transmission of additional switch functions (e.g., for the connection of comparators and switches when expanding the analog computer)
  • Inputs for the clock signals of the experimentation unit

In this way, mutual interaction between the digitally and the analogically programmed control and computing circuit is possible.

A single DEX 100 Z digital add-on unit can serve systems having up to two desktop analog computers. The connection of the digital add-on to the desktop analog computers is made via parallel connection cables without external interconnecting wires.

1.6. Mode of Operation

1.6.1. Flip-Flops

[page 14 — section 1.6.1]

The flip-flops are active elements with memory properties for binary states. They are constructed as clocked symmetric flip-flops with capacitor storage and output amplifiers. In the programming field, the set input “S”, the reset input “R”, and two outputs “A” and “Ā” are provided, whose states are complementary to each other, so that in addition to the output signal its inverse is also available.

The flip-flops can be set individually by means of a push-button and can be normalized (cleared) by means of a common clear operation. The output state is indicated by a lamp, which lights up when the output “A” satisfies the condition “1”.

The function table of the flip-flop is shown in Table 1. The input signals S_n and H_n are applied at time t_n to the inputs S and H (Reset). The outputs A_n and Ā_n of the storage element have at this time the states A_n and Ā_n. After the occurrence of the clock pulse, these then change to the state A_{n+1} and Ā_{n+1}.

Table 1 — Flip-Flop Function Table

S_nH_nA_{n+1}
00A_n
010
101
11Ā_n

[page 15 — continuation of section 1.6.1 and section 1.6.2]

The behavior apparent from the last line of the table characterizes the JK characteristic of the flip-flop. This JK behavior makes it possible to realize simple binary dividers and counters, because the flip-flops switch synchronously (see also Programming 2.4.). It is sufficient to apply a “1” to both inputs; the outputs then change their state with every clock pulse.

A further advantage of the flip-flops is due to the decoupling diodes located at the inputs (cf. Fig. 2.4.4.5.). They make possible the construction of shift registers, etc., by simple interconnection of the flip-flop outputs (cf. Fig. 2.4.4.7.).

1.6.2. Logic Elements

The logic elements are passive diode networks with which, depending on programming, conjunctions or disjunctions can be realized. At the inputs, for the positive signal voltages used, a conjunction (AND element) is formed. The anode side is connected directly to the conjunction junction resistor. At least one of the diodes must be used as an output. This then connects via the diodes of further elements directly to form a disjunction (OR element). The associated disjunction junction resistor is formed by the input network of the following active elements (flip-flop, amplifier, etc.).

[page 16 — circuit diagrams and continuation of section 1.6.2]

[page 16: figure — circuit diagram of diode logic network showing the conjunctive inputs with diodes, the +13.5 V reference rail, and connection to a following active element (e.g., amplifier); also a schematic symbol showing the AND-OR two-level gate]

A two-level logic in the sequence conjunction–disjunction can thereby be constructed. For multi-level logic, the insertion of active unclocked elements such as amplifiers and inverters is required. Reversal of the sequence is possible only by applying de Morgan’s theorems (see Programming).

Multiple use of a diode as an output is possible when flip-flops follow the network as active elements, since decoupling diodes are incorporated in their inputs. In all other cases it is, however, advisable to use multiple diodes as outputs.

From the foregoing it follows that from every n-element logic element, at most n−1 diodes are available for forming a conjunction, and for forming a disjunction with m variables, m logic elements are required.

1.6.3. Amplifiers

[page 17 — section 1.6.3]

The amplifiers are unclocked active elements and deliver at the output the amplified input signal. They serve in conjunction with the passive diode networks particularly for the construction of multi-level logic networks (see 1.6.2.).

[page 17: figure — circuit diagram of amplifier showing disjunctive input E, amplifier stage with +13.5 V supply, output A; also symbol: triangle with input E and output A]

1.6.4. Inverters

The inverters are unclocked active elements and deliver at the output the inverted amplified input signal. They serve for the construction of multi-level logic networks (see 1.6.2.). Since they are additionally equipped with indicator lamps which light up when the input is “1”, they are particularly suited for the monitoring of circuit states. The passive logic can thus be checked for correctness at an early stage of problem solving.

[page 17: figure — circuit diagram of inverter showing disjunctive input E, inverter stage with indicator lamp ⊗, output Ā; also symbol: triangle with bubble at output]

1.6.5. Time-Delay Elements

The time-delay elements are unclocked active elements, whose output delivers a delayed version of the input signal. They make it possible to intervene in the clocked sequence of synchronous logic and to introduce certain time dependencies.

The time-delay elements consist essentially of an RC element with a downstream pulse shaper. The RC element is bridged by a rectifier element, so that the “0” passes undistorted, while the “1” is delayed. The time constant of the RC element is adjustable between delay times Δt of 10 ms and 10 s by means of a front-panel potentiometer. The recovery time of the input net-

[page 18 — continuation of section 1.6.5 and sections 1.6.6–1.6.7]

work is of the order of magnitude of the smallest time constants, so that for constant delay times the time for which the input is set to 0 must be at least as large as the subsequent delay time.

[page 18: figure — circuit diagram of time-delay element showing disjunctive input E, RC element with rectifier, pulse shaper with +13.5 V supply, output A; also symbol: rectangle with Δt label, input E and output A]

1.6.6. Relay Amplifiers

[page 18: figure — circuit diagram of relay amplifier showing disjunctive input E, amplifier stage with relay coil, changeover contacts C_1 through C_5 with relay coil symbol; also symbol showing the amplifier triangle, relay coil, and changeover contact pair labeled 1 and 2]

The relay amplifiers make it possible to read out the output of a switching circuit externally via a changeover contact. It is thus possible, for example, to use the contacts to control the integrator relay of a connected analog computer. In order to prevent external voltages from reaching the logic level via incorrect programming, the contacts are routed outside the programming field onto the control field (cf. Fig. AB 135). The contacts are identified in the preceding illustration. When the amplifier input is loaded with 0, the contact tongue lies in the position marked with a crossbar.

1.6.7. Switches

The switches are active elements and serve for the manual input of Boolean variables. They are constructed symmetrically with two mutually complementary outputs.

Page 19 (document page 16)

The switches have two positions. In the left position (when looking at the front of the device), socket A (left socket) delivers a 1 and Ā delivers a 0; in the right position A = 0 and Ā = 1.

[Figure: Switch circuit diagram and symbol]

1.6.8. Coupling Field

The coupling field is a special part of the programming field (see section on programming field layout, 2.4.1.). In the DEX 100 E device version, the plug-in unit S-KS1 is equipped with six-pole linking elements. In the DEX 100 Z version (with plug-in unit S-JBS1), in addition to two linking elements at adjacent positions, the function lines of the pause key of the connected desk analog computer RA 741, as well as its comparator amplifier outputs and comparator switch inputs (digital/analog switch), appear on the coupling field.

1.6.8.1. Function Lines of the Pause Key (DEX 100 Z only)

[Figure: Circuit diagram of the p-line with pause relay PT, flipflops, and Lö (Delete) sockets]

The p-line is controlled by a normally closed contact of the pause relay in the desk analog computer, i.e., the relay is not energized when the pause key is pressed. The contacts are in the position shown. PT delivers a 1, P̄T delivers a 0. If the Lö (Delete) sockets are connected, the flipflops are cleared. In all other operating states of the computer the relay is energized.

Page 20 (document page 17)

1.6.8.2. Comparator Amplifier Outputs (DEX 100 Z only)

The output of the analog comparator amplifiers reaches the DEX 100 only if there is a small positive voltage at one of the inputs. This constitutes a particularly favorable boundary condition for analog and digital systems. The input quantities are the sum of the analog quantities applied.

[Figure: Comparator amplifier output circuit diagram — comparator amplifier with input summing and output to inverter]

1.6.8.3. Comparator Switch Inputs (DEX 100 Z only)

Comparator switches (Flip-Flop switching elements, 1-bit storage) accept digital flip states and transform them into analog values (positions 1 and 0). The RA 741 switch (Hi-A switch) converts the logical flip-flop state to the Factored output in the computing units.

1.6.9. Pulse Generator

The pulse generator consists of a frequency selector, a monoflop OS, timing elements, and a power amplifier.

Page 21 (document page 18)

[Figure: Pulse generator block diagram showing frequency selector switch, monoflop OS, power amplifier, and clock output; inputs: Fremd (external), Parallel, Einzel (single); selector positions: Fremd, Parallel, Einzel, 1 Hz, 2 Hz, 5 Hz, 10 Hz, 20 Hz, 50 Hz, 100 Hz, 1 kHz, Pegel/parallel/Ausgang (level/parallel/output)]

The generator is a modifiable multivibrator that delivers a pulse sequence whose frequency can be selected by a rotary switch on the front panel. In the “External,” “Parallel,” and “Single” switch positions, the generator is halted. At 50 Hz, the clock is synchronized to the mains.

The following pulse shaper consists of a trigger stage and a monoflop OS. Via the trigger stage, the monoflop can be triggered by its own clock, single-step clock, and external triggering. It delivers a negative pulse of 20 µs duration, whose positive edge, after amplification in the power amplifier, is used to clock the flipflops. The parallel output makes it possible to synchronize several paralleled power amplifiers from one clock generator.

In the trigger stage of the pulse shaper, a clock interlock is also provided, which makes it possible to suppress the passage of clock and trigger pulses to the monoflop according to the program.

1.6.10. Power Supply

The power supply unit delivers all DC voltages required to operate the device. Three bridge rectifiers with subsequent smoothing elements generate the DC voltages of +10.5 V, +13.5 V, and −13.5 V. Two indicator lamps on the front panel of the device serve to indicate the power-on state and to monitor the mains fuse.

Page 22 (document page 19)

2. OPERATION

2.1. Commissioning

2.1.1. Mains Connection

The device is connected to the AC mains using a standard mains cable (Flexo-Schuko cable). It is important to observe correct mains voltage and frequency (220 V ±10%, 50 Hz ±2 Hz). The device is also suitable for deviating mains frequencies; however, beat phenomena in the clock generator are to be noted at 50 and 100 Hz.

2.1.2. Switching On

The device is switched on using the mains switch located in the upper right corner of the front panel. Immediately thereafter, the mains indicator lamp illuminates. If the fuse monitoring indicator also lights up, the fuse behind it is blown and must be replaced.

2.2. Connection of External Devices

No special measures are required for connecting external devices, other than ensuring that a common reference point (ground) is established by connecting the mass sockets together. Exceptions are only the parallel connection of digital experimenter devices and the connection of desk analog computers of type RA 741.

2.2.1. Parallel Connection of Several DEX 100 Units

When operating multiple digital experimenter devices in parallel, in addition to the ground, the power amplifiers of the clock generators must also be switched in parallel, in order to ensure synchronous clocking of the flipflops. For this purpose, the “Parallel Operation” sockets of the devices must be interconnected and the clock switch of the paralleled devices must be set to “Parallel” (see sections 2.3.3.3, 1.). The clock generator of the device not set to “Parallel” then takes over the control. A maximum of 7 DEX 100 units can be driven from one clock generator.

Page 23 (document page 20)

2.2.2. Connection of Desk Analog Computers RA 741

On the rear panel of the DEX 100 Z there are two 30-pole socket strips to which a connecting cable (type RA 741/DEX 100) can be connected; this allows up to two RA 741 units to be connected. Via these cables, in addition to the reference potential and relay voltage, all the necessary function lines of the coupling field and the control field (see sections 2.4.1. and 2.4.2.1.) are brought out.

If the DEX 100 Z is used as a digital add-on to an RA 741, it is equipped with the plug-in unit S-JBS1 instead of the S-KS1. Due to the resulting change in the elements of the coupling field, the function of the coupling field is modified when the Lö (Delete) sockets are bridged.

2.3. Operation

Operation of the device is not limited to programming; beyond programming, operation essentially involves selecting the clock, setting the flipflops, and setting the timing elements.

The required settings are — just as with programming — best carried out before triggering, i.e., with the clock in the “Single” position (see section 2.3.3.), which is done before triggering at the selected clock frequency.

2.3.1. Normalizing / Clearing

By pressing the “Delete” key, all flipflops can be normalized together to A = 0 prior to triggering. The indicator lamps of the flipflops must then all be extinguished.

With an RA 741 connected, normalization can also be carried out by pressing the RA 741’s pause key, provided the Lö (Delete) sockets are bridged (see section 2.4.1., coupling field).

2.3.2. Setting the Flipflops

Using the set keys, the flipflops can be individually set to A = 1. The set keys are located above the programming field with a perpendicular assignment to the corresponding input and output sockets of the flipflops. The corresponding indicator lamps must then illuminate.

Page 24 (document page 21)

2.3.3. Clock Modes

The rotary switch in the upper right corner of the front panel makes it possible to select between certain trigger waveforms for the clocking of the flipflops.

2.3.3.1. Triggering by a Pulse Sequence

In the positions 1 Hz, 2 Hz, 10 Hz, 50 Hz, 100 Hz, and 1 kHz, the flipflops are triggered by a pulse sequence at the corresponding frequency.

2.3.3.2. Single Step

In the “Single” position, one clock step at a time can be triggered by pressing the “Single” key. The same is also possible via the corresponding socket and the adjacent socket. Furthermore, a pulse sequence at a frequency of 2.5 Hz can be generated by pressing the key.

2.3.3.3. Parallel Clock

In the “Parallel” position, the clock is supplied by a paralleled DEX 100. For this purpose, the “Parallel Operation” sockets of the devices must be interconnected (see section 2.2.1.).

2.3.3.4. External Clock

In the “External” position, the clock can be triggered by external trigger pulses applied via the “Trigger Input” socket. The Technical Data for “Clock Generator, Trigger Input” (section 1.3.) must be observed here.

2.3.4. Setting the Timing Elements

The delay time of the timing elements can be set using potentiometers located at the upper edge of the front panel, in the range from 10 ms to 100 s. The setting is approximately logarithmic.

Page 25 (document page 22)

2.4. Programming

The programming of the DEX 100 takes place on the programming field. Elements are interconnected and logical functions (Boolean algebra) are implemented by inserting connecting plugs (linking elements). The programming field is referred to as the “plug-programming field” for short.

The DEX 100 has approximately 400 programming sockets. The programming field can be described using a “programming chart.” This is printed on transparent film. These films are placed on the programming field (Transparent-System). They can be written on with a pencil and erased. The connection between variables is thus documented in diagram form.

The DEX 100 has a detachable plug programming field (see section 2.4.1.1.). This is a particularly convenient method of programming, where the transparency sheet can be prepared in advance separately from the programming.

2.4.1. Layout of the Programming Field (also see Fig. 1)

The programming field has approximately 400 sockets. The programming field can be described with a “programming chart,” which is printed on transparent film. These films are placed on the programming field and can be written on and erased. Connection between variables is documented in diagram form in this transparency.

The DEX 100 E has a detachable plug programming field. This is a particularly convenient method where programming can be prepared in advance, separate from the machine. A connection between variables is then established in diagram form in the transparency.

Page 26 (document page 23)

…field fitted with four linking elements. In the DEX 100 Z version, in addition to two linking elements, the comparator amplifier outputs, the comparator switch inputs, and the function lines of the pause key of two connectable RA 741 units are also brought to the coupling field.

The labeling of both the fixed and the interchangeable programming field is uniform and takes into account the use of the device as a digital add-on (DEX 100 Z). The socket colors, on the other hand, serve primarily for orientation when the device is used as an experimenter. They are therefore laid out on both the fixed and interchangeable programming field corresponding to the experimenter version (DEX 100 E) of the digital experimenter device DPF 110. On request, the interchangeable programming field DPF 111 is also available, in which both the labeling and the color scheme correspond to the digital add-on version.

Page 27 (document page 24)

Socket Assignment Table — Programming Field

[Table: Socket assignment of the programming field — partial view showing columns: Nr. (No.), Bezeichnung (Designation), Kennzeichnung (Identification), Farbe (Color), Adresse (Address), Bemerkung (Notes)]

Nr. 1 — Flipflop 1–16

  • Designation: Flipflop 1–16
  • Color: yellow
  • Addresses: A, d, f–h, k–n (1–17; a–d, 1–17)
  • Notes: Flipflop outputs A and Ā are directly accessible on the programming field. The inputs are at the corresponding addresses on the programming field.

Nr. 2 — D-inputs

  • Identification: D
  • Addresses: b, e, 1–17
  • Notes: D-inputs of the flipflops.

Nr. 3 — Set inputs

  • Identification: S
  • Color: red
  • Addresses: —
  • Notes: —

Nr. 4 — Inverter

  • Identification: N
  • Color: white
  • Addresses: a–b (1–16); a, b (1–16)
  • Notes: Inverter output and input.

Nr. 5 — Linking elements (Verknüpfungselemente)

  • Identification: V
  • Color: —
  • Addresses: f, g, 1–16; a–e, 1–16
  • Notes: Passive linking elements (diode linking). Used for logic conjunctions and disjunctions.

Nr. 6 — Timing elements (Zeitglieder)

  • Identification: Z
  • Color: —
  • Addresses: see timing element section
  • Notes: —

Nr. 7 — Flipflop-Verknüpfung

  • Identification: FV
  • Addresses: —
  • Notes: —

Nr. 8 — Koppelfeld (Coupling field)

  • Color: light green
  • Addresses: —
  • Notes: —

Page 28 (document page 25)

Socket Assignment Table (continued)

[Table columns: Nr., Bezeichnung, Kennzeichnung, Farbe, Adresse, Bemerkung]

Nr. 1 — Flipflop outputs (Ausgang)

  • Color: yellow
  • Addresses: A, d, 1–17; a, b, c, d, 1–17
  • Notes: The flipflop outputs on the programming field are directly accessible. In the DEX 100 Z version, the outputs at the addresses a, b, c, d (1–17) are accessible via the function lines brought to the coupling field.

Nr. 2 — D-inputs

  • Color: —
  • Addresses: b, e, 1–17
  • Notes: D-inputs.

Nr. 3 — Set inputs

  • Color: red
  • Addresses: a, 1–17
  • Notes: S-inputs (set inputs of flipflops).

Nr. 4 — Inverter inputs/outputs

  • Color: white
  • Addresses: a, b, 1–16
  • Notes: Inverter input and output addresses.

Nr. 5 — Verknüpfungselemente (Linking elements)

  • Color: —
  • Addresses: multiple rows
  • Notes: Passive linking elements.

Nr. 6 — Zeitglieder (Timing elements)

  • Color: —
  • Addresses: see schematic
  • Notes: —

Nr. 7 — Leitungen (Lines)

  • Color: orange
  • Addresses: 31–34
  • Notes: Bus lines.

Nr. 8 — Querbusverbindungen (Cross bus connections)

  • Color: —
  • Addresses: —
  • Notes: —

Nr. 9 — Komparatorverstärkerausgänge (Comparator amplifier outputs)

  • Color: —
  • Addresses: —
  • Notes: —

Nr. 10 — Operationsverstärkerausgänge (Operational amplifier outputs)

  • Color: —
  • Addresses: —
  • Notes: —

Page 29 (document page 26)

Socket Assignment Table (continued)

[Table columns: Nr., Bezeichnung, Kennzeichnung, Farbe, Adresse, Bemerkung]

Nr. [continuation] — Komparator-Schaltereingänge (Comparator switch inputs) 1–4

  • Color: dark green

  • Addresses: p-s, 16–17

  • Notes: The control inputs are accessible on the programming field via the analog computer switching contacts. When a 1 is applied to switch K1, the contacts are in the right-hand rest position (as shown).

    • Identification I – II. 1 / I – II. 2

    • Addresses: p, 16–17; q, 16–17

    • Notes: Control inputs for switch K1. Associated contacts lie on parallel switch sockets 1, 5, 6. Layout of the control field, position 4, must be observed.

    • Identification I – II. 3 / I – II. 4

    • Addresses: r, 16–17; s, 16–17

    • Notes: Control inputs for switch K2. Associated contacts lie on parallel switch sockets 1, 2, 3. Layout of the control field, position 4, must be observed.

Page 30 (document page 27)

2.4.2. Layout of the Control Field

The control field serves only for coupling the DEX 100 Z with desk analog computers RA 741. On the control field, all lines are grouped together that carry relay voltage (−25 V) in contrast to the lines routed to the coupling field, and therefore must not be connected to the digital switching elements.

The control field is labeled and addressed in the same manner as the programming field. Also to be noted is the layout in two equal vertical groups. These groups are assigned to the 30-pole socket strips on the rear panel, and thus to the left computer (Computer I) and the right computer (Computer II) to be connected there.

Page 31 (document page 28)

Socket Assignment Table — Control Field (Steuerfeld)

[Table columns: Nr., Bezeichnung, Kennzeichnung, Farbe, Adresse, Bemerkung]

Nr. 5 — Steuerbuchsen (Control sockets)

  • Color: violet

  • Addresses: p–q, 31–34

    • Steuerbuchsen (control sockets)

      • Notes: The control sockets on the programming field lie parallel to the analog computer switching contacts, with the prerequisite that there is no ambiguous control for the operating key in “Pause.”

    • P-Leitung (P-line) — Identification: P

      • Notes: Computer goes briefly to “IsComputing” when in operating states P and H. Computer goes to ground with brief actuation, “IsComputing,” when not in operating states P and H.

    • R-Leitung (R-line) — Identification: R

      • Notes: Computer goes briefly to operating mode “Compute” from “Halt.”

    • H-Leitung (H-line) — Identification: H

      • Notes: Computer goes to “Halt” from “Compute.”

    • It-Buchse (It socket) — Identification: It

      • Notes: From the beginning of the repetition pause (setting the state “Halt” to the end of the repetition pause), it is free of mass potential. Since the contact is potential-free, linking elements (Verknüpfungselemente) can be directly switched.

Page 32 (document page 29)

2.4.3. Input and Output of Data

For the input and output of data, three possibilities are to be distinguished:

2.4.3.1. Manual Input / Visual Output

The data are entered directly via the flipflop set keys, resp. the set switches, and are displayed by illumination of the flipflop indicator lamps.

2.4.3.2. Input and Output of Binary Information Signals

Serial binary information signals, with digital values such as 1 and 0, are described as having certain pulse forms; they are processed using the appropriate linking functions (linking elements). When the “1” levels are around 1 kΩ and the “0” levels are low impedance (< 50 Ω), even a faulty programming will not lead to destruction of the elements. For output, the active elements such as flipflops, amplifiers, and inverters are available, since these can be loaded to between 10 and 20 V positive supply voltage (approx. 100 mA).

2.4.3.3. Input and Output via Relays

If the data can be represented in the voltage range of the binary digits (see section 1.3.1.) or can be evaluated, input and output via relays is possible.

The switching of conjunctions is particularly simple: an open contact corresponds to a “1,” and contact closure corresponds to a “0.”

For output, the four relay amplifiers each with two change-over contacts are available. The contacts are potential-free so that they can switch voltages in the range of the values stated under 1.3.6.

2.4.4. Special Programming Notes

When programming the DEX 100, some special features are to be noted that arise from the nature of the linking elements used, particularly the passive linking elements, and which are to be explained with the aid of the following examples.

Page 33 (document page 30 — partial continuation)

[page continues from prior section with programming notes and examples]

Page 34 (document page 31)

2.4.4.1. Conjunction (AND Circuit)

The diodes of the linking elements, seen from the input side, are forward-biased. The conjunction is therefore very simply realized.

Function: y = x₁ ∧ x₂ ∧ x₃

[Figure: AND circuit schematic showing three inputs x₁, x₂, x₃ through diodes to an amplifier, and the corresponding logic symbol]

It must be noted that one output diode of the linking element must be used. The diodes of one element’s outputs can be used to conjunctively link at most (n – 1) variables. The symbolized active element can consist, for example, of a flipflop, amplifier, or inverter.

2.4.4.2. Disjunction (OR Circuit)

The diodes used as outputs of the linking elements are connected disjunctively by directly connecting them together. The required disjunction resistance is found in the subsequent active element.

Function: y = x₁ ∨ x₂ ∨ x₃

[Figure: OR circuit schematic showing three separate linking elements with outputs joined, and the corresponding logic symbol with three inputs through diodes to amplifier]

Page 35 (document page 32)

To form a disjunction with m variables, m linking elements are needed. If no conjunctive linkages are provided, this can become very costly. It is then often more efficient to transform using the de Morgan theorems, since — mostly, for example, with flipflops and switches — the complement of the variables is also available.

Function: y = x₁ ∨ x₂ ∨ x₃ = x̄₁ ∧ x̄₂ ∧ x̄₃ (overbar notation)

[Figure: Logic diagram using inverted inputs x̄₁, x̄₂, x̄₃ with conjunction to achieve disjunction via de Morgan transformation]

The additional cost compared to the conjunction is only the additional inverters.

2.4.4.3. Conjunction / Disjunction

Linkages in the sequence Conjunction/Disjunction are — conditioned by the nature of the linking elements used — extremely economical to realize.

Function: y = (x₁ ∧ x₂) ∨ (x₃ ∧ x₄)

[Figure: Logic diagram with two AND groupings feeding into a common OR-amplifier stage]

2.4.4.4. Disjunction / Conjunction

Linkages in the sequence Disjunction/Conjunction are preferably realized by applying the de Morgan theorems, since otherwise a comparatively high cost is required (interposing amplifiers).

Function: y = (x₁ ∨ x₂) ∧ (x₃ ∨ x₄) = (x̄₁ ∧ x̄₂) ∨ (x̄₃ ∧ x̄₄) [de Morgan] = (x̄₁ ∧ x̄₂) ∨ (x̄₃ ∧ x̄₄) (overbar notation)

[Figure: Logic diagram implementing the de Morgan-transformed form with negated inputs x̄₁, x̄₂, x̄₃, x̄₄]

Page 36 (document page 33)

2.4.4.5. Fan-Out (Vereinzeln)

If the output quantity of a conjunction is needed as an input quantity of several active elements, several diodes of the outputs can be used as separate outputs.

Function: y₁ = y₂ = y₃ = x₁ ∧ x₂

[Figure: Circuit schematic showing one conjunction element with x₁, x₂ inputs driving three separate amplifier outputs C₁, C₂, C₃; and the equivalent logic symbol with outputs y₁, y₂, y₃]

If the subsequent active elements are flipflops, the use of multiple output diodes can be dispensed with, since the inputs of the flipflops are already provided with decoupling diodes.

Function: S₁ = S₂ = x₁ ∧ x₂

[Figure: Circuit schematic showing one conjunction element feeding set inputs S₁ and S₂ of two flipflops; and the equivalent logic symbol]

The maximum output loading of the linking elements must be observed (see section 1.3.7.).

2.4.4.6. Multiple Use of a Disjunctive Term

If a term appears in the variables of several disjunctions, various diodes are to be used as outputs.

Function: y₁ = x₁ ∨ x₂      y₂ = x₂ ∨ x₃

[figure: logic circuit diagram showing diode networks feeding into gates C_n and C_r, with output buffers driving outputs y₁ and y₂ from inputs x₁, x₂, x₃]

2.4.4.7. Shift Registers

The inputs and presets of the flip-flops are arranged such that, even though only one clock signal is available, shift registers can be formed by simply cascading them in series.

[figure: cascade of flip-flops FF1, FF2, … FF_n connected in series, driven by a common clock t]

2.4.4.8. Counters

The flip-flops used have a so-called JK characteristic (s,1,6,1,). This means that when a 1 is applied simultaneously to the set and reset inputs, the outputs toggle with every clock pulse. Because of this behavior, binary decoders and counters can be realized very easily, even though only a single common clock signal is available.

[figure: 4-bit binary counter circuit built from flip-flops FF1, FF2, FF3, FF4 with feedback logic gates]

The circuit shown above represents a 4-bit binary counter that can count from 0 to 15. By means of appropriate logic interconnections, arbitrarily encoded counters can of course also be formed — for example, decimal (BCD) counters.