Control of Analog Computer Circuits (Switching Control for Analog Computer Programs)

This is an English translation of the original German article “Zur Steuerung von Analogrechenschaltungen” by J. Heinhold and U. Kulisch, published in Elektronische Rechenanlagen, Vol. 8, No. 5, pp. 231–235 (1966). Institut für Angewandte Mathematik, Technische Hochschule München.

Abstract

This paper presents switching-control suggestions for obtaining a simpler and more flexible execution of analog programs. The paper treats the problem of how the computational phases (setup, hold, compute) of an analog computer are organized and orchestrated, particularly in cases involving iterative or multi-segment computations.

1. Introduction

Analog computers today are predominantly used in hybrid digital-analog systems. At the end of the program one usually wants to evaluate the results numerically, i.e., digitize them and then process them further with a digital computer. It is therefore advantageous when the analog computation can be controlled, at least to a degree, by the digital computer. The goal of this paper is to indicate switching-control suggestions suited to this purpose.

An analog computation proceeds in phases. The Zustand (state) of an analog computer at any point in time is characterized by the phases it can occupy: (B) Betrieb (Operate/Compute), (H) Halt, and (A) Anfangswert (Initial Condition/Setup). During phase A, the initial conditions (starting values) for the integrators are set; during phase B, the actual computation runs; during phase H, the computation is halted and the current values are frozen.

The phase sequence for a simple computation is: A → B → H

The Rechenablauf (computational sequence) for a single integrator is shown in Figure 1 of the original (a timing diagram with the switching signal and the resulting integrator output).

2. The Simple Rechenablauf (Computational Sequence)

The Zustandssteuerung (state-control) signal for a single integrator uses a digital control word. In a typical implementation, when the Zustand-Bus carries a 1 in bit-position i, integrator i is placed in Operate; when it carries 0, the integrator is in Initial Condition. Halt is realized by switching all integrators simultaneously.

For a simple computation the control merely progresses: set initial conditions → compute → halt → read result. The Zustand at the end of a Zeitabschnitt (time-segment) determines what phase is entered next.

3. Control via Steuereinheit (Control Unit)

3.1 Simple Steuerung (Control) using a Zähler (Counter)

A single linear program can be driven by a simple clock-driven counter. The counter steps through a sequence of Zustände. Each Zustand drives the switching network that connects to the integrators and comparators. The Folgeschaltung (sequencing logic) determines which Zustand is next.

The Steuerwerk (control unit) for such a single-pass program consists of:

A Taktgeber (clock generator)
A Zähler (counter) to sequence through phases
A Decodierer (decoder) to produce phase signals
The switching network itself

Figure 2 of the original shows the phase-switching timing waveform.

3.2 Steuerung mit Verzweigung (Control with Branching)

More complex programs require branching: the next phase depends on intermediate results (e.g., whether a computed quantity has passed through zero, or whether a solution has converged). In this case, comparators monitor the analog signals. Their outputs feed into the Folgeschaltung as condition inputs. When a condition is detected, the sequence branches to a different Zustand.

The Steuerwerk is accordingly extended:

Comparator outputs (digital: 0 or 1) feed into the sequencer
A look-up table or combinatorial logic selects the next Zustand based on current Zustand plus comparator outputs
This allows iteration loops (e.g., for solving equations by repeated approximation)

Figure 3 shows the circuit diagram for the Steuerwerk (Zustandssteuerung), including the Folgeschaltungsmatrix.

3.3 Steuereinheit mit Taktgebung (Clocked Control Unit)

The clocked variant uses a periodic Taktgeber. Each clock period corresponds to one Zeitabschnitt. The control unit steps through the program steps on each clock edge. For repeated (iterative) computations the sequence is:

A → B → H → A → B → H → … → Stop

Each iteration resets the integrators to their starting values (or to results from the previous iteration), runs the computation, and then halts for comparison. If the convergence criterion is not met, the loop continues; if met, the loop terminates and results are output.

The Zählerstand (counter state) indexes into a Speicher (memory) or combinatorial network to generate:

The Zustand bus word S = (S₁, S₂, …, Sₙ) for the integrators
The Rechenzeitsteuerung (timing control) for each segment
Condition-input masking

4. Steuerung des Rechenablaufs für mehrphasige Schaltungen (Control for Multi-Phase Circuits)

For multi-segment computations (e.g., solving a differential equation over successive time intervals, or performing iterative refinement), the control unit must manage a more complex sequence of states. The authors propose organizing the Steuereinheit around a matrix structure:

Rows represent Zustände (program steps)
Columns represent conditions (comparator outputs, Zählerstände)
The matrix entry gives the next Zustand

This is essentially a finite-state machine (Zustandsautomat) implemented with diode matrices or core matrices (Kernspeicher) common in the mid-1960s. The matrix approach is particularly suited to iterative analog programs where the number of iteration steps is not known in advance.

Figure 11 (in the original) shows the Zustandssteuerung matrix and its connection to the analog computer section.

5. Die Steuermatrix und einfache Beispiele (Control Matrix and Simple Examples)

5.1 Basic Example

A worked example illustrates computing the function: y = f(x) iteratively, where the solution is refined cycle-by-cycle.

The Steuermatrix for this example has a small number of states:

State 0: Initial condition (set integrators)
State 1: Compute phase
State 2: Halt and compare
State 3 (conditional): If not converged, return to State 0; if converged, stop

5.2 Speichermatrix (Storage Matrix) Implementation

The authors describe how the Steuermatrix can be implemented using a diode matrix or a coincident-current magnetic core matrix. In each case, reading the matrix involves selecting the current-state row and the condition column, and the intersection drives the next-state logic.

Figure 12 shows the Speichermatrix schematic, and Figure 13 shows how the output drives the Steuereinheit.

6. The Control Sequence for Multi-Stage Computations

For problems broken into multiple sub-intervals (e.g., integration over [0, T] divided into N sub-intervals), the control proceeds:

For each sub-interval i = 1 … N:

Set initial conditions for interval i (using results from interval i−1)
Compute over the sub-interval
Halt at end of sub-interval
Transfer endpoint values to initial-condition inputs for next sub-interval
Increment i; if i < N, go to step 1

This requires that endpoint values can be stored (latched) and then fed back as initial conditions. The paper describes implementing this using sample-and-hold circuits on the boundary between sub-intervals.

7. Conclusions

The authors conclude that a matrix-based Steuereinheit provides a flexible and general method for controlling the phase sequence of analog computer programs, especially when:

Iterative computations must terminate on a condition rather than after a fixed number of steps
Multi-segment computations require passing state between segments
The same hardware is to be used for different programs simply by changing the Steuermatrix

This approach bridges analog computation with digital sequencing logic and anticipates the hybrid computer architectures of the late 1960s and 1970s.

[Translation covers the first 6 pages (the complete document); this is a complete translation of the 6-page original article.]