English translation
Electronic Computing Components — Schematic Drawings (Telefunken ERV 801)
This document translates the original German-language schematic drawings from the Telefunken ERV 801 analog computer documentation.
Page 1 — Electronic Computing Components, Principle Schematic
Title block (upper right):
- Title: Elektronik, Rechenkomponenten (Prinzip) — Electronics, Computing Components (Principle/Schematic)
- Drawing number: SS-2005-650 (sheet 20, revision Str.)
- Manufacturer: Telefunken (diamond logo)
Schematic content:
The page presents a principle-level circuit diagram showing the electronic computing components of the ERV 801. It depicts multiple operational amplifier stages (shown as triangular amplifier symbols) arranged in a systematic layout. The circuit includes:
- Upper row: Four amplifier units, each with associated input/output connections and component designations (capacitors and resistors shown as symbol elements). These appear to represent integrators or summers.
- Middle rows: Additional amplifier blocks, including what appear to be TELEFUNKEN branded component modules (labeled with part numbers, likely the computing amplifier plug-in units such as the RA-type amplifiers).
- Lower rows: Further amplifier stages including those with dual-triangle symbols (possibly sign-reversing or coefficient-setting stages) and additional passive component networks.
- Interconnections: Signal buses and inter-stage wiring shown with labeled lines.
- Legend/key (lower right of schematic area): Symbol key for the components used (triangles, boxes, passive elements).
The schematic is a functional/block-level representation (Prinzip = “principle”), not a detailed component-level wiring diagram.
Page 2 — Electronic Computing Components, Assignment Overview
Title block (upper right):
- Title: Elektronen-Rechenkomponenten Belegungsübersicht — Electronic Computing Components, Assignment/Patch Overview
- Drawing number visible in title block area
- Manufacturer: Telefunken (diamond logo)
Table content:
Page 2 is a structured table (Belegungsübersicht = patch/assignment table) showing the interconnection and signal routing between computing components. The table is organized in sections:
-
Left section (GS-2A): Lists connection points or patch panel assignments. Rows are labeled with designations such as:
- H-GS-2 ÷ 4V — (connection to summer/integrator block, ±4V range)
- H-GS-2 ÷ 4V
- H-GS-2 + 4V
- A (amplifier connection)
- B
-
Middle-left section (Mult. PM3-B / Mult. PM3-A / VII-A / VII-B): Signal multiplier or potentiometer assignments, with row labels indicating computing amplifier types and connection designations (H1, H2, HA, etc.)
-
Middle-right section (Mult. PM3-B): Further multiplier/potentiometer routing, with component labels and signal paths (H1, H2, R1, R2, H-VW1, etc.)
-
Right section (Mult. PM3-B / ABC-type connections): Final routing table with amplifier module assignments including ABC-type inputs (ABC-4A, ABC-4B), potentiometer designations (P31, P35, etc.), and output connections (H1, H2, H-VW4, etc.).
-
Far right column: The Belegungsfeld (assignment field) with numbered rows (1–11 or similar), corresponding to physical patch panel positions on the analog computer.
-
Lower right subsection labeled “Tabfonreite” (possibly “Tabellenreite” = table section): Additional assignment rows with numbered entries (11–14 visible).
The table documents how computing components (amplifiers, multipliers, coefficient potentiometers) are interconnected and assigned to physical panel positions for operation of the ERV 801 system.
[Translation covers all 2 pages of the original document — complete.]